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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6103 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-08-08 09:08:57 +00:00
parent 0c0288d678
commit 6071e93a92
5 changed files with 24 additions and 11 deletions
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4
demos/ARMCM4-STM32F303-DISCOVERY/chconf.h
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@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 10000 #define CH_CFG_ST_FREQUENCY 1000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 2 #define CH_CFG_TIMEDELTA 0
#endif #endif
/** /**

4
os/halnew/platforms/STM32/st_lld.c
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@ -104,7 +104,7 @@ void st_lld_init(void) {
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING #if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
/* Free running counter mode.*/ /* Free running counter mode.*/
rccEnableTIM2(FALSE); rccEnableTIM2(FALSE);
nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY_MASK); nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY);
STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1; STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1;
#endif #endif
@ -117,7 +117,7 @@ void st_lld_init(void) {
SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_ENABLE_Msk |
SysTick_CTRL_TICKINT_Msk; SysTick_CTRL_TICKINT_Msk;
nvicSetSystemHandlerPriority(HANDLER_SYSTICK, ST_TIMER_PRIORITY_MASK); nvicSetSystemHandlerPriority(SysTick_IRQn, ST_TIMER_PRIORITY);
#endif #endif
} }

6
os/halnew/platforms/STM32/st_lld.h
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@ -40,10 +40,10 @@
* @{ * @{
*/ */
/** /**
* @brief SysTick timer priority mask. * @brief SysTick timer priority.
*/ */
#if !defined(ST_TIMER_PRIORITY_MASK) || defined(__DOXYGEN__) #if !defined(ST_TIMER_PRIORITY) || defined(__DOXYGEN__)
#define ST_TIMER_PRIORITY_MASK 0x80 #define ST_TIMER_PRIORITY 8
#endif #endif
/** @} */ /** @} */

16
os/halnew/platforms/common/ARMCMx/nvic.c
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@ -55,7 +55,7 @@
* @param[in] n the interrupt number * @param[in] n the interrupt number
* @param[in] prio the interrupt priority mask * @param[in] prio the interrupt priority mask
*/ */
void nvicEnableVector(uint32_t n, uint32_t prio) { void nvicEnableVector(IRQn_Type n, uint32_t prio) {
NVIC->IP[n] = NVIC_PRIORITY_MASK(prio); NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
NVIC->ICPR[n >> 5] = 1 << (n & 0x1F); NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
@ -68,10 +68,22 @@ void nvicEnableVector(uint32_t n, uint32_t prio) {
* *
* @param[in] n the interrupt number * @param[in] n the interrupt number
*/ */
void nvicDisableVector(uint32_t n) { void nvicDisableVector(IRQn_Type n) {
NVIC->ICER[n >> 5] = 1 << (n & 0x1F); NVIC->ICER[n >> 5] = 1 << (n & 0x1F);
NVIC->IP[n] = 0; NVIC->IP[n] = 0;
} }
/**
* @brief Changes the priority of a system handler.
* @note The parameters are not tested for correctness.
*
* @param[in] handler the system handler number
* @param[in] prio the system handler priority mask
*/
void nvicSetSystemHandlerPriority(IRQn_Type handler, uint32_t prio) {
SCB->SHP[((uint32_t)(handler) & 15) - 4] = NVIC_PRIORITY_MASK(prio);
}
/** @} */ /** @} */

5
os/halnew/platforms/common/ARMCMx/nvic.h
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@ -57,8 +57,9 @@
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void nvicEnableVector(uint32_t n, uint32_t prio); void nvicEnableVector(IRQn_Type n, uint32_t prio);
void nvicDisableVector(uint32_t n); void nvicDisableVector(IRQn_Type n);
void nvicSetSystemHandlerPriority(IRQn_Type handler, uint32_t prio);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif