Updated I2C testhal for STM32F1x.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9174 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -27,7 +27,7 @@
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<link>
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<link>
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<name>os</name>
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<name>os</name>
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<type>2</type>
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<type>2</type>
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<locationURI>CHIBIOS/os</locationURI>
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<locationURI>CHIBIOS</locationURI>
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</link>
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</link>
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</linkedResources>
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</linkedResources>
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</projectDescription>
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</projectDescription>
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@ -92,7 +92,7 @@ include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.m
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# HAL-OSAL files (optional).
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# HAL-OSAL files (optional).
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
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include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_P103/board.mk
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include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_103STK/board.mk
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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# RTOS files (optional).
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# RTOS files (optional).
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/rt.mk
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@ -22,14 +22,20 @@
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*/
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*/
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#include <stdlib.h>
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#include <stdlib.h>
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#include <math.h>
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#include <string.h>
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#include "ch.h"
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#include "ch.h"
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#include "hal.h"
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#include "hal.h"
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#include "lis3.h"
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#include "lis3.h"
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/* device I2C address */
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#define addr 0b0011101
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#define addr 0b0011101
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/* enable single byte read checks. Note: it does not work on STM32F1x */
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#define TEST_SINGLE_BYTE_READ TRUE
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/* autoincrement bit position. This bit needs to perform reading of
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/* autoincrement bit position. This bit needs to perform reading of
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* multiple bytes at one request */
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* multiple bytes at one request */
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#define AUTO_INCREMENT_BIT (1<<7)
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#define AUTO_INCREMENT_BIT (1<<7)
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@ -59,7 +65,7 @@ void lis3Start(void){
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/* sending */
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/* sending */
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i2cAcquireBus(&I2CD1);
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i2cAcquireBus(&I2CD1);
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status = i2cMasterTransmitTimeout(&I2CD1, addr,
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status = i2cMasterTransmitTimeout(&I2CD1, addr,
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accel_tx_data, 4, accel_rx_data, 0, tmo);
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accel_tx_data, 4, NULL, 0, tmo);
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i2cReleaseBus(&I2CD1);
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i2cReleaseBus(&I2CD1);
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osalDbgCheck(MSG_OK == status);
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osalDbgCheck(MSG_OK == status);
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@ -68,25 +74,54 @@ void lis3Start(void){
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/*
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/*
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*
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*
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*/
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*/
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#include <math.h>
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static void raw2g(uint8_t *raw, float *g) {
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int16_t tmp;
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for (size_t i=0; i<3; i++){
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tmp = raw[i*2] | (raw[i*2+1] << 8);
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g[i] = (float)tmp / 16384.0; /* convert raw value to G */
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}
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}
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/*
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*
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*/
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void lis3GetAcc(float *result) {
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void lis3GetAcc(float *result) {
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msg_t status = MSG_OK;
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msg_t status = MSG_OK;
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systime_t tmo = MS2ST(4);
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systime_t tmo = MS2ST(4);
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size_t i = 0;
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int16_t tmp;
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/* read in burst mode */
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memset(accel_rx_data, 0x55, sizeof(accel_rx_data));
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accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT;
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accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT;
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i2cAcquireBus(&I2CD1);
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i2cAcquireBus(&I2CD1);
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status = i2cMasterTransmitTimeout(&I2CD1, addr,
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status = i2cMasterTransmitTimeout(&I2CD1, addr,
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accel_tx_data, 1, accel_rx_data, 6, tmo);
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accel_tx_data, 1, accel_rx_data, 6, tmo);
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i2cReleaseBus(&I2CD1);
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i2cReleaseBus(&I2CD1);
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osalDbgCheck(MSG_OK == status);
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osalDbgCheck(MSG_OK == status);
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raw2g(accel_rx_data, result);
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for (i=0; i<3; i++){
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#if TEST_SINGLE_BYTE_READ
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tmp = accel_rx_data[i*2] + (accel_rx_data[i*2+1] << 8);
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float accel_single_byte_check[3];
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result[i] = tmp;
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const float check_threshold = 0.1;
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result[i] /= 16384; /* convert raw value to G */
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/* read data byte at a time */
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memset(accel_rx_data, 0x55, sizeof(accel_rx_data));
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accel_tx_data[0] = ACCEL_OUT_DATA;
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i2cAcquireBus(&I2CD1);
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for (size_t i=0; i<6; i++) {
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status = i2cMasterTransmitTimeout(&I2CD1, addr,
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accel_tx_data, 1, &accel_rx_data[i], 1, tmo);
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osalDbgCheck(MSG_OK == status);
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accel_tx_data[0]++;
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}
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}
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i2cReleaseBus(&I2CD1);
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raw2g(accel_rx_data, accel_single_byte_check);
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/* check results */
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for (size_t i=0; i<3; i++) {
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osalDbgCheck(fabsf(result[i] - accel_single_byte_check[i]) < check_threshold);
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}
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#endif /* TEST_SINGLE_BYTE_READ */
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}
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}
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