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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2291 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-10-25 18:48:13 +00:00
parent 63b9ef1051
commit 61922d458b
56 changed files with 1117 additions and 890 deletions
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19
docs/Doxyfile
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@ -631,19 +631,20 @@ INPUT = ../docs/src \
../os/ports/cosmic/STM8 \
../os/ports/RC/STM8 \
../os/hal \
../os/hal/dox \
../os/hal/include \
../os/hal/src \
../os/hal/templates \
../os/hal/platforms \
../os/hal/platforms/AT91SAM7 \
../os/hal/platforms/AVR \
../os/hal/platforms/LPC11xx \
../os/hal/platforms/LPC13xx \
../os/hal/platforms/LPC214x \
../os/hal/platforms/MSP430 \
../os/hal/platforms/SPC56x \
../os/hal/platforms/STM32 \
../os/hal/platforms/STM8 \
../os/hal/platforms/AT91SAM7/platform.dox \
../os/hal/platforms/AVR/platform.dox \
../os/hal/platforms/LPC11xx/platform.dox \
../os/hal/platforms/LPC13xx/platform.dox \
../os/hal/platforms/LPC214x/platform.dox \
../os/hal/platforms/MSP430/platform.dox \
../os/hal/platforms/SPC56x/platform.dox \
../os/hal/platforms/STM32/platform.dox \
../os/hal/platforms/STM8/platform.dox \
../os/various \
../test \
../ext/ext.dox

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os/hal/dox/adc.dox Normal file
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@ -0,0 +1,134 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup ADC ADC Driver
* @brief Generic ADC Driver.
* @details This module implements a generic ADC driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_ADC option
* must be enabled in @p halconf.h.
*
* @section adc_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="ADC_STOP\nLow Power"];
uninit [label="ADC_UNINIT", style="bold"];
ready [label="ADC_READY\nClock Enabled"];
active [label="ADC_ACTIVE\nConverting"];
complete [label="ADC_COMPLETE\nComplete"];
uninit -> stop [label="\n adcInit()", constraint=false];
stop -> ready [label="\nadcStart()"];
ready -> ready [label="\nadcStart()\nadcStopConversion()"];
ready -> stop [label="\nadcStop()"];
stop -> stop [label="\nadcStop()"];
ready -> active [label="\nadcStartConversion() (async)\nadcConvert() (sync)"];
active -> ready [label="\nadcStopConversion()\nsync return"];
active -> active [label="\nasync callback (half buffer)\nasync callback (full buffer circular)\n>acg_endcb<"];
active -> complete [label="\nasync callback (full buffer)\n>acg_endcb<"];
complete -> active [label="\nadcStartConversionI()\nthen\ncallback return()"];
complete -> ready [label="\ncallback return"];
}
* @enddot
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="ADC_STOP\nLow Power"];
uninit [label="ADC_UNINIT", style="bold"];
ready [label="ADC_READY\nClock Enabled"];
active [label="ADC_ACTIVE\nConverting"];
complete [label="ADC_COMPLETE\nComplete"];
uninit -> stop [label="\n adcInit()", constraint=false];
stop -> ready [label="\nadcStart()"];
ready -> ready [label="\nadcStart()\nadcStopConversion()"];
ready -> stop [label="\nadcStop()"];
stop -> stop [label="\nadcStop()"];
ready -> active [label="\nadcStartConversion() (async)\nadcConvert() (sync)"];
active -> ready [label="\nadcStopConversion()\nsync return"];
active -> active [label="\nasync callback (half buffer)\nasync callback (full buffer circular)\n>acg_endcb<"];
active -> complete [label="\nasync callback (full buffer)\n>acg_endcb<"];
complete -> active [label="\nadcStartConversionI()\nthen\ncallback return()"];
complete -> ready [label="\ncallback return"];
}
* @enddot
* @endif
*
* @section adc_2 ADC Operations
* The ADC driver is quite complex, an explanation of the terminology and of
* the operational details follows.
*
* @subsection adc_2_1 ADC Conversion Groups
* The @p ADCConversionGroup is the objects that specifies a physical
* conversion operation. This structure contains some standard fields and
* several implementation-dependent fields.<br>
* The standard fields define the CG mode, the number of channels belonging
* to the CG and the optional callbacks.<br>
* The implementation-dependent fields specify the physical ADC operation
* mode, the analog channels belonging to the group and any other
* implementation-specific setting. Usually the extra fields just mirror
* the physical ADC registers, please refer to the vendor's MCU Reference
* Manual for details about the available settings. Details are also available
* into the documentation of the ADC low level drivers and in the various
* sample applications.
*
* @subsection adc_2_2 ADC Conversion Modes
* The driver supports several conversion modes:
* - <b>One Shot</b>, the driver performs a single group conversion then stops.
* - <b>Linear Buffer</b>, the driver performs a series of group conversions
* then stops. This mode is like a one shot conversion repeated N times,
* the buffer pointer increases after each conversion. The buffer is
* organized as an S(CG)*N samples matrix, when S(CG) is the conversion
* group size (number of channels) and N is the buffer depth (number of
* repeated conversions).
* - <b>Circular Buffer</b>, much like the linear mode but the operation does
* not stop when the buffer is filled, it is automatically restarted
* with the buffer pointer wrapping back to the buffer base.
* .
* @subsection adc_2_3 ADC Callbacks
* The driver is able to invoke callbacks during the conversion process. A
* callback is invoked when the operation has been completed or, in circular
* mode, when the buffer has been filled and the operation is restarted. In
* linear and circular modes a callback is also invoked when the buffer is
* half filled.<br>
* The "half filled" and "filled" callbacks in circular mode allow to
* implement "streaming processing" of the sampled data, while the driver is
* busy filling one half of the buffer the application can process the
* other half, this allows for continuous interleaved operations.
*
* The driver is not thread safe for performance reasons, if you need to access
* the ADC bus from multiple threads then use the @p adcAcquireBus() and
* @p adcReleaseBus() APIs in order to gain exclusive access.
*
* @ingroup IO
*/

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup CAN CAN Driver
* @brief Generic CAN Driver.
* @details This module implements a generic CAN driver.
* @pre In order to use the CAN driver the @p CH_HAL_USE_CAN option
* must be enabled in @p halconf.h.
*
* @section can_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="CAN_STOP\nLow Power"];
uninit [label="CAN_UNINIT", style="bold"];
starting [label="CAN_STARTING\nInitializing"];
ready [label="CAN_READY\nClock Enabled"];
sleep [label="CAN_SLEEP\nLow Power"];
uninit -> stop [label=" canInit()", constraint=false];
stop -> stop [label="\ncanStop()"];
stop -> ready [label="\ncanStart()\n(fast implementation)"];
stop -> starting [label="\ncanStart()\n(slow implementation)"];
starting -> starting [label="\ncanStart()\n(other thread)"];
starting -> ready [label="\ninitialization complete\n(all threads)"];
ready -> stop [label="\ncanStop()"];
ready -> ready [label="\ncanStart()\ncanReceive()\ncanTransmit()"];
ready -> sleep [label="\ncanSleep()"];
sleep -> sleep [label="\ncanSleep()"];
sleep -> ready [label="\ncanWakeup()"];
sleep -> ready [label="\nhardware\nwakeup event"];
}
* @enddot
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="CAN_STOP\nLow Power"];
uninit [label="CAN_UNINIT", style="bold"];
starting [label="CAN_STARTING\nInitializing"];
ready [label="CAN_READY\nClock Enabled"];
sleep [label="CAN_SLEEP\nLow Power"];
uninit -> stop [label=" canInit()", constraint=false];
stop -> stop [label="\ncanStop()"];
stop -> ready [label="\ncanStart()\n(fast implementation)"];
stop -> starting [label="\ncanStart()\n(slow implementation)"];
starting -> starting [label="\ncanStart()\n(other thread)"];
starting -> ready [label="\ninitialization complete\n(all threads)"];
ready -> stop [label="\ncanStop()"];
ready -> ready [label="\ncanStart()\ncanReceive()\ncanTransmit()"];
ready -> sleep [label="\ncanSleep()"];
sleep -> sleep [label="\ncanSleep()"];
sleep -> ready [label="\ncanWakeup()"];
sleep -> ready [label="\nhardware\nwakeup event"];
}
* @enddot
* @endif
*
* @ingroup IO
*/

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup HAL HAL Driver
* @brief Hardware Abstraction Layer.
* @details The HAL driver performs the system initialization and includes
* the platform support code shared by the other drivers. This driver does
* contain any API function except for a general initialization function
* @p halInit() that must be invoked before any HAL service can be used,
* usually the HAL initialization should be performed immediately before the
* kernel initialization.<br>
* Some HAL driver implementations also offer a custom early clock
* setum function that can be invoked before the C runtime initialization
* in order to accellerate the startup time.
*
* @ingroup IO
*/

41
os/hal/dox/i2c.dox Normal file
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@ -0,0 +1,41 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup I2C I2C Driver
* @brief Generic I2C Driver.
* @details This module implements a generic I2C driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_I2C option
* must be enabled in @p halconf.h.
*
* @section i2c_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @else
* @endif
*
* The driver is not thread safe for performance reasons, if you need to access
* the I2C bus from multiple thread then use the @p i2cAcquireBus() and
* @p i2cReleaseBus() APIs in order to gain exclusive access.
*
* @ingroup IO
*/

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os/hal/dox/mac.dox Normal file
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@ -0,0 +1,29 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup MAC MAC Driver
* @brief Generic MAC driver.
* @details This module implements a generic interface for MAC (Media
* Access Control) drivers, as example Ethernet controllers.
* @pre In order to use the ADC driver the @p CH_HAL_USE_MAC option
* must be enabled in @p halconf.h.
*
* @ingroup IO
*/

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os/hal/dox/mmc_spi.dox Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup MMC_SPI MMC over SPI Driver
* @brief Generic MMC driver.
* @details This module implements a portable MMC driver that uses a SPI
* driver as physical layer.
* @pre In order to use the ADC driver the @p CH_HAL_USE_MMC_SPI option
* must be enabled in @p halconf.h.
*
* @section mmc_spi_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
any [label="Any State"];
stop2 [label="MMC_STOP\nLow Power"];
uninit [label="MMC_UNINIT", style="bold"];
stop [label="MMC_STOP\nLow Power"];
wait [label="MMC_WAIT\nWaiting Card"];
inserted [label="MMC_INSERTED\nCard Inserted"];
ready [label="MMC_READY\nCard Ready"];
reading [label="MMC_READING\nReading"];
writing [label="MMC_WRITING\nWriting"];
uninit -> stop [label="mmcInit()"];
stop -> wait [label="mmcStart()", constraint=false];
wait -> inserted [label="insertion (inserted event)"];
inserted -> inserted [label="mmcDisconnect()"];
inserted -> ready [label="mmcConnect()"];
ready -> ready [label="mmcConnect()"];
ready -> inserted [label="mmcDisconnect()"];
ready -> reading [label="mmcStartSequentialRead()"];
reading -> reading [label="mmcSequentialRead()"];
reading -> ready [label="mmcStopSequentialRead()"];
reading -> ready [label="read error"];
ready -> writing [label="mmcStartSequentialWrite()"];
writing -> writing [label="mmcSequentialWrite()"];
writing -> ready [label="mmcStopSequentialWrite()"];
writing -> ready [label="write error"];
inserted -> wait [label="removal (removed event)"];
ready -> wait [label="removal (removed event)"];
reading -> wait [label="removal (removed event)"];
writing -> wait [label="removal (removed event)"];
any -> stop2 [label="mmcStop()"];
}
* @enddot
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
any [label="Any State"];
stop2 [label="MMC_STOP\nLow Power"];
uninit [label="MMC_UNINIT", style="bold"];
stop [label="MMC_STOP\nLow Power"];
wait [label="MMC_WAIT\nWaiting Card"];
inserted [label="MMC_INSERTED\nCard Inserted"];
ready [label="MMC_READY\nCard Ready"];
reading [label="MMC_READING\nReading"];
writing [label="MMC_WRITING\nWriting"];
uninit -> stop [label="mmcInit()"];
stop -> wait [label="mmcStart()", constraint=false];
wait -> inserted [label="insertion (inserted event)"];
inserted -> inserted [label="mmcDisconnect()"];
inserted -> ready [label="mmcConnect()"];
ready -> ready [label="mmcConnect()"];
ready -> inserted [label="mmcDisconnect()"];
ready -> reading [label="mmcStartSequentialRead()"];
reading -> reading [label="mmcSequentialRead()"];
reading -> ready [label="mmcStopSequentialRead()"];
reading -> ready [label="read error"];
ready -> writing [label="mmcStartSequentialWrite()"];
writing -> writing [label="mmcSequentialWrite()"];
writing -> ready [label="mmcStopSequentialWrite()"];
writing -> ready [label="write error"];
inserted -> wait [label="removal (removed event)"];
ready -> wait [label="removal (removed event)"];
reading -> wait [label="removal (removed event)"];
writing -> wait [label="removal (removed event)"];
any -> stop2 [label="mmcStop()"];
}
* @enddot
* @endif
*
* The MMC drivers currently supports only cards with capacity up to 2GB
* and does not implement CRC checking. Hot plugging and removal are supported
* through kernel events.
*
* @ingroup IO
*/

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup PAL PAL Driver
* @brief I/O Ports Abstraction Layer
* @details This module defines an abstract interface for digital I/O ports.
* Note that most I/O ports functions are just macros. The macros
* have default software implementations that can be redefined in a
* PAL Low Level Driver if the target hardware supports special features like,
* as example, atomic bit set/reset/masking. Please refer to the ports specific
* documentation for details.<br>
* The @ref PAL has the advantage to make the access to the I/O ports platform
* independent and still be optimized for the specific architectures.<br>
* Note that the PAL Low Level Driver may also offer non standard macro and
* functions in order to support specific features but, of course, the use of
* such interfaces would not be portable. Such interfaces shall be marked with
* the architecture name inside the function names.
* @pre In order to use the ADC driver the @p CH_HAL_USE_PAL option
* must be enabled in @p halconf.h.
*
* @section pal_1 Implementation Rules
* In implementing a PAL Low Level Driver there are some rules/behaviors that
* should be respected.
*
* @subsection pal_1_1 Writing on input pads
* The behavior is not specified but there are implementations better than
* others, this is the list of possible implementations, preferred options
* are on top:
* -# The written value is not actually output but latched, should the pads
* be reprogrammed as outputs the value would be in effect.
* -# The write operation is ignored.
* -# The write operation has side effects, as example disabling/enabling
* pull up/down resistors or changing the pad direction. This scenario is
* discouraged, please try to avoid this scenario.
* .
* @subsection pal_1_2 Reading from output pads
* The behavior is not specified but there are implementations better than
* others, this is the list of possible implementations, preferred options
* are on top:
* -# The actual pads states are read (not the output latch).
* -# The output latch value is read (regardless of the actual pads states).
* -# Unspecified, please try to avoid this scenario.
* .
* @subsection pal_1_3 Writing unused or unimplemented port bits
* The behavior is not specified.
*
* @subsection pal_1_4 Reading from unused or unimplemented port bits
* The behavior is not specified.
*
* @subsection pal_1_5 Reading or writing on pins associated to other functionalities
* The behavior is not specified.
*
* @ingroup IO
*/

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup PWM PWM Driver
* @brief Generic PWM Driver.
* @details This module implements a generic PWM driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_PWM option
* must be enabled in @p halconf.h.
*
* @section pwm_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
uninit [label="PWM_UNINIT", style="bold"];
stop [label="PWM_STOP\nLow Power"];
ready [label="PWM_READY\nClock Enabled"];
uninit -> stop [label="pwmInit()"];
stop -> stop [label="pwmStop()"];
stop -> ready [label="pwmStart()"];
ready -> stop [label="pwmStop()"];
ready -> ready [label="pwmEnableChannel()\npwmDisableChannel()"];
}
* @enddot
*
* @section pwm_1 PWM Operations.
* This driver abstracts a generic PWM times composed of:
* - A main up counter.
* - A comparator register that resets the main counter to zero when the limit
* is reached. An optional callback can be generated when this happens.
* - An array of @p PWM_CHANNELS PWM channels, each channel has an output,
* a comparator and is able to invoke an optional callback when a comparator
* match with the main counter happens.
* .
* A PWM channel output can be in two different states:
* - <b>IDLE</b>, when the channel is disabled or after a match occurred.
* - <b>ACTIVE</b>, when the channel is enabled and a match didn't occur yet
* in the current PWM cycle.
* .
* Note that the two states can be associated to both logical zero or one in
* the @p PWMChannelConfig structure.
*
* @ingroup IO
*/

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os/hal/dox/serial.dox Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup SERIAL Serial Driver
* @brief Generic Serial Driver.
* @details This module implements a generic full duplex serial driver. The
* driver implements a @p SerialDriver interface and uses I/O Queues for
* communication between the upper and the lower driver. Event flags are used
* to notify the application about incoming data, outgoing data and other I/O
* events.<br>
* The module also contains functions that make the implementation of the
* interrupt service routines much easier.
* @pre In order to use the ADC driver the @p CH_HAL_USE_SERIAL option
* must be enabled in @p halconf.h.
*
* @ingroup IO
*/

89
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@ -0,0 +1,89 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup SPI SPI Driver
* @brief Generic SPI Driver.
* @details This module implements a generic SPI driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_SPI option
* must be enabled in @p halconf.h.
*
* @section spi_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="SPI_STOP\nLow Power"];
uninit [label="SPI_UNINIT", style="bold"];
ready [label="SPI_READY\nClock Enabled"];
active [label="SPI_ACTIVE\nBus Active"];
complete [label="SPI_COMPLETE\nComplete"];
uninit -> stop [label="\n spiInit()", constraint=false];
stop -> ready [label="\nspiStart()"];
ready -> ready [label="\nspiSelect()\nspiUnselect()\nspiStart()"];
ready -> stop [label="\nspiStop()"];
stop -> stop [label="\nspiStop()"];
ready -> active [label="\nspiStartXXXI() (async)\nspiXXX() (sync)"];
active -> ready [label="\nsync return"];
active -> complete [label="\nasync callback\n>spc_endcb<"];
complete -> active [label="\nspiStartXXXI() (async)\nthen\ncallback return"];
complete -> ready [label="\ncallback return"];
}
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="SPI_STOP\nLow Power"];
uninit [label="SPI_UNINIT", style="bold"];
ready [label="SPI_READY\nClock Enabled"];
active [label="SPI_ACTIVE\nBus Active"];
complete [label="SPI_COMPLETE\nComplete"];
uninit -> stop [label="\n spiInit()", constraint=false];
stop -> ready [label="\nspiStart()"];
ready -> ready [label="\nspiSelect()\nspiUnselect()\nspiStart()"];
ready -> stop [label="\nspiStop()"];
stop -> stop [label="\nspiStop()"];
ready -> active [label="\nspiStartXXX() (async)\nspiXXX() (sync)"];
active -> ready [label="\nsync return"];
active -> complete [label="\nasync callback\n>spc_endcb<"];
complete -> active [label="\nspiStartXXXI() (async)\nthen\ncallback return"];
complete -> ready [label="\ncallback return"];
}
* @enddot
* @endif
*
* The driver is not thread safe for performance reasons, if you need to access
* the SPI bus from multiple threads then use the @p spiAcquireBus() and
* @p spiReleaseBus() APIs in order to gain exclusive access.
*
* @ingroup IO
*/

123
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@ -0,0 +1,123 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup UART UART Driver
* @brief Generic UART Driver.
* @details This driver abstracts a generic UART peripheral, the API is
* designed to be:
* - Unbuffered and copy-less, transfers are always directly performed
* from/to the application-level buffers without extra copy operations.
* - Asynchronous, the API is always non blocking.
* - Callbacks capable, operations completion and other events are notified
* via callbacks.
* .
* Special hardware features like deep hardware buffers, DMA transfers
* are hidden to the user but fully supportable by the low level
* implementations.<br>
* This driver model is best used where communication events are meant to
* drive an higher level state machine, as example:
* - RS485 drivers.
* - Multipoint network drivers.
* - Serial protocol decoders.
* .
* If your application requires a synchronoyus buffered driver then the
* @ref SERIAL should be used instead.
* @pre In order to use the ADC driver the @p CH_HAL_USE_UART option
* must be enabled in @p halconf.h.
*
* @section uart_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
uninit [label="UART_UNINIT", style="bold"];
stop [label="UART_STOP\nLow Power"];
ready [label="UART_READY\nClock Enabled"];
uninit -> stop [label="\nuartInit()"];
stop -> ready [label="\nuartStart()"];
ready -> ready [label="\nuartStart()"];
ready -> stop [label="\nuartStop()"];
stop -> stop [label="\nuartStop()"];
}
* @enddot
*
* @subsection uart_1_1 Transmitter sub State Machine
* The follow diagram describes the transmitter state machine, this diagram
* is valid while the driver is in the @p UART_READY state. This state
* machine is automatically reset to the @p TX_IDLE state each time the
* driver enters the @p UART_READY state.
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
tx_idle [label="TX_IDLE", style="bold"];
tx_active [label="TX_ACTIVE"];
tx_complete [label="TX_COMPLETE"];
tx_fatal [label="Fatal Error", style="bold"];
tx_idle -> tx_active [label="\nuartStartSend()"];
tx_idle -> tx_idle [label="\nuartStopSend()\n>uc_txend2<"];
tx_active -> tx_complete [label="\nbuffer transmitted\n>uc_txend1<"];
tx_active -> tx_idle [label="\nuartStopSend()"];
tx_active -> tx_fatal [label="\nuartStartSend()"];
tx_complete -> tx_active [label="\nuartStartSendI()\nthen\ncallback return"];
tx_complete -> tx_idle [label="\ncallback return"];
}
* @enddot
*
* @subsection uart_1_2 Receiver sub State Machine
* The follow diagram describes the receiver state machine, this diagram
* is valid while the driver is in the @p UART_READY state. This state
* machine is automatically reset to the @p RX_IDLE state each time the
* driver enters the @p UART_READY state.
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
rx_idle [label="RX_IDLE", style="bold"];
rx_active [label="RX_ACTIVE"];
rx_complete [label="RX_COMPLETE"];
rx_fatal [label="Fatal Error", style="bold"];
rx_idle -> rx_idle [label="\nuartStopReceive()\n>uc_rxchar<\n>uc_rxerr<"];
rx_idle -> rx_active [label="\nuartStartReceive()"];
rx_active -> rx_complete [label="\nbuffer filled\n>uc_rxend<"];
rx_active -> rx_idle [label="\nuartStopReceive()"];
rx_active -> rx_active [label="\nreceive error\n>uc_rxerr<"];
rx_active -> rx_fatal [label="\nuartStartReceive()"];
rx_complete -> rx_active [label="\nuartStartReceiveI()\nthen\ncallback return"];
rx_complete -> rx_idle [label="\ncallback return"];
}
* @enddot
*
* @ingroup IO
*/

621
os/hal/hal.dox
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@ -77,624 +77,3 @@
*
* @ingroup IO
*/
/**
* @defgroup HAL HAL Driver
* @brief Hardware Abstraction Layer.
* @details The HAL driver performs the system initialization and includes
* the platform support code shared by the other drivers. This driver does
* contain any API function except for a general initialization function
* @p halInit() that must be invoked before any HAL service can be used,
* usually the HAL initialization is performed immediately before the
* kernel initialization.
*
* @ingroup IO
*/
/**
* @defgroup HAL_LLD HAL Low Level Driver
* @brief @ref HAL low level driver template.
*
* @ingroup HAL
*/
/**
* @defgroup PAL PAL Driver
* @brief I/O Ports Abstraction Layer
* @details This module defines an abstract interface for digital I/O ports.
* Note that most I/O ports functions are just macros. The macros
* have default software implementations that can be redefined in a
* @ref PAL_LLD if the target hardware supports special features like, as
* example, atomic bit set/reset/masking. Please refer to the ports specific
* documentation for details.<br>
* The @ref PAL has the advantage to make the access to the I/O ports platform
* independent and still be optimized for the specific architectures.<br>
* Note that the @ref PAL_LLD may also offer non standard macro and functions
* in order to support specific features but, of course, the use of such
* interfaces would not be portable. Such interfaces shall be marked with
* the architecture name inside the function names.
* @pre In order to use the ADC driver the @p CH_HAL_USE_PAL option
* must be enabled in @p halconf.h.
*
* @section pal_1 Implementation Rules
* In implementing an @ref PAL_LLD there are some rules/behaviors that
* should be respected.
*
* @subsection pal_1_1 Writing on input pads
* The behavior is not specified but there are implementations better than
* others, this is the list of possible implementations, preferred options
* are on top:
* -# The written value is not actually output but latched, should the pads
* be reprogrammed as outputs the value would be in effect.
* -# The write operation is ignored.
* -# The write operation has side effects, as example disabling/enabling
* pull up/down resistors or changing the pad direction. This scenario is
* discouraged, please try to avoid this scenario.
* .
* @subsection pal_1_2 Reading from output pads
* The behavior is not specified but there are implementations better than
* others, this is the list of possible implementations, preferred options
* are on top:
* -# The actual pads states are read (not the output latch).
* -# The output latch value is read (regardless of the actual pads states).
* -# Unspecified, please try to avoid this scenario.
* .
* @subsection pal_1_3 Writing unused or unimplemented port bits
* The behavior is not specified.
*
* @subsection pal_1_4 Reading from unused or unimplemented port bits
* The behavior is not specified.
*
* @subsection pal_1_5 Reading or writing on pins associated to other functionalities
* The behavior is not specified.
*
* @ingroup IO
*/
/**
* @defgroup PAL_LLD PAL Low Level Driver
* @brief @ref PAL low level driver template.
* @details This file is a template for an I/O port low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref PAL_LLD entry points.
*
* @ingroup PAL
*/
/**
* @defgroup SERIAL Serial Driver
* @brief Generic Serial Driver.
* @details This module implements a generic full duplex serial driver. The
* driver implements a @p SerialDriver interface and uses I/O Queues for
* communication between the upper and the lower driver. Event flags are used
* to notify the application about incoming data, outgoing data and other I/O
* events.<br>
* The module also contains functions that make the implementation of the
* interrupt service routines much easier.
* @pre In order to use the ADC driver the @p CH_HAL_USE_SERIAL option
* must be enabled in @p halconf.h.
*
* @ingroup IO
*/
/**
* @defgroup SERIAL_LLD Serial Low Level Driver
* @brief @ref SERIAL low level driver template.
* @details This file is a template for a serial low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref SERIAL_LLD entry points.
*
* @ingroup SERIAL
*/
/**
* @defgroup I2C I2C Driver
* @brief Generic I2C Driver.
* @details This module implements a generic I2C driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_I2C option
* must be enabled in @p halconf.h.
*
* @section i2c_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @else
* @endif
*
* The driver is not thread safe for performance reasons, if you need to access
* the I2C bus from multiple threads then use the @p i2cAcquireBus() and
* @p i2cReleaseBus() APIs in order to gain exclusive access.
*
* @ingroup IO
*/
/**
* @defgroup I2C_LLD I2C Low Level Driver
* @brief @ref I2C low level driver template.
* @details This file is a template for an I2C low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref I2C_LLD entry points.
*
* @ingroup I2C
*/
/**
* @defgroup SPI SPI Driver
* @brief Generic SPI Driver.
* @details This module implements a generic SPI driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_SPI option
* must be enabled in @p halconf.h.
*
* @section spi_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="SPI_STOP\nLow Power"];
uninit [label="SPI_UNINIT", style="bold"];
ready [label="SPI_READY\nClock Enabled"];
active [label="SPI_ACTIVE\nBus Active"];
complete [label="SPI_COMPLETE\nComplete"];
uninit -> stop [label="\n spiInit()", constraint=false];
stop -> ready [label="\nspiStart()"];
ready -> ready [label="\nspiSelect()\nspiUnselect()\nspiStart()"];
ready -> stop [label="\nspiStop()"];
stop -> stop [label="\nspiStop()"];
ready -> active [label="\nspiStartXXXI() (async)\nspiXXX() (sync)"];
active -> ready [label="\nsync return"];
active -> complete [label="\nasync callback\n>spc_endcb<"];
complete -> active [label="\nspiStartXXXI() (async)\nthen\ncallback return"];
complete -> ready [label="\ncallback return"];
}
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="SPI_STOP\nLow Power"];
uninit [label="SPI_UNINIT", style="bold"];
ready [label="SPI_READY\nClock Enabled"];
active [label="SPI_ACTIVE\nBus Active"];
complete [label="SPI_COMPLETE\nComplete"];
uninit -> stop [label="\n spiInit()", constraint=false];
stop -> ready [label="\nspiStart()"];
ready -> ready [label="\nspiSelect()\nspiUnselect()\nspiStart()"];
ready -> stop [label="\nspiStop()"];
stop -> stop [label="\nspiStop()"];
ready -> active [label="\nspiStartXXX() (async)\nspiXXX() (sync)"];
active -> ready [label="\nsync return"];
active -> complete [label="\nasync callback\n>spc_endcb<"];
complete -> active [label="\nspiStartXXXI() (async)\nthen\ncallback return"];
complete -> ready [label="\ncallback return"];
}
* @enddot
* @endif
*
* The driver is not thread safe for performance reasons, if you need to access
* the SPI bus from multiple threads then use the @p spiAcquireBus() and
* @p spiReleaseBus() APIs in order to gain exclusive access.
*
* @ingroup IO
*/
/**
* @defgroup SPI_LLD SPI Low Level Driver
* @brief @ref SPI low level driver template.
* @details This file is a template for an SPI low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref SPI_LLD entry points.
*
* @ingroup SPI
*/
/**
* @defgroup ADC ADC Driver
* @brief Generic ADC Driver.
* @details This module implements a generic ADC driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_ADC option
* must be enabled in @p halconf.h.
*
* @section adc_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="ADC_STOP\nLow Power"];
uninit [label="ADC_UNINIT", style="bold"];
ready [label="ADC_READY\nClock Enabled"];
active [label="ADC_ACTIVE\nConverting"];
complete [label="ADC_COMPLETE\nComplete"];
uninit -> stop [label="\n adcInit()", constraint=false];
stop -> ready [label="\nadcStart()"];
ready -> ready [label="\nadcStart()\nadcStopConversion()"];
ready -> stop [label="\nadcStop()"];
stop -> stop [label="\nadcStop()"];
ready -> active [label="\nadcStartConversion() (async)\nadcConvert() (sync)"];
active -> ready [label="\nadcStopConversion()\nsync return"];
active -> active [label="\nasync callback (half buffer)\nasync callback (full buffer circular)\n>acg_endcb<"];
active -> complete [label="\nasync callback (full buffer)\n>acg_endcb<"];
complete -> active [label="\nadcStartConversionI()\nthen\ncallback return()"];
complete -> ready [label="\ncallback return"];
}
* @enddot
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="ADC_STOP\nLow Power"];
uninit [label="ADC_UNINIT", style="bold"];
ready [label="ADC_READY\nClock Enabled"];
active [label="ADC_ACTIVE\nConverting"];
complete [label="ADC_COMPLETE\nComplete"];
uninit -> stop [label="\n adcInit()", constraint=false];
stop -> ready [label="\nadcStart()"];
ready -> ready [label="\nadcStart()\nadcStopConversion()"];
ready -> stop [label="\nadcStop()"];
stop -> stop [label="\nadcStop()"];
ready -> active [label="\nadcStartConversion() (async)\nadcConvert() (sync)"];
active -> ready [label="\nadcStopConversion()\nsync return"];
active -> active [label="\nasync callback (half buffer)\nasync callback (full buffer circular)\n>acg_endcb<"];
active -> complete [label="\nasync callback (full buffer)\n>acg_endcb<"];
complete -> active [label="\nadcStartConversionI()\nthen\ncallback return()"];
complete -> ready [label="\ncallback return"];
}
* @enddot
* @endif
*
* @section adc_2 ADC Operations
* The ADC driver is quite complex, an explanation of the terminology and of
* the operational details follows.
*
* @subsection adc_2_1 ADC Conversion Groups
* The @p ADCConversionGroup is the objects that specifies a physical
* conversion operation. This structure contains some standard fields and
* several implementation-dependent fields.<br>
* The standard fields define the CG mode, the number of channels belonging
* to the CG and the optional callbacks.<br>
* The implementation-dependent fields specify the physical ADC operation
* mode, the analog channels belonging to the group and any other
* implementation-specific setting. Usually the extra fields just mirror
* the physical ADC registers, please refer to the vendor's MCU Reference
* Manual for details about the available settings. Details are also available
* into the documentation of the ADC low level drivers and in the various
* sample applications.
*
* @subsection adc_2_2 ADC Conversion Modes
* The driver supports several conversion modes:
* - <b>One Shot</b>, the driver performs a single group conversion then stops.
* - <b>Linear Buffer</b>, the driver performs a series of group conversions
* then stops. This mode is like a one shot conversion repeated N times,
* the buffer pointer increases after each conversion. The buffer is
* organized as an S(CG)*N samples matrix, when S(CG) is the conversion
* group size (number of channels) and N is the buffer depth (number of
* repeated conversions).
* - <b>Circular Buffer</b>, much like the linear mode but the operation does
* not stop when the buffer is filled, it is automatically restarted
* with the buffer pointer wrapping back to the buffer base.
* .
* @subsection adc_2_3 ADC Callbacks
* The driver is able to invoke callbacks during the conversion process. A
* callback is invoked when the operation has been completed or, in circular
* mode, when the buffer has been filled and the operation is restarted. In
* linear and circular modes a callback is also invoked when the buffer is
* half filled.<br>
* The "half filled" and "filled" callbacks in circular mode allow to
* implement "streaming processing" of the sampled data, while the driver is
* busy filling one half of the buffer the application can process the
* other half, this allows for continuous interleaved operations.
*
* @ingroup IO
*/
/**
* @defgroup ADC_LLD ADC Low Level Driver
* @brief @ref ADC low level driver template.
* @details This file is a template for an ADC low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref ADC_LLD entry points.
*
* @ingroup ADC
*/
/**
* @defgroup CAN CAN Driver
* @brief Generic CAN Driver.
* @details This module implements a generic CAN driver.
* @pre In order to use the CAN driver the @p CH_HAL_USE_CAN option
* must be enabled in @p halconf.h.
*
* @section can_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="CAN_STOP\nLow Power"];
uninit [label="CAN_UNINIT", style="bold"];
starting [label="CAN_STARTING\nInitializing"];
ready [label="CAN_READY\nClock Enabled"];
sleep [label="CAN_SLEEP\nLow Power"];
uninit -> stop [label=" canInit()", constraint=false];
stop -> stop [label="\ncanStop()"];
stop -> ready [label="\ncanStart()\n(fast implementation)"];
stop -> starting [label="\ncanStart()\n(slow implementation)"];
starting -> starting [label="\ncanStart()\n(other thread)"];
starting -> ready [label="\ninitialization complete\n(all threads)"];
ready -> stop [label="\ncanStop()"];
ready -> ready [label="\ncanStart()\ncanReceive()\ncanTransmit()"];
ready -> sleep [label="\ncanSleep()"];
sleep -> sleep [label="\ncanSleep()"];
sleep -> ready [label="\ncanWakeup()"];
sleep -> ready [label="\nhardware\nwakeup event"];
}
* @enddot
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
stop [label="CAN_STOP\nLow Power"];
uninit [label="CAN_UNINIT", style="bold"];
starting [label="CAN_STARTING\nInitializing"];
ready [label="CAN_READY\nClock Enabled"];
sleep [label="CAN_SLEEP\nLow Power"];
uninit -> stop [label=" canInit()", constraint=false];
stop -> stop [label="\ncanStop()"];
stop -> ready [label="\ncanStart()\n(fast implementation)"];
stop -> starting [label="\ncanStart()\n(slow implementation)"];
starting -> starting [label="\ncanStart()\n(other thread)"];
starting -> ready [label="\ninitialization complete\n(all threads)"];
ready -> stop [label="\ncanStop()"];
ready -> ready [label="\ncanStart()\ncanReceive()\ncanTransmit()"];
ready -> sleep [label="\ncanSleep()"];
sleep -> sleep [label="\ncanSleep()"];
sleep -> ready [label="\ncanWakeup()"];
sleep -> ready [label="\nhardware\nwakeup event"];
}
* @enddot
* @endif
*
* @ingroup IO
*/
/**
* @defgroup CAN_LLD CAN Low Level Driver
* @brief @ref CAN low level driver template.
* @details This file is a template for a CAN low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref CAN_LLD entry points.
*
* @ingroup CAN
*/
/**
* @defgroup PWM PWM Driver
* @brief Generic PWM Driver.
* @details This module implements a generic PWM driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_PWM option
* must be enabled in @p halconf.h.
*
* @section pwm_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
uninit [label="PWM_UNINIT", style="bold"];
stop [label="PWM_STOP\nLow Power"];
ready [label="PWM_READY\nClock Enabled"];
uninit -> stop [label="pwmInit()"];
stop -> stop [label="pwmStop()"];
stop -> ready [label="pwmStart()"];
ready -> stop [label="pwmStop()"];
ready -> ready [label="pwmEnableChannel()\npwmDisableChannel()"];
}
* @enddot
*
* @section pwm_1 PWM Operations.
* This driver abstracts a generic PWM times composed of:
* - A main up counter.
* - A comparator register that resets the main counter to zero when the limit
* is reached. An optional callback can be generated when this happens.
* - An array of @p PWM_CHANNELS PWM channels, each channel has an output,
* a comparator and is able to invoke an optional callback when a comparator
* match with the main counter happens.
* .
* A PWM channel output can be in two different states:
* - <b>IDLE</b>, when the channel is disabled or after a match occurred.
* - <b>ACTIVE</b>, when the channel is enabled and a match didn't occur yet
* in the current PWM cycle.
* .
* Note that the two states can be associated to both logical zero or one in
* the @p PWMChannelConfig structure.
*
* @ingroup IO
*/
/**
* @defgroup PWM_LLD PWM Low Level Driver
* @brief @ref PWM low level driver template.
* @details This file is a template for a PWM low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref PWM_LLD entry points.
*
* @ingroup PWM
*/
/**
* @defgroup MAC MAC Driver
* @brief Generic MAC driver.
* @details This module implements a generic interface for MAC (Media
* Access Control) drivers, as example Ethernet controllers.
* @pre In order to use the ADC driver the @p CH_HAL_USE_MAC option
* must be enabled in @p halconf.h.
*
* @ingroup IO
*/
/**
* @defgroup MAC_LLD MAC Low Level Driver
* @brief @ref MAC low level driver template.
* @details This file is a template for a MAC low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref MAC_LLD entry points.
*
* @ingroup MAC
*/
/**
* @defgroup UART UART Driver
* @brief Generic UART Driver.
* @details This driver abstracts a generic UART peripheral, the API is
* designed to be:
* - Unbuffered and copy-less, transfers are always directly performed
* from/to the application-level buffers without extra copy operations.
* - Asynchronous, the API is always non blocking.
* - Callbacks capable, operations completion and other events are notified
* via callbacks.
* .
* Special hardware features like deep hardware buffers, DMA transfers
* are hidden to the user but fully supportable by the low level
* implementations.<br>
* This driver model is best used where communication events are meant to
* drive an higher level state machine, as example:
* - RS485 drivers.
* - Multipoint network drivers.
* - Serial protocol decoders.
* .
* If your application requires a synchronoyus buffered driver then the
* @ref SERIAL should be used instead.
* @pre In order to use the ADC driver the @p CH_HAL_USE_UART option
* must be enabled in @p halconf.h.
*
* @section uart_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
* functionalities can be used in any moment, any transition not explicitly
* shown in the following diagram has to be considered an error and shall
* be captured by an assertion (if enabled).
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
uninit [label="UART_UNINIT", style="bold"];
stop [label="UART_STOP\nLow Power"];
ready [label="UART_READY\nClock Enabled"];
uninit -> stop [label="\nuartInit()"];
stop -> ready [label="\nuartStart()"];
ready -> ready [label="\nuartStart()"];
ready -> stop [label="\nuartStop()"];
stop -> stop [label="\nuartStop()"];
}
* @enddot
*
* @subsection uart_1_1 Transmitter sub State Machine
* The follow diagram describes the transmitter state machine, this diagram
* is valid while the driver is in the @p UART_READY state. This state
* machine is automatically reset to the @p TX_IDLE state each time the
* driver enters the @p UART_READY state.
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
tx_idle [label="TX_IDLE", style="bold"];
tx_active [label="TX_ACTIVE"];
tx_complete [label="TX_COMPLETE"];
tx_fatal [label="Fatal Error", style="bold"];
tx_idle -> tx_active [label="\nuartStartSend()"];
tx_idle -> tx_idle [label="\nuartStopSend()\n>uc_txend2<"];
tx_active -> tx_complete [label="\nbuffer transmitted\n>uc_txend1<"];
tx_active -> tx_idle [label="\nuartStopSend()"];
tx_active -> tx_fatal [label="\nuartStartSend()"];
tx_complete -> tx_active [label="\nuartStartSendI()\nthen\ncallback return"];
tx_complete -> tx_idle [label="\ncallback return"];
}
* @enddot
*
* @subsection uart_1_2 Receiver sub State Machine
* The follow diagram describes the receiver state machine, this diagram
* is valid while the driver is in the @p UART_READY state. This state
* machine is automatically reset to the @p RX_IDLE state each time the
* driver enters the @p UART_READY state.
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Helvetica, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Helvetica, fontsize=8];
rx_idle [label="RX_IDLE", style="bold"];
rx_active [label="RX_ACTIVE"];
rx_complete [label="RX_COMPLETE"];
rx_fatal [label="Fatal Error", style="bold"];
rx_idle -> rx_idle [label="\nuartStopReceive()\n>uc_rxchar<\n>uc_rxerr<"];
rx_idle -> rx_active [label="\nuartStartReceive()"];
rx_active -> rx_complete [label="\nbuffer filled\n>uc_rxend<"];
rx_active -> rx_idle [label="\nuartStopReceive()"];
rx_active -> rx_active [label="\nreceive error\n>uc_rxerr<"];
rx_active -> rx_fatal [label="\nuartStartReceive()"];
rx_complete -> rx_active [label="\nuartStartReceiveI()\nthen\ncallback return"];
rx_complete -> rx_idle [label="\ncallback return"];
}
* @enddot
*
* @ingroup IO
*/
/**
* @defgroup UART_LLD UART Low Level Driver
* @brief @ref UART low level driver template.
* @details This file is a template for a UART low level driver not an
* actual implementation. This template is only meant as documentation of
* a generic @ref UART_LLD entry points.
*
* @ingroup UART
*/

2
os/hal/platforms/STM32/adc_lld.c
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@ -21,7 +21,7 @@
* @file STM32/adc_lld.c
* @brief STM32 ADC subsystem low level driver source.
*
* @addtogroup STM32_ADC
* @addtogroup ADC
* @{
*/

2
os/hal/platforms/STM32/adc_lld.h
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@ -21,7 +21,7 @@
* @file STM32/adc_lld.h
* @brief STM32 ADC subsystem low level driver header.
*
* @addtogroup STM32_ADC
* @addtogroup ADC
* @{
*/

2
os/hal/platforms/STM32/can_lld.c
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@ -21,7 +21,7 @@
* @file STM32/can_lld.c
* @brief STM32 CAN subsystem low level driver source.
*
* @addtogroup STM32_CAN
* @addtogroup CAN
* @{
*/

2
os/hal/platforms/STM32/can_lld.h
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@ -21,7 +21,7 @@
* @file STM32/can_lld.h
* @brief STM32 CAN subsystem low level driver header.
*
* @addtogroup STM32_CAN
* @addtogroup CAN
* @{
*/

2
os/hal/platforms/STM32/hal_lld.c
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@ -21,7 +21,7 @@
* @file STM32/hal_lld.c
* @brief STM32 HAL subsystem low level driver source.
*
* @addtogroup STM32_HAL
* @addtogroup HAL
* @{
*/

2
os/hal/platforms/STM32/hal_lld.h
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@ -21,7 +21,7 @@
* @file STM32/hal_lld.h
* @brief STM32 HAL subsystem low level driver header.
*
* @addtogroup STM32_HAL
* @addtogroup HAL
* @{
*/

7
os/hal/platforms/STM32/hal_lld_f103.h
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@ -17,6 +17,13 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup STM32F103_HAL STM32F103 HAL Support
* @brief HAL support for STM32 LD, MD and HD families.
*
* @ingroup HAL
*/
/**
* @file STM32/hal_lld_f103.h
* @brief STM32F103 HAL subsystem low level driver header.

7
os/hal/platforms/STM32/hal_lld_f105_f107.h
View File

@ -17,6 +17,13 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup STM32F10X_CL_HAL STM32F105/F107 HAL Support
* @brief HAL support for STM32 CL (Connectivity Line) family.
*
* @ingroup HAL
*/
/**
* @file STM32/hal_lld_f105_f107.h
* @brief STM32F10x Connectivity Line HAL subsystem low level driver header.

2
os/hal/platforms/STM32/pal_lld.c
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@ -21,7 +21,7 @@
* @file STM32/pal_lld.c
* @brief STM32 GPIO low level driver code.
*
* @addtogroup STM32_PAL
* @addtogroup PAL
* @{
*/

2
os/hal/platforms/STM32/pal_lld.h
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@ -21,7 +21,7 @@
* @file STM32/pal_lld.h
* @brief STM32 GPIO low level driver header.
*
* @addtogroup STM32_PAL
* @addtogroup PAL
* @{
*/

202
os/hal/platforms/STM32/platform.dox
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@ -25,9 +25,44 @@
*/
/**
* @defgroup STM32_HAL STM32 HAL Support
* @brief HAL support.
* @details The STM32 HAL support is responsible for system initialization.
* @defgroup STM32_ADC STM32 ADC Support
* @brief ADC peripheral support.
* @details The ADC driver supports the STM32 ADCs using DMA channels for
* improved performance.
*
* @section stm32_adc_1 Supported HW resources
* - ADC1.
* .
* @section stm32_adc_2 STM32 ADC driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Streaming conversion using DMA for maximum performance.
* - Programmable ADC interrupt priority level.
* - Programmable DMA bus priority for each DMA channel.
* - Programmable DMA interrupt priority for each DMA channel.
* - Programmable DMA error hook for each DMA channel.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_CAN STM32 CAN Support
* @brief CAN peripheral support.
*
* @section stm32_can_1 Supported HW resources
* - bxCAN1.
* .
* @section stm32_can_2 STM32 CAN driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Support for bxCAN sleep mode.
* - Programmable bxCAN interrupts priority level.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_HAL STM32 Clock Support
* @brief Clock support.
* @details The STM32 Clock support is responsible for system initialization.
*
* @section stm32_hal_1 Supported HW resources
* - PLL1.
@ -49,17 +84,20 @@
*/
/**
* @defgroup STM32F103_HAL STM32F103 HAL Support
* @brief HAL support for STM32 LD, MD and HD families.
* @defgroup STM32_DMA STM32 DMA Support
* @brief DMA helper driver.
*
* @ingroup STM32_HAL
*/
/**
* @defgroup STM32F10X_CL_HAL STM32F105/F107 HAL Support
* @brief HAL support for STM32 CL (Connectivity Line) family.
*
* @ingroup STM32_HAL
* @section stm32_dma_1 Supported HW resources
* The DMA driver can support any of the following hardware resources:
* - DMA1.
* - DMA2.
* .
* @section stm32_dma_2 STM32 DMA driver implementation features
* - Automatic DMA clock stop when not in use by other drivers.
* - Exports helper functions/macros to the other drivers that share the
* DMA resource.
* .
* @ingroup STM32
*/
/**
@ -112,6 +150,49 @@
* @ingroup STM32
*/
/**
* @defgroup STM32_PWM STM32 PWM Support
* @brief TIMx peripherals as PWM generators support.
*
* @section stm32_pwm_1 Supported HW resources
* - TIM1.
* - TIM2.
* - TIM3.
* - TIM4.
* .
* @section stm32_pwm_2 STM32 PWM driver implementation features
* - Each timer can be independently enabled and programmed. Unused
* peripherals are left in low power mode.
* - Four independent PWM channels per timer.
* - Programmable TIMx interrupts priority level.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_SPI STM32 SPI Support
* @brief SPI peripherals support.
* @details The SPI driver supports the STM32 SPIs using DMA channels for
* improved performance.
*
* @section stm32_spi_1 Supported HW resources
* - SPI1.
* - SPI2.
* - SPI3.
* .
* @section stm32_spi_2 STM32 SPI driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Each SPI can be independently enabled and programmed. Unused
* peripherals are left in low power mode.
* - Programmable interrupt priority levels for each SPI.
* - DMA is used for receiving and transmitting.
* - Programmable DMA bus priority for each DMA channel.
* - Programmable DMA interrupt priority for each DMA channel.
* - Programmable DMA error hook for each DMA channel.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_SERIAL STM32 USART Support (buffered)
* @brief UART/USART peripherals support.
@ -156,98 +237,3 @@
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_DMA STM32 DMA Support
* @brief DMA helper driver.
*
* @section stm32_dma_1 Supported HW resources
* The DMA driver can support any of the following hardware resources:
* - DMA1.
* - DMA2.
* .
* @section stm32_dma_2 STM32 DMA driver implementation features
* - Automatic DMA clock stop when not in use by other drivers.
* - Exports helper functions/macros to the other drivers that share the
* DMA resource.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_ADC STM32 ADC Support
* @brief ADC peripherals support.
* @details The ADC driver supports the STM32 ADCs using DMA channels for
* improved performance.
*
* @section stm32_adc_1 Supported HW resources
* - ADC1.
* .
* @section stm32_adc_2 STM32 ADC driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Streaming conversion using DMA for maximum performance.
* - Programmable ADC interrupt priority level.
* - Programmable DMA bus priority for each DMA channel.
* - Programmable DMA interrupt priority for each DMA channel.
* - Programmable DMA error hook for each DMA channel.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_CAN STM32 CAN Support
* @brief CAN peripheral support.
*
* @section stm32_can_1 Supported HW resources
* - bxCAN1.
* .
* @section stm32_can_2 STM32 CAN driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Support for bxCAN sleep mode.
* - Programmable bxCAN interrupts priority level.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_PWM STM32 PWM Support
* @brief TIMx peripherals as PWM generators support.
*
* @section stm32_pwm_1 Supported HW resources
* - TIM1.
* - TIM2.
* - TIM3.
* - TIM4.
* .
* @section stm32_pwm_2 STM32 PWM driver implementation features
* - Each timer can be independently enabled and programmed. Unused
* peripherals are left in low power mode.
* - Four independent PWM channels per timer.
* - Programmable TIMx interrupts priority level.
* .
* @ingroup STM32
*/
/**
* @defgroup STM32_SPI STM32 SPI Support
* @brief SPI peripherals support.
* @details The SPI driver supports the STM32 SPIs using DMA channels for
* improved performance.
*
* @section stm32_spi_1 Supported HW resources
* - SPI1.
* - SPI2.
* - SPI3.
* .
* @section stm32_spi_2 STM32 SPI driver implementation features
* - Clock stop for reduced power usage when the driver is in stop state.
* - Each SPI can be independently enabled and programmed. Unused
* peripherals are left in low power mode.
* - Programmable interrupt priority levels for each SPI.
* - DMA is used for receiving and transmitting.
* - Programmable DMA bus priority for each DMA channel.
* - Programmable DMA interrupt priority for each DMA channel.
* - Programmable DMA error hook for each DMA channel.
* .
* @ingroup STM32
*/

2
os/hal/platforms/STM32/pwm_lld.c
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@ -21,7 +21,7 @@
* @file STM32/pwm_lld.c
* @brief STM32 PWM subsystem low level driver header.
*
* @addtogroup STM32_PWM
* @addtogroup PWM
* @{
*/

10
os/hal/platforms/STM32/pwm_lld.h
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@ -21,7 +21,7 @@
* @file STM32/pwm_lld.h
* @brief STM32 PWM subsystem low level driver header.
*
* @addtogroup STM32_PWM
* @addtogroup PWM
* @{
*/
@ -269,8 +269,8 @@ struct PWMDriver {
*
* @api
*/
#define PWM_DEGREES_TO_WIDTH(pwpm, degrees) \
((uint16_t)(((((uint32_t)(pwpm)->pd_config->pc_arr + 1UL) * \
#define PWM_DEGREES_TO_WIDTH(pwmp, degrees) \
((uint16_t)(((((uint32_t)(pwmp)->pd_config->pc_arr + 1UL) * \
(uint32_t)(degrees)) / 36000UL) - 1UL))
/**
@ -286,8 +286,8 @@ struct PWMDriver {
*
* @api
*/
#define PWM_PERCENTAGE_TO_WIDTH(pwpm, percentage) \
((uint16_t)(((((uint32_t)(pwpm)->pd_config->pc_arr + 1UL) * \
#define PWM_PERCENTAGE_TO_WIDTH(pwmp, percentage) \
((uint16_t)(((((uint32_t)(pwmp)->pd_config->pc_arr + 1UL) * \
(uint32_t)(percentage)) / 10000UL) - 1UL))
/*===========================================================================*/

2
os/hal/platforms/STM32/serial_lld.c
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@ -21,7 +21,7 @@
* @file STM32/serial_lld.c
* @brief STM32 low level serial driver code.
*
* @addtogroup STM32_SERIAL
* @addtogroup SERIAL
* @{
*/

2
os/hal/platforms/STM32/serial_lld.h
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@ -21,7 +21,7 @@
* @file STM32/serial_lld.h
* @brief STM32 low level serial driver header.
*
* @addtogroup STM32_SERIAL
* @addtogroup SERIAL
* @{
*/

2
os/hal/platforms/STM32/spi_lld.c
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@ -21,7 +21,7 @@
* @file STM32/spi_lld.c
* @brief STM32 SPI subsystem low level driver source.
*
* @addtogroup STM32_SPI
* @addtogroup SPI
* @{
*/

2
os/hal/platforms/STM32/spi_lld.h
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@ -21,7 +21,7 @@
* @file STM32/spi_lld.h
* @brief STM32 SPI subsystem low level driver header.
*
* @addtogroup STM32_SPI
* @addtogroup SPI
* @{
*/

2
os/hal/platforms/STM32/uart_lld.c
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@ -21,7 +21,7 @@
* @file STM32/uart_lld.c
* @brief STM32 low level UART driver code.
*
* @addtogroup STM32_UART
* @addtogroup UART
* @{
*/

2
os/hal/platforms/STM32/uart_lld.h
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@ -21,7 +21,7 @@
* @file STM32/uart_lld.h
* @brief STM32 low level UART driver header.
*
* @addtogroup STM32_UART
* @addtogroup UART
* @{
*/

2
os/hal/templates/adc_lld.c
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@ -21,7 +21,7 @@
* @file templates/adc_lld.c
* @brief ADC Driver subsystem low level driver source template.
*
* @addtogroup ADC_LLD
* @addtogroup ADC
* @{
*/

2
os/hal/templates/adc_lld.h
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@ -21,7 +21,7 @@
* @file templates/adc_lld.h
* @brief ADC Driver subsystem low level driver header template.
*
* @addtogroup ADC_LLD
* @addtogroup ADC
* @{
*/

2
os/hal/templates/can_lld.c
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@ -21,7 +21,7 @@
* @file templates/can_lld.c
* @brief CAN Driver subsystem low level driver source template.
*
* @addtogroup CAN_LLD
* @addtogroup CAN
* @{
*/

2
os/hal/templates/can_lld.h
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@ -21,7 +21,7 @@
* @file templates/can_lld.h
* @brief CAN Driver subsystem low level driver header template.
*
* @addtogroup CAN_LLD
* @addtogroup CAN
* @{
*/

2
os/hal/templates/hal_lld.c
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@ -21,7 +21,7 @@
* @file templates/hal_lld.c
* @brief HAL Driver subsystem low level driver source template.
*
* @addtogroup HAL_LLD
* @addtogroup HAL
* @{
*/

2
os/hal/templates/hal_lld.h
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@ -21,7 +21,7 @@
* @file templates/hal_lld.h
* @brief HAL subsystem low level driver header template.
*
* @addtogroup HAL_LLD
* @addtogroup HAL
* @{
*/

221
os/hal/templates/halconf.h
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@ -37,10 +37,6 @@
#include "mcuconf.h"
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PAL subsystem.
*/
@ -48,10 +44,6 @@
#define CH_HAL_USE_PAL TRUE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the ADC subsystem.
*/
@ -59,17 +51,6 @@
#define CH_HAL_USE_ADC TRUE
#endif
/**
* @brief Inclusion of the @p adcWaitConversion() function.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the CAN subsystem.
*/
@ -77,6 +58,72 @@
#define CH_HAL_USE_CAN TRUE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
#define CH_HAL_USE_MAC TRUE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
#define CH_HAL_USE_PWM TRUE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_SPI TRUE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_MMC_SPI TRUE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__)
#define CH_HAL_USE_UART TRUE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
@ -88,93 +135,10 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
#define CH_HAL_USE_MAC TRUE
#endif
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
#define CH_HAL_USE_PWM TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_SERIAL TRUE
#endif
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_SPI TRUE
#endif
/**
* @brief Enables the "wait" APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_MMC_SPI TRUE
#endif
/**
* @brief Block size for MMC transfers.
*/
@ -210,16 +174,61 @@
#endif
/*===========================================================================*/
/* UART driver related settings. */
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the UART subsystem.
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__)
#define CH_HAL_USE_UART TRUE
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

2
os/hal/templates/i2c_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/i2c_lld.c
* @brief I2C Driver subsystem low level driver source template.
*
* @addtogroup I2C_LLD
* @addtogroup I2C
* @{
*/

2
os/hal/templates/i2c_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/i2c_lld.h
* @brief I2C Driver subsystem low level driver header template.
*
* @addtogroup I2C_LLD
* @addtogroup I2C
* @{
*/

2
os/hal/templates/mac_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/mac_lld.c
* @brief MAC Driver subsystem low level driver source template.
*
* @addtogroup MAC_LLD
* @addtogroup MAC
* @{
*/

2
os/hal/templates/mac_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/mac_lld.h
* @brief MAC Driver subsystem low level driver header template.
*
* @addtogroup MAC_LLD
* @addtogroup MAC
* @{
*/

2
os/hal/templates/meta/driver_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/xxx_lld.c
* @brief XXX Driver subsystem low level driver source template.
*
* @addtogroup XXX_LLD
* @addtogroup XXX
* @{
*/

2
os/hal/templates/meta/driver_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/xxx_lld.h
* @brief XXX Driver subsystem low level driver header template.
*
* @addtogroup XXX_LLD
* @addtogroup XXX
* @{
*/

2
os/hal/templates/pal_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/pal_lld.c
* @brief PAL subsystem low level driver template.
*
* @addtogroup PAL_LLD
* @addtogroup PAL
* @{
*/

2
os/hal/templates/pal_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/pal_lld.h
* @brief PAL subsystem low level driver header template.
*
* @addtogroup PAL_LLD
* @addtogroup PAL
* @{
*/

2
os/hal/templates/pwm_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/pwm_lld.c
* @brief PWM Driver subsystem low level driver source template.
*
* @addtogroup PWM_LLD
* @addtogroup PWM
* @{
*/

6
os/hal/templates/pwm_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/pwm_lld.h
* @brief PWM Driver subsystem low level driver header template.
*
* @addtogroup PWM_LLD
* @addtogroup PWM
* @{
*/
@ -148,7 +148,7 @@ struct PWMDriver {
*
* @api
*/
#define PWM_DEGREES_TO_WIDTH(pwpm, degrees) 0
#define PWM_DEGREES_TO_WIDTH(pwmp, degrees) 0
/**
* @brief Converts from percentage to pulse width.
@ -163,7 +163,7 @@ struct PWMDriver {
*
* @api
*/
#define PWM_PERCENTAGE_TO_WIDTH(pwpm, percentage) 0
#define PWM_PERCENTAGE_TO_WIDTH(pwmp, percentage) 0
/*===========================================================================*/
/* External declarations. */

2
os/hal/templates/serial_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/serial_lld.c
* @brief Serial Driver subsystem low level driver source template.
*
* @addtogroup SERIAL_LLD
* @addtogroup SERIAL
* @{
*/

2
os/hal/templates/serial_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/serial_lld.h
* @brief Serial Driver subsystem low level driver header template.
*
* @addtogroup SERIAL_LLD
* @addtogroup SERIAL
* @{
*/

2
os/hal/templates/spi_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/spi_lld.c
* @brief SPI Driver subsystem low level driver source template.
*
* @addtogroup SPI_LLD
* @addtogroup SPI
* @{
*/

2
os/hal/templates/spi_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/spi_lld.h
* @brief SPI Driver subsystem low level driver header template.
*
* @addtogroup SPI_LLD
* @addtogroup SPI
* @{
*/

2
os/hal/templates/uart_lld.c
View File

@ -21,7 +21,7 @@
* @file templates/uart_lld.c
* @brief UART Driver subsystem low level driver source template.
*
* @addtogroup UART_LLD
* @addtogroup UART
* @{
*/

2
os/hal/templates/uart_lld.h
View File

@ -21,7 +21,7 @@
* @file templates/uart_lld.h
* @brief UART Driver subsystem low level driver header template.
*
* @addtogroup UART_LLD
* @addtogroup UART
* @{
*/

10
readme.txt
View File

@ -11,11 +11,12 @@
+--boards/ - Board support files.
+--demos/ - Demo projects.
+--docs/ - Documentation.
| +--html/ - HTML documentation.
| +--html/ - Local HTML documentation (after rebuild).
| +--reports/ - Test reports.
| +--src/ - Documentation source files (required for rebuild).
| +--rsc/ - Documentation resource files (required for rebuild).
| +--index.html - Documentation access.
| +--Doxyfile - Doxygen project file (required for rebuild).
| +--index.html - Local documentation access (after rebuild).
+--ext/ - External libraries, not part of ChibiOS/RT.
+--os/ - ChibiOS/RT files.
| +--hal/ - Hardware Abstraction Layer.
@ -176,6 +177,11 @@
****** this version in your project. ******
- CHANGE: Extensive documentation improvements, fixed terminology in the
events related documentation and articles.
- CHANGE: The documentation is no more included in the distribution, the
file ./documentation.html redirects to the online documentation page
that contains *much* better documents.
Note that it is still possible to generate the local documentation using
Doxygen, the procedure is very simple and described in ./docs/readme.txt.
*** 2.1.1 ***
- FIX: Fixed insufficient stack size for idle thread (bug 3033624)(backported