Added matrix H64H32 clock ratio.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10447 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
isiora 2017-08-17 21:24:31 +00:00
parent 8abd932cac
commit 62f078360f
1 changed files with 13 additions and 0 deletions

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@ -185,6 +185,7 @@
#define SAMA_MCK_MDIV_DIV4 (2 << 8) /**< MCK is divided by 4. */ #define SAMA_MCK_MDIV_DIV4 (2 << 8) /**< MCK is divided by 4. */
#define SAMA_MCK_PLLADIV2 (1 << 12) /**< PLLA is divided by 2. */ #define SAMA_MCK_PLLADIV2 (1 << 12) /**< PLLA is divided by 2. */
/** @} */ /** @} */
/*===========================================================================*/ /*===========================================================================*/
@ -405,6 +406,18 @@
#error "PLLADIV2 must be always enabled when Main Clock Divider is 3" #error "PLLADIV2 must be always enabled when Main Clock Divider is 3"
#endif #endif
/**
* @brief Matrix H64H32 clock ratio.
*/
#if ((SAMA_H64MX_H32MX_RATIO == 2) || defined(__DOXYGEN__))
#define SAMA_H64MX_H32MX_DIV PMC_MCKR_H32MXDIV_H32MXDIV2
#elif (SAMA_H64MX_H32MX_RATIO == 1)
#define SAMA_H64MX_H32MX_DIV PMC_MCKR_H32MXDIV_H32MXDIV1
#else
#error "H64MX H32MX clock ratio out of range."
#endif
/** /**
* @brief Processor Clock frequency. * @brief Processor Clock frequency.
*/ */