RP WDGv1 WIP
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14192 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -63,6 +63,9 @@ void wdg_lld_init(void) {
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WDGD1.state = WDG_STOP;
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WDGD1.wdg = WATCHDOG;
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#if WDG_HAS_STORAGE
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WDGD1.scratch = SCRATCH;
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#endif
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WDGD1.wdg->CRTL &= ~WATCHDOG_CTRL_ENABLE;
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}
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@ -77,21 +80,15 @@ void wdg_lld_start(WDGDriver *wdgp) {
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/* Set the time. */
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uint32_t time = wdgp->wdg->config.rlr;
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if (time == 0U) {
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time = 50;
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}
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/* Due to a silicon bug (see errata RP2040-E1) WDG counts down on each edge. */
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time = (time == 0U) ? (50 * 2 * 1000) : (time * 2 * 1000);
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/* Due to a silicon bug (see errata RP2040-E1) WDG counts down at each edge. */
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time = ((time == 0U) ? 50 : time) * 2 * 1000;
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/* Set ceiling if greater than count capability. */
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if (time > WATCHDOG_CTRL_TIME) {
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time = WATCHDOG_CTRL_TIME;
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}
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/* Save the reload count. */
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wdgp->wdg->rlr = time;
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/* Set the initial interval, state, control bits and enable WDG. */
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wdgp->wdg->LOAD = time;
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wdgp->state = WDG_READY;
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@ -122,7 +119,7 @@ void wdg_lld_stop(WDGDriver *wdgp) {
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*/
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void wdg_lld_reset(WDGDriver * wdgp) {
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wdgp->wdg->LOAD = wdgp->rlr;
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wdgp->wdg->LOAD = wdgp->wdg->config.rlr;
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}
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#endif /* HAL_USE_WDG */
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@ -94,7 +94,13 @@ struct WDGDriver {
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/**
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* @brief Pointer to the WATCHDOG registers block.
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*/
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WATCHDOG_TypeDef *wdg;
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WATCHDOG_TypeDef *wdg;
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/**
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* @brief Pointer to the WATCHDOG scratch storage.
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*/
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#if WDG_HAS_STORAGE
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uint8_t *scratch;
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#endif
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};
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/*===========================================================================*/
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@ -52,6 +52,10 @@
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/* RTC attributes.*/
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#define RP_HAS_RTC TRUE
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/* WDG attributes.*/
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#define RP_HAS_WDG TRUE
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#define RP_WDG_STORAGE_SIZE 32U
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/** @} */
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#endif /* RP_REGISTRY_H */
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