Improved IAR startup file.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9644 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio
parent
0791baebdc
commit
6556c5a64f
|
|
@ -15,7 +15,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARMCMx/IAR/cstartup.s
|
* @file ARMCMx/compilers/IAR/cstartup.s
|
||||||
* @brief Generic IAR Cortex-Mx startup file.
|
* @brief Generic IAR Cortex-Mx startup file.
|
||||||
*
|
*
|
||||||
* @addtogroup ARMCMx_IAR_STARTUP
|
* @addtogroup ARMCMx_IAR_STARTUP
|
||||||
|
|
@ -24,6 +24,48 @@
|
||||||
|
|
||||||
#if !defined(__DOXYGEN__)
|
#if !defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
#define SCB_VTOR 0xE000ED08
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief VTOR special register initialization.
|
||||||
|
* @details VTOR is initialized to point to the vectors table.
|
||||||
|
* @note IAR assembler #if directive conditions do not work like C/C++ conditions.
|
||||||
|
* @details Set to 0 to disable the function, 1 to enable
|
||||||
|
*/
|
||||||
|
#ifndef CRT0_VTOR_INIT
|
||||||
|
#define CRT0_VTOR_INIT 1
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief Stack segments initialization value.
|
||||||
|
*/
|
||||||
|
#ifndef CRT0_STACKS_FILL_PATTERN
|
||||||
|
#define CRT0_STACKS_FILL_PATTERN 0x55555555
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Stack segments initialization switch.
|
||||||
|
* @details Set to 0 to disable the function, 1 to enable
|
||||||
|
*/
|
||||||
|
#ifndef CRT0_INIT_STACKS
|
||||||
|
#define CRT0_INIT_STACKS 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Heap segment initialization value.
|
||||||
|
*/
|
||||||
|
#ifndef CRT0_HEAP_FILL_PATTERN
|
||||||
|
#define CRT0_HEAP_FILL_PATTERN 0xCCCCCCCC
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Heap segment initialization switch.
|
||||||
|
* @details Set to 0 to disable the function, 1 to enable
|
||||||
|
*/
|
||||||
|
#ifndef CRT0_INIT_HEAP
|
||||||
|
#define CRT0_INIT_HEAP 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
MODULE ?cstartup
|
MODULE ?cstartup
|
||||||
|
|
||||||
CONTROL_MODE_PRIVILEGED SET 0
|
CONTROL_MODE_PRIVILEGED SET 0
|
||||||
|
|
@ -34,34 +76,82 @@ CONTROL_USE_PSP SET 2
|
||||||
AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
|
AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
|
||||||
PRESERVE8
|
PRESERVE8
|
||||||
|
|
||||||
SECTION .intvec:CODE:NOROOT(3)
|
SECTION HEAP:DATA:NOROOT(3)
|
||||||
|
PUBLIC __heap_base__
|
||||||
SECTION CSTACK:DATA:NOROOT(3)
|
__heap_base__: /* Note: heap section defines sysheap base */
|
||||||
PUBLIC __main_thread_stack_base__
|
|
||||||
__main_thread_stack_base__:
|
|
||||||
PUBLIC __heap_end__
|
|
||||||
__heap_end__:
|
|
||||||
|
|
||||||
SECTION SYSHEAP:DATA:NOROOT(3)
|
SECTION SYSHEAP:DATA:NOROOT(3)
|
||||||
PUBLIC __heap_base__
|
PUBLIC __heap_end__
|
||||||
__heap_base__:
|
__heap_end__: /* Note: sysheap section defines sysheap end */
|
||||||
|
|
||||||
PUBLIC __iar_program_start
|
PUBLIC __iar_program_start
|
||||||
EXTERN __vector_table
|
|
||||||
EXTWEAK __iar_init_core
|
EXTWEAK __iar_init_core
|
||||||
EXTWEAK __iar_init_vfp
|
EXTWEAK __iar_init_vfp
|
||||||
EXTERN __cmain
|
EXTERN __cmain
|
||||||
|
EXTERN __vector_table
|
||||||
|
EXTERN __main_stack_base__
|
||||||
|
EXTERN __main_stack_end__
|
||||||
|
EXTERN __process_stack_base__
|
||||||
|
EXTERN __process_stack_end__
|
||||||
|
|
||||||
|
SECTION IRQSTACK:DATA:NOROOT(3)
|
||||||
|
SECTION CSTACK:DATA:NOROOT(3)
|
||||||
SECTION .text:CODE:REORDER(2)
|
SECTION .text:CODE:REORDER(2)
|
||||||
REQUIRE __vector_table
|
|
||||||
THUMB
|
THUMB
|
||||||
|
|
||||||
__iar_program_start:
|
__iar_program_start:
|
||||||
cpsid i
|
cpsid i
|
||||||
|
ldr r0, =SFE(IRQSTACK)
|
||||||
|
msr MSP, r0
|
||||||
ldr r0, =SFE(CSTACK)
|
ldr r0, =SFE(CSTACK)
|
||||||
msr PSP, r0
|
msr PSP, r0
|
||||||
movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
|
movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
|
||||||
msr CONTROL, r0
|
msr CONTROL, r0
|
||||||
isb
|
isb
|
||||||
|
|
||||||
|
#if (CRT0_VTOR_INIT)
|
||||||
|
ldr r0, =__vector_table
|
||||||
|
movw r1, #SCB_VTOR & 0xFFFF
|
||||||
|
movt r1, #SCB_VTOR >> 16
|
||||||
|
str r0, [r1]
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (CRT0_INIT_STACKS)
|
||||||
|
ldr r0, =CRT0_STACKS_FILL_PATTERN
|
||||||
|
/* Main Stack initialization. Note, it assumes that the stack size
|
||||||
|
is a multiple of 4 so the linker file must ensure this.*/
|
||||||
|
ldr r1, =__main_stack_base__
|
||||||
|
ldr r2, =__main_stack_end__
|
||||||
|
msloop:
|
||||||
|
cmp r1, r2
|
||||||
|
itt lo
|
||||||
|
strlo r0, [r1], #4
|
||||||
|
blo msloop
|
||||||
|
|
||||||
|
/* Process Stack initialization. Note, it assumes that the stack size
|
||||||
|
is a multiple of 4 so the linker file must ensure this.*/
|
||||||
|
ldr r1, =__process_stack_base__
|
||||||
|
ldr r2, =__process_stack_end__
|
||||||
|
psloop:
|
||||||
|
cmp r1, r2
|
||||||
|
itt lo
|
||||||
|
strlo r0, [r1], #4
|
||||||
|
blo psloop
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (CRT0_INIT_HEAP)
|
||||||
|
ldr r0, =CRT0_HEAP_FILL_PATTERN
|
||||||
|
/* Sys Heap initialization. Note, it assumes that the heap size
|
||||||
|
is a multiple of 4 so the linker file must ensure this.*/
|
||||||
|
ldr r1, =__heap_base__
|
||||||
|
ldr r2, =__heap_end__
|
||||||
|
hloop:
|
||||||
|
cmp r1, r2
|
||||||
|
itt lo
|
||||||
|
strlo r0, [r1], #4
|
||||||
|
blo hloop
|
||||||
|
#endif
|
||||||
|
|
||||||
bl __early_init
|
bl __early_init
|
||||||
bl __iar_init_core
|
bl __iar_init_core
|
||||||
bl __iar_init_vfp
|
bl __iar_init_vfp
|
||||||
|
|
|
||||||
|
|
@ -15,7 +15,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARMCMx/IAR/vectors.c
|
* @file ARMCMx/compilers/IAR/vectors.c
|
||||||
* @brief Interrupt vectors for Cortex-Mx devices.
|
* @brief Interrupt vectors for Cortex-Mx devices.
|
||||||
*
|
*
|
||||||
* @defgroup ARMCMx_IAR_VECTORS Cortex-Mx Interrupt Vectors
|
* @defgroup ARMCMx_IAR_VECTORS Cortex-Mx Interrupt Vectors
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue