Improved IAR startup file.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9644 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -15,7 +15,7 @@
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*/
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/**
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* @file ARMCMx/IAR/cstartup.s
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* @file ARMCMx/compilers/IAR/cstartup.s
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* @brief Generic IAR Cortex-Mx startup file.
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*
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* @addtogroup ARMCMx_IAR_STARTUP
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@ -24,6 +24,48 @@
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#if !defined(__DOXYGEN__)
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#define SCB_VTOR 0xE000ED08
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/**
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* @brief VTOR special register initialization.
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* @details VTOR is initialized to point to the vectors table.
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* @note IAR assembler #if directive conditions do not work like C/C++ conditions.
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* @details Set to 0 to disable the function, 1 to enable
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*/
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#ifndef CRT0_VTOR_INIT
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#define CRT0_VTOR_INIT 1
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#endif
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/**
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* @brief Stack segments initialization value.
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*/
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#ifndef CRT0_STACKS_FILL_PATTERN
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#define CRT0_STACKS_FILL_PATTERN 0x55555555
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#endif
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/**
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* @brief Stack segments initialization switch.
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* @details Set to 0 to disable the function, 1 to enable
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*/
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#ifndef CRT0_INIT_STACKS
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#define CRT0_INIT_STACKS 1
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#endif
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/**
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* @brief Heap segment initialization value.
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*/
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#ifndef CRT0_HEAP_FILL_PATTERN
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#define CRT0_HEAP_FILL_PATTERN 0xCCCCCCCC
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#endif
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/**
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* @brief Heap segment initialization switch.
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* @details Set to 0 to disable the function, 1 to enable
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*/
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#ifndef CRT0_INIT_HEAP
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#define CRT0_INIT_HEAP 1
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#endif
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MODULE ?cstartup
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CONTROL_MODE_PRIVILEGED SET 0
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@ -34,34 +76,82 @@ CONTROL_USE_PSP SET 2
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AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
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PRESERVE8
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SECTION .intvec:CODE:NOROOT(3)
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SECTION CSTACK:DATA:NOROOT(3)
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PUBLIC __main_thread_stack_base__
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__main_thread_stack_base__:
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PUBLIC __heap_end__
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__heap_end__:
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SECTION HEAP:DATA:NOROOT(3)
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PUBLIC __heap_base__
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__heap_base__: /* Note: heap section defines sysheap base */
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SECTION SYSHEAP:DATA:NOROOT(3)
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PUBLIC __heap_base__
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__heap_base__:
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PUBLIC __heap_end__
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__heap_end__: /* Note: sysheap section defines sysheap end */
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PUBLIC __iar_program_start
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EXTERN __vector_table
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EXTWEAK __iar_init_core
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EXTWEAK __iar_init_vfp
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EXTERN __cmain
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EXTERN __vector_table
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EXTERN __main_stack_base__
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EXTERN __main_stack_end__
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EXTERN __process_stack_base__
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EXTERN __process_stack_end__
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SECTION IRQSTACK:DATA:NOROOT(3)
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .text:CODE:REORDER(2)
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REQUIRE __vector_table
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THUMB
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__iar_program_start:
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cpsid i
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ldr r0, =SFE(IRQSTACK)
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msr MSP, r0
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ldr r0, =SFE(CSTACK)
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msr PSP, r0
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movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
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msr CONTROL, r0
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isb
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#if (CRT0_VTOR_INIT)
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ldr r0, =__vector_table
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movw r1, #SCB_VTOR & 0xFFFF
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movt r1, #SCB_VTOR >> 16
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str r0, [r1]
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#endif
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#if (CRT0_INIT_STACKS)
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ldr r0, =CRT0_STACKS_FILL_PATTERN
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/* Main Stack initialization. Note, it assumes that the stack size
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is a multiple of 4 so the linker file must ensure this.*/
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ldr r1, =__main_stack_base__
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ldr r2, =__main_stack_end__
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msloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo msloop
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/* Process Stack initialization. Note, it assumes that the stack size
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is a multiple of 4 so the linker file must ensure this.*/
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ldr r1, =__process_stack_base__
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ldr r2, =__process_stack_end__
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psloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo psloop
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#endif
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#if (CRT0_INIT_HEAP)
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ldr r0, =CRT0_HEAP_FILL_PATTERN
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/* Sys Heap initialization. Note, it assumes that the heap size
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is a multiple of 4 so the linker file must ensure this.*/
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ldr r1, =__heap_base__
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ldr r2, =__heap_end__
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hloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo hloop
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#endif
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bl __early_init
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bl __iar_init_core
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bl __iar_init_vfp
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@ -15,7 +15,7 @@
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*/
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/**
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* @file ARMCMx/IAR/vectors.c
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* @file ARMCMx/compilers/IAR/vectors.c
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* @brief Interrupt vectors for Cortex-Mx devices.
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*
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* @defgroup ARMCMx_IAR_VECTORS Cortex-Mx Interrupt Vectors
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