Added a fast interrupt to the STM32F4xx FPU stress test.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7927 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -5,7 +5,7 @@
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# Compiler options here.
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# Compiler options here.
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ifeq ($(USE_OPT),)
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ifeq ($(USE_OPT),)
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USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
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USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
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endif
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endif
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# C specific options here (added to USE_OPT).
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# C specific options here (added to USE_OPT).
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@ -142,6 +142,21 @@ static const GPTConfig gpt3cfg = {
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0
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0
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};
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};
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CH_FAST_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
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float f1, f2, f3, f4, f5;
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TIM1->SR = 0;
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f1 = ff1(3.0f);
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f2 = ff1(4.0f);
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f3 = ff1(5.0f);
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f5 = f1 + f2 + f3;
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f4 = ff1(4.0f);
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f5 = ff2(f5, f4, f5, f4);
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if (f5 != 256.0f) {
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chSysHalt("float corrupion #5");
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}
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}
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/*===========================================================================*/
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/*===========================================================================*/
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/* Generic demo code. */
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/* Generic demo code. */
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@ -211,6 +226,17 @@ int main(void) {
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gptStart(&GPTD4, &gpt4cfg);
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gptStart(&GPTD4, &gpt4cfg);
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gptStart(&GPTD3, &gpt3cfg);
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gptStart(&GPTD3, &gpt3cfg);
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/*
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* Enabling TIM1 as a fast interrupts source.
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*/
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rccEnableTIM1(false);
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nvicEnableVector(STM32_TIM1_UP_NUMBER, 0);
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TIM1->ARR = 10000;
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TIM1->PSC = 0;
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TIM1->CNT = 0;
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TIM1->DIER = TIM_DIER_UIE;
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TIM1->CR1 = TIM_CR1_CEN;
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/*
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/*
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* Initializes the worker threads.
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* Initializes the worker threads.
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*/
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*/
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