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IRQ new framework ported to STM32H7xx. Changed UART default IRQ priority in updater schipts, was 3 now iit is 12. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13297 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2020-01-19 09:21:25 +00:00
parent 4e0f2c2ece
commit 6664850989
23 changed files with 818 additions and 819 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
demos/STM32/RT-STM32G431RB-NUCLEO64/cfg/mcuconf.h
View File

@ -111,11 +111,11 @@
#define STM32_IRQ_TIM8_UP_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 3
#define STM32_IRQ_USART2_PRIORITY 3
#define STM32_IRQ_USART3_PRIORITY 3
#define STM32_IRQ_UART4_PRIORITY 3
#define STM32_IRQ_LPUART1_PRIORITY 3
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_LPUART1_PRIORITY 12
/*
* ADC driver system settings.

12
demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h
View File

@ -120,12 +120,12 @@
#define STM32_IRQ_TIM20_UP_PRIORITY 7
#define STM32_IRQ_TIM20_CC_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 3
#define STM32_IRQ_USART2_PRIORITY 3
#define STM32_IRQ_USART3_PRIORITY 3
#define STM32_IRQ_UART4_PRIORITY 3
#define STM32_IRQ_UART5_PRIORITY 3
#define STM32_IRQ_LPUART1_PRIORITY 3
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_UART5_PRIORITY 12
#define STM32_IRQ_LPUART1_PRIORITY 12
/*
* ADC driver system settings.

91
demos/STM32/RT-STM32H743I-NUCLEO144/cfg/mcuconf.h
View File

@ -172,12 +172,35 @@
#define STM32_IRQ_EXTI5_9_PRIORITY 6
#define STM32_IRQ_EXTI10_15_PRIORITY 6
#define STM32_IRQ_EXTI16_PRIORITY 6
#define STM32_IRQ_EXTI17_PRIORITY 15
#define STM32_IRQ_EXTI17_PRIORITY 6
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_PRIORITY 15
#define STM32_IRQ_EXTI22_PRIORITY 15
#define STM32_IRQ_EXTI20_21_PRIORITY 6
#define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7
#define STM32_IRQ_TIM2_PRIORITY 7
#define STM32_IRQ_TIM3_PRIORITY 7
#define STM32_IRQ_TIM4_PRIORITY 7
#define STM32_IRQ_TIM5_PRIORITY 7
#define STM32_IRQ_TIM6_PRIORITY 7
#define STM32_IRQ_TIM7_PRIORITY 7
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_TIM15_PRIORITY 7
#define STM32_IRQ_TIM16_PRIORITY 7
#define STM32_IRQ_TIM17_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_UART5_PRIORITY 12
#define STM32_IRQ_USART6_PRIORITY 12
#define STM32_IRQ_UART7_PRIORITY 12
#define STM32_IRQ_UART8_PRIORITY 12
/*
* ADC driver system settings.
@ -229,22 +252,12 @@
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM13 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#define STM32_GPT_USE_TIM15 FALSE
#define STM32_GPT_USE_TIM16 FALSE
#define STM32_GPT_USE_TIM17 FALSE
/*
* I2C driver system settings.
@ -281,14 +294,12 @@
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
#define STM32_ICU_USE_TIM12 FALSE
#define STM32_ICU_USE_TIM13 FALSE
#define STM32_ICU_USE_TIM14 FALSE
#define STM32_ICU_USE_TIM15 FALSE
#define STM32_ICU_USE_TIM16 FALSE
#define STM32_ICU_USE_TIM17 FALSE
/*
* MAC driver system settings.
@ -311,14 +322,12 @@
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
#define STM32_PWM_USE_TIM12 FALSE
#define STM32_PWM_USE_TIM13 FALSE
#define STM32_PWM_USE_TIM14 FALSE
#define STM32_PWM_USE_TIM15 FALSE
#define STM32_PWM_USE_TIM16 FALSE
#define STM32_PWM_USE_TIM17 FALSE
/*
* RTC driver system settings.
@ -352,14 +361,6 @@
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USE_UART7 FALSE
#define STM32_SERIAL_USE_UART8 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
#define STM32_SERIAL_UART7_PRIORITY 12
#define STM32_SERIAL_UART8_PRIORITY 12
/*
* SPI driver system settings.
@ -434,12 +435,6 @@
#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0

104
os/hal/ports/STM32/LLD/EXTIv1/stm32_exti20_21.inc Normal file
View File

@ -0,0 +1,104 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file EXTIv1/stm32_exti20_21.inc
* @brief Shared EXTI20_21 handler.
*
* @addtogroup STM32_EXTI20_21_HANDLER
* @{
*/
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/* Priority settings checks.*/
#if !defined(STM32_IRQ_EXTI20_21_PRIORITY)
#error "STM32_IRQ_EXTI20_21_PRIORITY not defined in mcuconf.h"
#endif
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI20_21_PRIORITY)
#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI20_21_PRIORITY"
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static inline void exti20_exti21_irq_init(void) {
#if defined(STM32_EXTI20_IS_USED) || defined(STM32_EXTI21_IS_USED)
nvicEnableVector(STM32_EXTI20_21_NUMBER, STM32_IRQ_EXTI20_21_PRIORITY);
#endif
}
static inline void exti20_exti21_irq_deinit(void) {
#if defined(STM32_EXTI20_IS_USED) || defined(STM32_EXTI21_IS_USED)
nvicDisableVector(STM32_EXTI20_21_NUMBER);
#endif
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if defined(STM32_EXTI20_IS_USED) || defined(STM32_EXTI21_IS_USED) || \
defined(__DOXYGEN__)
#if !defined(STM32_DISABLE_EXTI20_21_HANDLER)
/**
* @brief EXTI[20], EXTI[21] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_EXTI20_21_HANDLER) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
extiGetAndClearGroup1((1U << 20) | (1U << 21), pr);
/* Could be unused.*/
(void)pr;
#if defined(STM32_EXTI20_ISR)
STM32_EXTI20_ISR(pr, 20);
#endif
#if defined(STM32_EXTI21_ISR)
STM32_EXTI21_ISR(pr, 21);
#endif
OSAL_IRQ_EPILOGUE();
}
#endif
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/** @} */

279
os/hal/ports/STM32/STM32H7xx/stm32_isr.c
View File

@ -28,6 +28,13 @@
/* Driver local definitions. */
/*===========================================================================*/
#define exti_serve_irq(pr, channel) { \
\
if ((pr) & (1U << (channel))) { \
_pal_isr_code(channel); \
} \
}
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@ -40,177 +47,41 @@
/* Driver local functions. */
/*===========================================================================*/
#define exti_serve_irq(pr, channel) { \
\
if ((pr) & (1U << (channel))) { \
_pal_isr_code(channel); \
} \
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if (HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS)) || defined(__DOXYGEN__)
#if !defined(STM32_DISABLE_EXTI0_HANDLER)
/**
* @brief EXTI[0] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr;
#include "stm32_exti0.inc"
#include "stm32_exti1.inc"
#include "stm32_exti2.inc"
#include "stm32_exti3.inc"
#include "stm32_exti4.inc"
#include "stm32_exti5_9.inc"
#include "stm32_exti10_15.inc"
#include "stm32_exti16.inc"
#include "stm32_exti17.inc"
#include "stm32_exti18.inc"
#include "stm32_exti19.inc"
#include "stm32_exti20_21.inc"
OSAL_IRQ_PROLOGUE();
#include "stm32_usart1.inc"
#include "stm32_usart2.inc"
#include "stm32_usart3.inc"
#include "stm32_uart4.inc"
#include "stm32_uart5.inc"
#include "stm32_usart6.inc"
#include "stm32_uart7.inc"
#include "stm32_uart8.inc"
#include "stm32_lpuart1.inc"
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & (1U << 0);
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 0);
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI1_HANDLER)
/**
* @brief EXTI[1] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & (1U << 1);
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 1);
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI2_HANDLER)
/**
* @brief EXTI[2] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector60) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & (1U << 2);
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 2);
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI3_HANDLER)
/**
* @brief EXTI[3] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector64) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & (1U << 3);
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 3);
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI4_HANDLER)
/**
* @brief EXTI[4] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector68) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & (1U << 4);
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 4);
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI5_9_HANDLER)
/**
* @brief EXTI[5]...EXTI[9] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(Vector9C) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) |
(1U << 9));
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 5);
exti_serve_irq(pr, 6);
exti_serve_irq(pr, 7);
exti_serve_irq(pr, 8);
exti_serve_irq(pr, 9);
OSAL_IRQ_EPILOGUE();
}
#endif
#if !defined(STM32_DISABLE_EXTI10_15_HANDLER)
/**
* @brief EXTI[10]...EXTI[15] interrupt handler.
*
* @isr
*/
OSAL_IRQ_HANDLER(VectorE0) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
pr = EXTI_D1->PR1;
pr &= EXTI_D1->IMR1 & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) |
(1U << 14) | (1U << 15));
EXTI_D1->PR1 = pr;
exti_serve_irq(pr, 10);
exti_serve_irq(pr, 11);
exti_serve_irq(pr, 12);
exti_serve_irq(pr, 13);
exti_serve_irq(pr, 14);
exti_serve_irq(pr, 15);
OSAL_IRQ_EPILOGUE();
}
#endif
#endif /* HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS) */
#include "stm32_tim1.inc"
#include "stm32_tim2.inc"
#include "stm32_tim3.inc"
#include "stm32_tim4.inc"
#include "stm32_tim5.inc"
#include "stm32_tim6.inc"
#include "stm32_tim7.inc"
#include "stm32_tim8_12_13_14.inc"
/*===========================================================================*/
/* Driver exported functions. */
@ -223,15 +94,36 @@ OSAL_IRQ_HANDLER(VectorE0) {
*/
void irqInit(void) {
#if HAL_USE_PAL
nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY);
nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY);
nvicEnableVector(EXTI2_IRQn, STM32_IRQ_EXTI2_PRIORITY);
nvicEnableVector(EXTI3_IRQn, STM32_IRQ_EXTI3_PRIORITY);
nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY);
nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY);
nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY);
#endif
exti0_irq_init();
exti1_irq_init();
exti2_irq_init();
exti3_irq_init();
exti4_irq_init();
exti5_9_irq_init();
exti10_15_irq_init();
exti16_irq_init();
exti17_irq_init();
exti18_irq_init();
exti19_irq_init();
exti20_exti21_irq_init();
tim1_irq_init();
tim2_irq_init();
tim3_irq_init();
tim4_irq_init();
tim5_irq_init();
tim6_irq_init();
tim7_irq_init();
tim8_tim12_tim13_tim14_irq_init();
usart1_irq_init();
usart2_irq_init();
usart3_irq_init();
uart4_irq_init();
uart5_irq_init();
usart6_irq_init();
uart7_irq_init();
uart5_irq_init();
}
/**
@ -241,15 +133,36 @@ void irqInit(void) {
*/
void irqDeinit(void) {
#if HAL_USE_PAL
nvicDisableVector(EXTI0_IRQn);
nvicDisableVector(EXTI1_IRQn);
nvicDisableVector(EXTI2_IRQn);
nvicDisableVector(EXTI3_IRQn);
nvicDisableVector(EXTI4_IRQn);
nvicDisableVector(EXTI9_5_IRQn);
nvicDisableVector(EXTI15_10_IRQn);
#endif
exti0_irq_deinit();
exti1_irq_deinit();
exti2_irq_deinit();
exti3_irq_deinit();
exti4_irq_deinit();
exti5_9_irq_deinit();
exti10_15_irq_deinit();
exti16_irq_deinit();
exti17_irq_deinit();
exti18_irq_deinit();
exti19_irq_deinit();
exti20_exti21_irq_deinit();
tim1_irq_deinit();
tim2_irq_deinit();
tim3_irq_deinit();
tim4_irq_deinit();
tim5_irq_deinit();
tim6_irq_deinit();
tim7_irq_deinit();
tim8_tim12_tim13_tim14_irq_deinit();
usart1_irq_deinit();
usart2_irq_deinit();
usart3_irq_deinit();
uart4_irq_deinit();
uart5_irq_deinit();
usart6_irq_deinit();
uart7_irq_deinit();
uart5_irq_deinit();
}
/** @} */

399
os/hal/ports/STM32/STM32H7xx/stm32_isr.h
View File

@ -29,120 +29,299 @@
/* Driver constants. */
/*===========================================================================*/
/**
* @name ISRs suppressed in standard drivers
* @{
*/
#define STM32_TIM1_SUPPRESS_ISR
#define STM32_TIM2_SUPPRESS_ISR
#define STM32_TIM3_SUPPRESS_ISR
#define STM32_TIM4_SUPPRESS_ISR
#define STM32_TIM5_SUPPRESS_ISR
#define STM32_TIM6_SUPPRESS_ISR
#define STM32_TIM7_SUPPRESS_ISR
#define STM32_TIM8_SUPPRESS_ISR
#define STM32_TIM12_SUPPRESS_ISR
#define STM32_TIM13_SUPPRESS_ISR
#define STM32_TIM14_SUPPRESS_ISR
#define STM32_TIM15_SUPPRESS_ISR
#define STM32_TIM16_SUPPRESS_ISR
#define STM32_TIM17_SUPPRESS_ISR
#define STM32_USART1_SUPPRESS_ISR
#define STM32_USART2_SUPPRESS_ISR
#define STM32_USART3_SUPPRESS_ISR
#define STM32_UART4_SUPPRESS_ISR
#define STM32_UART5_SUPPRESS_ISR
#define STM32_USART6_SUPPRESS_ISR
#define STM32_UART7_SUPPRESS_ISR
#define STM32_UART8_SUPPRESS_ISR
/** @} */
/**
* @name ISR names and numbers
* @{
*/
/*
* ADC units.
*/
#define STM32_ADC12_HANDLER Vector88
#define STM32_ADC3_HANDLER Vector23C
#define STM32_ADC12_NUMBER 18
#define STM32_ADC3_NUMBER 127
/*
* BDMA units.
*/
#define STM32_BDMA1_CH0_HANDLER Vector244
#define STM32_BDMA1_CH1_HANDLER Vector248
#define STM32_BDMA1_CH2_HANDLER Vector24C
#define STM32_BDMA1_CH3_HANDLER Vector250
#define STM32_BDMA1_CH4_HANDLER Vector254
#define STM32_BDMA1_CH5_HANDLER Vector258
#define STM32_BDMA1_CH6_HANDLER Vector25C
#define STM32_BDMA1_CH7_HANDLER Vector260
#define STM32_BDMA1_CH0_NUMBER 129
#define STM32_BDMA1_CH1_NUMBER 130
#define STM32_BDMA1_CH2_NUMBER 131
#define STM32_BDMA1_CH3_NUMBER 132
#define STM32_BDMA1_CH4_NUMBER 133
#define STM32_BDMA1_CH5_NUMBER 134
#define STM32_BDMA1_CH6_NUMBER 135
#define STM32_BDMA1_CH7_NUMBER 136
/*
* DMA units.
*/
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
#define STM32_DMA1_CH2_HANDLER Vector74
#define STM32_DMA1_CH3_HANDLER Vector78
#define STM32_DMA1_CH4_HANDLER Vector7C
#define STM32_DMA1_CH5_HANDLER Vector80
#define STM32_DMA1_CH6_HANDLER Vector84
#define STM32_DMA1_CH7_HANDLER VectorFC
#define STM32_DMA2_CH0_HANDLER Vector120
#define STM32_DMA2_CH1_HANDLER Vector124
#define STM32_DMA2_CH2_HANDLER Vector128
#define STM32_DMA2_CH3_HANDLER Vector12C
#define STM32_DMA2_CH4_HANDLER Vector130
#define STM32_DMA2_CH5_HANDLER Vector150
#define STM32_DMA2_CH6_HANDLER Vector154
#define STM32_DMA2_CH7_HANDLER Vector158
#define STM32_DMA1_CH0_NUMBER 11
#define STM32_DMA1_CH1_NUMBER 12
#define STM32_DMA1_CH2_NUMBER 13
#define STM32_DMA1_CH3_NUMBER 14
#define STM32_DMA1_CH4_NUMBER 15
#define STM32_DMA1_CH5_NUMBER 16
#define STM32_DMA1_CH6_NUMBER 17
#define STM32_DMA1_CH7_NUMBER 47
#define STM32_DMA2_CH0_NUMBER 56
#define STM32_DMA2_CH1_NUMBER 57
#define STM32_DMA2_CH2_NUMBER 58
#define STM32_DMA2_CH3_NUMBER 59
#define STM32_DMA2_CH4_NUMBER 60
#define STM32_DMA2_CH5_NUMBER 68
#define STM32_DMA2_CH6_NUMBER 69
#define STM32_DMA2_CH7_NUMBER 70
/*
* ETH units.
*/
#define STM32_ETH_HANDLER Vector134
#define STM32_ETH_NUMBER 61
/*
* EXTI units.
*/
#define STM32_EXTI0_HANDLER Vector58
#define STM32_EXTI1_HANDLER Vector5C
#define STM32_EXTI2_HANDLER Vector60
#define STM32_EXTI3_HANDLER Vector64
#define STM32_EXTI4_HANDLER Vector68
#define STM32_EXTI5_9_HANDLER Vector9C
#define STM32_EXTI10_15_HANDLER VectorE0
#define STM32_EXTI16_HANDLER Vector44 /* PVD */
#define STM32_EXTI17_HANDLER VectorE4 /* RTC ALARM */
#define STM32_EXTI18_HANDLER Vector48 /* RTC TAMP CSS */
#define STM32_EXTI19_HANDLER Vector4C /* RTC WAKEUP */
#define STM32_EXTI2021_HANDLER Vector264 /* COMP1 COMP2 */
#define STM32_EXTI0_NUMBER 6
#define STM32_EXTI1_NUMBER 7
#define STM32_EXTI2_NUMBER 8
#define STM32_EXTI3_NUMBER 9
#define STM32_EXTI4_NUMBER 10
#define STM32_EXTI5_9_NUMBER 23
#define STM32_EXTI10_15_NUMBER 40
#define STM32_EXTI16_NUMBER 1
#define STM32_EXTI17_NUMBER 41
#define STM32_EXTI18_NUMBER 42
#define STM32_EXTI19_NUMBER 3
#define STM32_EXTI2021_NUMBER 137
/*
* I2C units.
*/
#define STM32_I2C1_EVENT_HANDLER VectorBC
#define STM32_I2C1_ERROR_HANDLER VectorC0
#define STM32_I2C2_EVENT_HANDLER VectorC4
#define STM32_I2C2_ERROR_HANDLER VectorC8
#define STM32_I2C3_EVENT_HANDLER Vector160
#define STM32_I2C3_ERROR_HANDLER Vector164
#define STM32_I2C4_EVENT_HANDLER Vector1BC
#define STM32_I2C4_ERROR_HANDLER Vector1C0
#define STM32_I2C1_EVENT_NUMBER 31
#define STM32_I2C1_ERROR_NUMBER 32
#define STM32_I2C2_EVENT_NUMBER 33
#define STM32_I2C2_ERROR_NUMBER 34
#define STM32_I2C3_EVENT_NUMBER 72
#define STM32_I2C3_ERROR_NUMBER 73
#define STM32_I2C4_EVENT_NUMBER 95
#define STM32_I2C4_ERROR_NUMBER 96
/*
* QUADSPI units.
*/
#define STM32_QUADSPI1_HANDLER Vector1B0
#define STM32_QUADSPI1_NUMBER 92
/*
* SPI units.
*/
#define STM32_SPI1_HANDLER VectorCC
#define STM32_SPI2_HANDLER VectorD0
#define STM32_SPI3_HANDLER Vector10C
#define STM32_SPI4_HANDLER Vector190
#define STM32_SPI5_HANDLER Vector194
#define STM32_SPI6_HANDLER Vector198
#define STM32_SPI1_NUMBER 35
#define STM32_SPI2_NUMBER 36
#define STM32_SPI3_NUMBER 51
#define STM32_SPI4_NUMBER 84
#define STM32_SPI5_NUMBER 85
#define STM32_SPI6_NUMBER 86
/*
* TIM units.
*/
#define STM32_TIM1_BRK_HANDLER VectorA0
#define STM32_TIM1_UP_HANDLER VectorA4
#define STM32_TIM1_TRGCO_HANDLER VectorA8
#define STM32_TIM1_CC_HANDLER VectorAC
#define STM32_TIM2_HANDLER VectorB0
#define STM32_TIM3_HANDLER VectorB4
#define STM32_TIM4_HANDLER VectorB8
#define STM32_TIM5_HANDLER Vector108
#define STM32_TIM6_HANDLER Vector118
#define STM32_TIM7_HANDLER Vector11C
#define STM32_TIM8_BRK_TIM12_HANDLER VectorEC
#define STM32_TIM8_UP_TIM13_HANDLER VectorF0
#define STM32_TIM8_TRGCO_TIM14_HANDLER VectorF4
#define STM32_TIM8_CC_HANDLER VectorF8
#define STM32_TIM15_HANDLER Vector210
#define STM32_TIM16_HANDLER Vector214
#define STM32_TIM17_HANDLER Vector218
#define STM32_TIM1_BRK_NUMBER 24
#define STM32_TIM1_UP_NUMBER 25
#define STM32_TIM1_TRGCO_NUMBER 26
#define STM32_TIM1_CC_NUMBER 27
#define STM32_TIM2_NUMBER 28
#define STM32_TIM3_NUMBER 29
#define STM32_TIM4_NUMBER 30
#define STM32_TIM5_NUMBER 50
#define STM32_TIM6_NUMBER 54
#define STM32_TIM7_NUMBER 55
#define STM32_TIM8_BRK_TIM12_NUMBER 43
#define STM32_TIM8_UP_TIM13_NUMBER 44
#define STM32_TIM8_TRGCO_TIM14_NUMBER 45
#define STM32_TIM8_CC_NUMBER 46
#define STM32_TIM15_NUMBER 116
#define STM32_TIM16_NUMBER 117
#define STM32_TIM17_NUMBER 118
/*
* USART/UART units.
*/
#define STM32_USART1_HANDLER VectorD4
#define STM32_USART2_HANDLER VectorD8
#define STM32_USART3_HANDLER VectorDC
#define STM32_UART4_HANDLER Vector110
#define STM32_UART5_HANDLER Vector114
#define STM32_USART6_HANDLER Vector15C
#define STM32_UART7_HANDLER Vector188
#define STM32_UART8_HANDLER Vector18C
#define STM32_USART1_NUMBER 37
#define STM32_USART2_NUMBER 38
#define STM32_USART3_NUMBER 39
#define STM32_UART4_NUMBER 52
#define STM32_UART5_NUMBER 53
#define STM32_USART6_NUMBER 71
#define STM32_UART7_NUMBER 82
#define STM32_UART8_NUMBER 83
/*
* USB/OTG units.
*/
#define STM32_OTG1_HANDLER Vector1D4
#define STM32_OTG1_EP1OUT_HANDLER Vector1C8
#define STM32_OTG1_EP1IN_HANDLER Vector1CC
#define STM32_OTG2_HANDLER Vector174
#define STM32_OTG2_EP1OUT_HANDLER Vector168
#define STM32_OTG2_EP1IN_HANDLER Vector16C
#define STM32_OTG1_NUMBER 101
#define STM32_OTG1_EP1OUT_NUMBER 98
#define STM32_OTG1_EP1IN_NUMBER 99
#define STM32_OTG2_NUMBER 77
#define STM32_OTG2_EP1OUT_NUMBER 74
#define STM32_OTG2_EP1IN_NUMBER 75
/*
* LTDC units.
*/
#define STM32_LTDC_EV_HANDLER Vector1A0
#define STM32_LTDC_ER_HANDLER Vector1A4
#define STM32_LTDC_EV_NUMBER 88
#define STM32_LTDC_ER_NUMBER 89
/*
* DMA2D units.
*/
#define STM32_DMA2D_HANDLER Vector1A8
#define STM32_DMA2D_NUMBER 90
/*
* FSMC units.
*/
#define STM32_FSMC_HANDLER Vector100
#define STM32_FSMC_NUMBER 48
/*
* DCMI units.
*/
#define STM32_DCMI_HANDLER Vector178
#define STM32_DCMI_NUMBER 78
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief EXTI0 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI0_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI0_PRIORITY 6
#endif
/**
* @brief EXTI1 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI1_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI1_PRIORITY 6
#endif
/**
* @brief EXTI2 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI2_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI2_PRIORITY 6
#endif
/**
* @brief EXTI3 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI3_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI3_PRIORITY 6
#endif
/**
* @brief EXTI4 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI4_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI4_PRIORITY 6
#endif
/**
* @brief EXTI9..5 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI5_9_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI5_9_PRIORITY 6
#endif
/**
* @brief EXTI15..10 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI10_15_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI10_15_PRIORITY 6
#endif
/**
* @brief EXTI16 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI16_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI16_PRIORITY 6
#endif
/**
* @brief EXTI17 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI17_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI17_PRIORITY 6
#endif
/**
* @brief EXTI18 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI18_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI18_PRIORITY 6
#endif
/**
* @brief EXTI19 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI19_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI19_PRIORITY 6
#endif
/**
* @brief EXTI20 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI20_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI20_PRIORITY 6
#endif
/**
* @brief EXTI21 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI21_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI21_PRIORITY 6
#endif
/**
* @brief EXTI22 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI22_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI22_PRIORITY 6
#endif
/**
* @brief EXTI23 interrupt priority level setting.
*/
#if !defined(STM32_IRQ_EXTI23_PRIORITY) || defined(__DOXYGEN__)
#define STM32_IRQ_EXTI23_PRIORITY 6
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/

171
os/hal/ports/STM32/STM32H7xx/stm32_registry.h
View File

@ -43,17 +43,9 @@
defined(__DOXYGEN__)
/* ADC attributes.*/
#define STM32_ADC12_HANDLER Vector88
#define STM32_ADC12_NUMBER 18
#define STM32_ADC3_HANDLER Vector23C
#define STM32_ADC3_NUMBER 127
#define STM32_HAS_ADC1 TRUE
#define STM32_HAS_ADC2 TRUE
#define STM32_HAS_ADC3 TRUE
#define STM32_HAS_ADC4 FALSE
#define STM32_HAS_SDADC1 FALSE
@ -73,67 +65,16 @@
/* BDMA attributes.*/
#define STM32_HAS_BDMA1 TRUE
#define STM32_BDMA1_CH0_HANDLER Vector244
#define STM32_BDMA1_CH1_HANDLER Vector248
#define STM32_BDMA1_CH2_HANDLER Vector24C
#define STM32_BDMA1_CH3_HANDLER Vector250
#define STM32_BDMA1_CH4_HANDLER Vector254
#define STM32_BDMA1_CH5_HANDLER Vector258
#define STM32_BDMA1_CH6_HANDLER Vector25C
#define STM32_BDMA1_CH7_HANDLER Vector260
#define STM32_BDMA1_CH0_NUMBER 129
#define STM32_BDMA1_CH1_NUMBER 130
#define STM32_BDMA1_CH2_NUMBER 131
#define STM32_BDMA1_CH3_NUMBER 132
#define STM32_BDMA1_CH4_NUMBER 133
#define STM32_BDMA1_CH5_NUMBER 134
#define STM32_BDMA1_CH6_NUMBER 135
#define STM32_BDMA1_CH7_NUMBER 136
/* DMA attributes.*/
#define STM32_ADVANCED_DMA TRUE
#define STM32_DMA_SUPPORTS_DMAMUX TRUE
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
#define STM32_DMA1_CH2_HANDLER Vector74
#define STM32_DMA1_CH3_HANDLER Vector78
#define STM32_DMA1_CH4_HANDLER Vector7C
#define STM32_DMA1_CH5_HANDLER Vector80
#define STM32_DMA1_CH6_HANDLER Vector84
#define STM32_DMA1_CH7_HANDLER VectorFC
#define STM32_DMA1_CH0_NUMBER 11
#define STM32_DMA1_CH1_NUMBER 12
#define STM32_DMA1_CH2_NUMBER 13
#define STM32_DMA1_CH3_NUMBER 14
#define STM32_DMA1_CH4_NUMBER 15
#define STM32_DMA1_CH5_NUMBER 16
#define STM32_DMA1_CH6_NUMBER 17
#define STM32_DMA1_CH7_NUMBER 47
#define STM32_HAS_DMA2 TRUE
#define STM32_DMA2_CH0_HANDLER Vector120
#define STM32_DMA2_CH1_HANDLER Vector124
#define STM32_DMA2_CH2_HANDLER Vector128
#define STM32_DMA2_CH3_HANDLER Vector12C
#define STM32_DMA2_CH4_HANDLER Vector130
#define STM32_DMA2_CH5_HANDLER Vector150
#define STM32_DMA2_CH6_HANDLER Vector154
#define STM32_DMA2_CH7_HANDLER Vector158
#define STM32_DMA2_CH0_NUMBER 56
#define STM32_DMA2_CH1_NUMBER 57
#define STM32_DMA2_CH2_NUMBER 58
#define STM32_DMA2_CH3_NUMBER 59
#define STM32_DMA2_CH4_NUMBER 60
#define STM32_DMA2_CH5_NUMBER 68
#define STM32_DMA2_CH6_NUMBER 69
#define STM32_DMA2_CH7_NUMBER 70
/* ETH attributes.*/
#define STM32_HAS_ETH TRUE
#define STM32_ETH_HANDLER Vector134
#define STM32_ETH_NUMBER 61
/* EXTI attributes.*/
#define STM32_EXTI_ENHANCED
@ -167,31 +108,13 @@
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
#define STM32_I2C1_EVENT_HANDLER VectorBC
#define STM32_I2C1_ERROR_HANDLER VectorC0
#define STM32_I2C1_EVENT_NUMBER 31
#define STM32_I2C1_ERROR_NUMBER 32
#define STM32_HAS_I2C2 TRUE
#define STM32_I2C2_EVENT_HANDLER VectorC4
#define STM32_I2C2_ERROR_HANDLER VectorC8
#define STM32_I2C2_EVENT_NUMBER 33
#define STM32_I2C2_ERROR_NUMBER 34
#define STM32_HAS_I2C3 TRUE
#define STM32_I2C3_EVENT_HANDLER Vector160
#define STM32_I2C3_ERROR_HANDLER Vector164
#define STM32_I2C3_EVENT_NUMBER 72
#define STM32_I2C3_ERROR_NUMBER 73
#define STM32_HAS_I2C4 TRUE
#define STM32_I2C4_EVENT_HANDLER Vector1BC
#define STM32_I2C4_ERROR_HANDLER Vector1C0
#define STM32_I2C4_EVENT_NUMBER 95
#define STM32_I2C4_ERROR_NUMBER 96
/* QUADSPI attributes.*/
#define STM32_HAS_QUADSPI1 FALSE
#define STM32_HAS_QUADSPI1 TRUE
#define STM32_HAS_QUADSPI2 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@ -213,35 +136,23 @@
#define STM32_HAS_SPI1 TRUE
#define STM32_SPI1_SUPPORTS_I2S TRUE
#define STM32_SPI1_I2S_FULLDUPLEX TRUE
#define STM32_SPI1_HANDLER VectorCC
#define STM32_SPI1_NUMBER 35
#define STM32_HAS_SPI2 TRUE
#define STM32_SPI2_SUPPORTS_I2S TRUE
#define STM32_SPI2_I2S_FULLDUPLEX TRUE
#define STM32_SPI2_HANDLER VectorD0
#define STM32_SPI2_NUMBER 36
#define STM32_HAS_SPI3 TRUE
#define STM32_SPI3_SUPPORTS_I2S TRUE
#define STM32_SPI3_I2S_FULLDUPLEX TRUE
#define STM32_SPI3_HANDLER Vector10C
#define STM32_SPI3_NUMBER 51
#define STM32_HAS_SPI4 TRUE
#define STM32_SPI4_SUPPORTS_I2S FALSE
#define STM32_SPI4_HANDLER Vector190
#define STM32_SPI4_NUMBER 84
#define STM32_HAS_SPI5 TRUE
#define STM32_SPI5_SUPPORTS_I2S FALSE
#define STM32_SPI5_HANDLER Vector194
#define STM32_SPI5_NUMBER 85
#define STM32_HAS_SPI6 TRUE
#define STM32_SPI6_SUPPORTS_I2S FALSE
#define STM32_SPI6_HANDLER Vector198
#define STM32_SPI6_NUMBER 86
/* TIM attributes.*/
#define STM32_TIM_MAX_CHANNELS 6
@ -249,90 +160,58 @@
#define STM32_HAS_TIM1 TRUE
#define STM32_TIM1_IS_32BITS FALSE
#define STM32_TIM1_CHANNELS 6
#define STM32_TIM1_UP_HANDLER VectorA4
#define STM32_TIM1_CC_HANDLER VectorAC
#define STM32_TIM1_UP_NUMBER 25
#define STM32_TIM1_CC_NUMBER 27
#define STM32_HAS_TIM2 TRUE
#define STM32_TIM2_IS_32BITS TRUE
#define STM32_TIM2_CHANNELS 4
#define STM32_TIM2_HANDLER VectorB0
#define STM32_TIM2_NUMBER 28
#define STM32_HAS_TIM3 TRUE
#define STM32_TIM3_IS_32BITS FALSE
#define STM32_TIM3_CHANNELS 4
#define STM32_TIM3_HANDLER VectorB4
#define STM32_TIM3_NUMBER 29
#define STM32_HAS_TIM4 TRUE
#define STM32_TIM4_IS_32BITS FALSE
#define STM32_TIM4_CHANNELS 4
#define STM32_TIM4_HANDLER VectorB8
#define STM32_TIM4_NUMBER 30
#define STM32_HAS_TIM5 TRUE
#define STM32_TIM5_IS_32BITS TRUE
#define STM32_TIM5_CHANNELS 4
#define STM32_TIM5_HANDLER Vector108
#define STM32_TIM5_NUMBER 50
#define STM32_HAS_TIM6 TRUE
#define STM32_TIM6_IS_32BITS FALSE
#define STM32_TIM6_CHANNELS 0
#define STM32_TIM6_HANDLER Vector118
#define STM32_TIM6_NUMBER 54
#define STM32_HAS_TIM7 TRUE
#define STM32_TIM7_IS_32BITS FALSE
#define STM32_TIM7_CHANNELS 0
#define STM32_TIM7_HANDLER Vector11C
#define STM32_TIM7_NUMBER 55
#define STM32_HAS_TIM8 TRUE
#define STM32_TIM8_IS_32BITS FALSE
#define STM32_TIM8_CHANNELS 6
#define STM32_TIM8_UP_HANDLER VectorF0
#define STM32_TIM8_CC_HANDLER VectorF8
#define STM32_TIM8_UP_NUMBER 44
#define STM32_TIM8_CC_NUMBER 46
#define STM32_HAS_TIM12 TRUE
#define STM32_TIM12_IS_32BITS FALSE
#define STM32_TIM12_CHANNELS 2
#define STM32_TIM12_HANDLER VectorEC
#define STM32_TIM12_NUMBER 43
#define STM32_HAS_TIM13 TRUE
#define STM32_TIM13_IS_32BITS FALSE
#define STM32_TIM13_CHANNELS 1
#define STM32_TIM13_HANDLER VectorF0
#define STM32_TIM13_NUMBER 44
#define STM32_HAS_TIM14 TRUE
#define STM32_TIM14_IS_32BITS FALSE
#define STM32_TIM14_CHANNELS 1
#define STM32_TIM14_HANDLER VectorF4
#define STM32_TIM14_NUMBER 45
#define STM32_HAS_TIM15 FALSE
#define STM32_TIM15_IS_32BITS FALSE
#define STM32_TIM15_CHANNELS 2
#define STM32_TIM15_HANDLER Vector210
#define STM32_TIM15_NUMBER 116
#define STM32_HAS_TIM16 FALSE
#define STM32_TIM16_IS_32BITS FALSE
#define STM32_TIM16_CHANNELS 1
#define STM32_TIM16_HANDLER Vector214
#define STM32_TIM16_NUMBER 117
#define STM32_HAS_TIM17 FALSE
#define STM32_TIM17_IS_32BITS FALSE
#define STM32_TIM17_CHANNELS 1
#define STM32_TIM17_HANDLER Vector218
#define STM32_TIM17_NUMBER 118
#define STM32_HAS_TIM9 FALSE
#define STM32_HAS_TIM10 FALSE
@ -345,58 +224,22 @@
/* USART attributes.*/
#define STM32_HAS_USART1 TRUE
#define STM32_USART1_HANDLER VectorD4
#define STM32_USART1_NUMBER 37
#define STM32_HAS_USART2 TRUE
#define STM32_USART2_HANDLER VectorD8
#define STM32_USART2_NUMBER 38
#define STM32_HAS_USART3 TRUE
#define STM32_USART3_HANDLER VectorDC
#define STM32_USART3_NUMBER 39
#define STM32_HAS_UART4 TRUE
#define STM32_UART4_HANDLER Vector110
#define STM32_UART4_NUMBER 52
#define STM32_HAS_UART5 TRUE
#define STM32_UART5_HANDLER Vector114
#define STM32_UART5_NUMBER 53
#define STM32_HAS_USART6 TRUE
#define STM32_USART6_HANDLER Vector15C
#define STM32_USART6_NUMBER 71
#define STM32_HAS_UART7 TRUE
#define STM32_UART7_HANDLER Vector188
#define STM32_UART7_NUMBER 82
#define STM32_HAS_UART8 TRUE
#define STM32_UART8_HANDLER Vector18C
#define STM32_UART8_NUMBER 83
#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_OTG_STEPPING 2
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_ENDPOINTS 8
#define STM32_OTG1_HANDLER Vector1D4
#define STM32_OTG1_EP1OUT_HANDLER Vector1C8
#define STM32_OTG1_EP1IN_HANDLER Vector1CC
#define STM32_OTG1_NUMBER 101
#define STM32_OTG1_EP1OUT_NUMBER 98
#define STM32_OTG1_EP1IN_NUMBER 99
#define STM32_HAS_OTG2 TRUE
#define STM32_OTG2_ENDPOINTS 8
#define STM32_OTG2_HANDLER Vector174
#define STM32_OTG2_EP1OUT_HANDLER Vector168
#define STM32_OTG2_EP1IN_HANDLER Vector16C
#define STM32_OTG2_NUMBER 77
#define STM32_OTG2_EP1OUT_NUMBER 74
#define STM32_OTG2_EP1IN_NUMBER 75
#define STM32_HAS_USB FALSE
@ -406,21 +249,13 @@
/* LTDC attributes.*/
#define STM32_HAS_LTDC TRUE
#define STM32_LTDC_EV_HANDLER Vector1A0
#define STM32_LTDC_ER_HANDLER Vector1A4
#define STM32_LTDC_EV_NUMBER 88
#define STM32_LTDC_ER_NUMBER 89
/* DMA2D attributes.*/
#define STM32_HAS_DMA2D TRUE
#define STM32_DMA2D_HANDLER Vector1A8
#define STM32_DMA2D_NUMBER 90
/* FSMC attributes.*/
#define STM32_HAS_FSMC TRUE
#define STM32_FSMC_IS_FMC TRUE
#define STM32_FSMC_HANDLER Vector100
#define STM32_FSMC_NUMBER 48
/* CRC attributes.*/
#define STM32_HAS_CRC TRUE
@ -428,8 +263,6 @@
/* DCMI attributes.*/
#define STM32_HAS_DCMI TRUE
#define STM32_DCMI_HANDLER Vector178
#define STM32_DCMI_NUMBER 78
#endif /* defined(STM32H743xx) || defined(STM32H753xx) */
/** @} */

2
readme.txt
View File

@ -84,7 +84,7 @@
inclusion modules (.inc) containing shared handlers. The new modules
can be included by the various STM32 platforms. So far the new system
has been implemented for STM32G0, STM32G4, STM32L0, STM32L4, STM32L4+,
STM32F7. It shall be gradually introduced for all the others.
STM32F7, STM3277. It shall be gradually introduced for all the others.
- HAL: Idle callback support for STM32 USARTv1 UART driver.
- LIB: Added support for asynchronous jobs queues to OSLIB.
- LIB: Added support for delegate threads to OSLIB.

89
testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/mcuconf.h
View File

@ -175,9 +175,32 @@
#define STM32_IRQ_EXTI17_PRIORITY 15
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_PRIORITY 15
#define STM32_IRQ_EXTI22_PRIORITY 15
#define STM32_IRQ_EXTI20_21_PRIORITY 6
#define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7
#define STM32_IRQ_TIM2_PRIORITY 7
#define STM32_IRQ_TIM3_PRIORITY 7
#define STM32_IRQ_TIM4_PRIORITY 7
#define STM32_IRQ_TIM5_PRIORITY 7
#define STM32_IRQ_TIM6_PRIORITY 7
#define STM32_IRQ_TIM7_PRIORITY 7
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_TIM15_PRIORITY 7
#define STM32_IRQ_TIM16_PRIORITY 7
#define STM32_IRQ_TIM17_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_UART5_PRIORITY 12
#define STM32_IRQ_USART6_PRIORITY 12
#define STM32_IRQ_UART7_PRIORITY 12
#define STM32_IRQ_UART8_PRIORITY 12
/*
* ADC driver system settings.
@ -229,22 +252,12 @@
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM13 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#define STM32_GPT_USE_TIM15 FALSE
#define STM32_GPT_USE_TIM16 FALSE
#define STM32_GPT_USE_TIM17 FALSE
/*
* I2C driver system settings.
@ -281,14 +294,12 @@
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
#define STM32_ICU_USE_TIM12 FALSE
#define STM32_ICU_USE_TIM13 FALSE
#define STM32_ICU_USE_TIM14 FALSE
#define STM32_ICU_USE_TIM15 FALSE
#define STM32_ICU_USE_TIM16 FALSE
#define STM32_ICU_USE_TIM17 FALSE
/*
* MAC driver system settings.
@ -311,14 +322,12 @@
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
#define STM32_PWM_USE_TIM12 FALSE
#define STM32_PWM_USE_TIM13 FALSE
#define STM32_PWM_USE_TIM14 FALSE
#define STM32_PWM_USE_TIM15 FALSE
#define STM32_PWM_USE_TIM16 FALSE
#define STM32_PWM_USE_TIM17 FALSE
/*
* RTC driver system settings.
@ -352,14 +361,6 @@
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USE_UART7 FALSE
#define STM32_SERIAL_USE_UART8 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
#define STM32_SERIAL_UART7_PRIORITY 12
#define STM32_SERIAL_UART8_PRIORITY 12
/*
* SPI driver system settings.
@ -434,12 +435,6 @@
#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0

89
testhal/STM32/multi/DAC/cfg/stm32h743_nucleo144/mcuconf.h
View File

@ -175,9 +175,32 @@
#define STM32_IRQ_EXTI17_PRIORITY 15
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_PRIORITY 15
#define STM32_IRQ_EXTI22_PRIORITY 15
#define STM32_IRQ_EXTI20_21_PRIORITY 6
#define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7
#define STM32_IRQ_TIM2_PRIORITY 7
#define STM32_IRQ_TIM3_PRIORITY 7
#define STM32_IRQ_TIM4_PRIORITY 7
#define STM32_IRQ_TIM5_PRIORITY 7
#define STM32_IRQ_TIM6_PRIORITY 7
#define STM32_IRQ_TIM7_PRIORITY 7
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_TIM15_PRIORITY 7
#define STM32_IRQ_TIM16_PRIORITY 7
#define STM32_IRQ_TIM17_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_UART5_PRIORITY 12
#define STM32_IRQ_USART6_PRIORITY 12
#define STM32_IRQ_UART7_PRIORITY 12
#define STM32_IRQ_UART8_PRIORITY 12
/*
* ADC driver system settings.
@ -229,22 +252,12 @@
#define STM32_GPT_USE_TIM6 TRUE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM13 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#define STM32_GPT_USE_TIM15 FALSE
#define STM32_GPT_USE_TIM16 FALSE
#define STM32_GPT_USE_TIM17 FALSE
/*
* I2C driver system settings.
@ -281,14 +294,12 @@
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
#define STM32_ICU_USE_TIM12 FALSE
#define STM32_ICU_USE_TIM13 FALSE
#define STM32_ICU_USE_TIM14 FALSE
#define STM32_ICU_USE_TIM15 FALSE
#define STM32_ICU_USE_TIM16 FALSE
#define STM32_ICU_USE_TIM17 FALSE
/*
* MAC driver system settings.
@ -311,14 +322,12 @@
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
#define STM32_PWM_USE_TIM12 FALSE
#define STM32_PWM_USE_TIM13 FALSE
#define STM32_PWM_USE_TIM14 FALSE
#define STM32_PWM_USE_TIM15 FALSE
#define STM32_PWM_USE_TIM16 FALSE
#define STM32_PWM_USE_TIM17 FALSE
/*
* RTC driver system settings.
@ -352,14 +361,6 @@
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USE_UART7 FALSE
#define STM32_SERIAL_USE_UART8 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
#define STM32_SERIAL_UART7_PRIORITY 12
#define STM32_SERIAL_UART8_PRIORITY 12
/*
* SPI driver system settings.
@ -434,12 +435,6 @@
#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0

89
testhal/STM32/multi/SPI/cfg/stm32h743_nucleo144/mcuconf.h
View File

@ -175,9 +175,32 @@
#define STM32_IRQ_EXTI17_PRIORITY 15
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_PRIORITY 15
#define STM32_IRQ_EXTI22_PRIORITY 15
#define STM32_IRQ_EXTI20_21_PRIORITY 6
#define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7
#define STM32_IRQ_TIM2_PRIORITY 7
#define STM32_IRQ_TIM3_PRIORITY 7
#define STM32_IRQ_TIM4_PRIORITY 7
#define STM32_IRQ_TIM5_PRIORITY 7
#define STM32_IRQ_TIM6_PRIORITY 7
#define STM32_IRQ_TIM7_PRIORITY 7
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_TIM15_PRIORITY 7
#define STM32_IRQ_TIM16_PRIORITY 7
#define STM32_IRQ_TIM17_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_UART5_PRIORITY 12
#define STM32_IRQ_USART6_PRIORITY 12
#define STM32_IRQ_UART7_PRIORITY 12
#define STM32_IRQ_UART8_PRIORITY 12
/*
* ADC driver system settings.
@ -229,22 +252,12 @@
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM13 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#define STM32_GPT_USE_TIM15 FALSE
#define STM32_GPT_USE_TIM16 FALSE
#define STM32_GPT_USE_TIM17 FALSE
/*
* I2C driver system settings.
@ -281,14 +294,12 @@
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
#define STM32_ICU_USE_TIM12 FALSE
#define STM32_ICU_USE_TIM13 FALSE
#define STM32_ICU_USE_TIM14 FALSE
#define STM32_ICU_USE_TIM15 FALSE
#define STM32_ICU_USE_TIM16 FALSE
#define STM32_ICU_USE_TIM17 FALSE
/*
* MAC driver system settings.
@ -311,14 +322,12 @@
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
#define STM32_PWM_USE_TIM12 FALSE
#define STM32_PWM_USE_TIM13 FALSE
#define STM32_PWM_USE_TIM14 FALSE
#define STM32_PWM_USE_TIM15 FALSE
#define STM32_PWM_USE_TIM16 FALSE
#define STM32_PWM_USE_TIM17 FALSE
/*
* RTC driver system settings.
@ -352,14 +361,6 @@
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USE_UART7 FALSE
#define STM32_SERIAL_USE_UART8 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
#define STM32_SERIAL_UART7_PRIORITY 12
#define STM32_SERIAL_UART8_PRIORITY 12
/*
* SPI driver system settings.
@ -434,12 +435,6 @@
#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0

89
testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h
View File

@ -175,9 +175,32 @@
#define STM32_IRQ_EXTI17_PRIORITY 15
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_PRIORITY 15
#define STM32_IRQ_EXTI22_PRIORITY 15
#define STM32_IRQ_EXTI20_21_PRIORITY 6
#define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7
#define STM32_IRQ_TIM2_PRIORITY 7
#define STM32_IRQ_TIM3_PRIORITY 7
#define STM32_IRQ_TIM4_PRIORITY 7
#define STM32_IRQ_TIM5_PRIORITY 7
#define STM32_IRQ_TIM6_PRIORITY 7
#define STM32_IRQ_TIM7_PRIORITY 7
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_TIM15_PRIORITY 7
#define STM32_IRQ_TIM16_PRIORITY 7
#define STM32_IRQ_TIM17_PRIORITY 7
#define STM32_IRQ_USART1_PRIORITY 12
#define STM32_IRQ_USART2_PRIORITY 12
#define STM32_IRQ_USART3_PRIORITY 12
#define STM32_IRQ_UART4_PRIORITY 12
#define STM32_IRQ_UART5_PRIORITY 12
#define STM32_IRQ_USART6_PRIORITY 12
#define STM32_IRQ_UART7_PRIORITY 12
#define STM32_IRQ_UART8_PRIORITY 12
/*
* ADC driver system settings.
@ -229,22 +252,12 @@
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM13 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#define STM32_GPT_USE_TIM15 FALSE
#define STM32_GPT_USE_TIM16 FALSE
#define STM32_GPT_USE_TIM17 FALSE
/*
* I2C driver system settings.
@ -281,14 +294,12 @@
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
#define STM32_ICU_USE_TIM12 FALSE
#define STM32_ICU_USE_TIM13 FALSE
#define STM32_ICU_USE_TIM14 FALSE
#define STM32_ICU_USE_TIM15 FALSE
#define STM32_ICU_USE_TIM16 FALSE
#define STM32_ICU_USE_TIM17 FALSE
/*
* MAC driver system settings.
@ -311,14 +322,12 @@
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
#define STM32_PWM_USE_TIM12 FALSE
#define STM32_PWM_USE_TIM13 FALSE
#define STM32_PWM_USE_TIM14 FALSE
#define STM32_PWM_USE_TIM15 FALSE
#define STM32_PWM_USE_TIM16 FALSE
#define STM32_PWM_USE_TIM17 FALSE
/*
* RTC driver system settings.
@ -352,14 +361,6 @@
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USE_UART7 FALSE
#define STM32_SERIAL_USE_UART8 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
#define STM32_SERIAL_UART7_PRIORITY 12
#define STM32_SERIAL_UART8_PRIORITY 12
/*
* SPI driver system settings.
@ -434,12 +435,6 @@
#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0

16
tools/ftl/processors/conf/mcuconf_stm32f72xxx/mcuconf.h.ftl
View File

@ -142,14 +142,14 @@
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY ${doc.STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"7"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"7"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"7"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"7"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"7"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"7"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"7"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"12"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"12"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"12"}
/*
* ADC driver system settings.

16
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@ -141,14 +141,14 @@
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY ${doc.STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"7"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"7"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"7"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"7"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"7"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"7"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"7"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"12"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"12"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"12"}
/*
* ADC driver system settings.

16
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@ -145,14 +145,14 @@
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY ${doc.STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"7"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"7"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"7"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"7"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"7"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"7"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"7"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"12"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"12"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"12"}
/*
* ADC driver system settings.

10
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@ -122,11 +122,11 @@
#define STM32_IRQ_TIM8_UP_PRIORITY ${doc.STM32_IRQ_TIM8_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"3"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.

12
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@ -131,12 +131,12 @@
#define STM32_IRQ_TIM20_UP_PRIORITY ${doc.STM32_IRQ_TIM20_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM20_CC_PRIORITY ${doc.STM32_IRQ_TIM20_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"3"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"3"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.

91
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@ -183,12 +183,35 @@
#define STM32_IRQ_EXTI5_9_PRIORITY ${doc.STM32_IRQ_EXTI5_9_PRIORITY!"6"}
#define STM32_IRQ_EXTI10_15_PRIORITY ${doc.STM32_IRQ_EXTI10_15_PRIORITY!"6"}
#define STM32_IRQ_EXTI16_PRIORITY ${doc.STM32_IRQ_EXTI16_PRIORITY!"6"}
#define STM32_IRQ_EXTI17_PRIORITY ${doc.STM32_IRQ_EXTI17_PRIORITY!"15"}
#define STM32_IRQ_EXTI17_PRIORITY ${doc.STM32_IRQ_EXTI17_PRIORITY!"6"}
#define STM32_IRQ_EXTI18_PRIORITY ${doc.STM32_IRQ_EXTI18_PRIORITY!"6"}
#define STM32_IRQ_EXTI19_PRIORITY ${doc.STM32_IRQ_EXTI19_PRIORITY!"6"}
#define STM32_IRQ_EXTI20_PRIORITY ${doc.STM32_IRQ_EXTI20_PRIORITY!"6"}
#define STM32_IRQ_EXTI21_PRIORITY ${doc.STM32_IRQ_EXTI21_PRIORITY!"15"}
#define STM32_IRQ_EXTI22_PRIORITY ${doc.STM32_IRQ_EXTI22_PRIORITY!"15"}
#define STM32_IRQ_EXTI20_21_PRIORITY ${doc.STM32_IRQ_EXTI20_21_PRIORITY!"6"}
#define STM32_IRQ_TIM1_UP_PRIORITY ${doc.STM32_IRQ_TIM1_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM1_CC_PRIORITY ${doc.STM32_IRQ_TIM1_CC_PRIORITY!"7"}
#define STM32_IRQ_TIM2_PRIORITY ${doc.STM32_IRQ_TIM2_PRIORITY!"7"}
#define STM32_IRQ_TIM3_PRIORITY ${doc.STM32_IRQ_TIM3_PRIORITY!"7"}
#define STM32_IRQ_TIM4_PRIORITY ${doc.STM32_IRQ_TIM4_PRIORITY!"7"}
#define STM32_IRQ_TIM5_PRIORITY ${doc.STM32_IRQ_TIM5_PRIORITY!"7"}
#define STM32_IRQ_TIM6_PRIORITY ${doc.STM32_IRQ_TIM6_PRIORITY!"7"}
#define STM32_IRQ_TIM7_PRIORITY ${doc.STM32_IRQ_TIM7_PRIORITY!"7"}
#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY ${doc.STM32_IRQ_TIM8_BRK_TIM12_PRIORITY!"7"}
#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY ${doc.STM32_IRQ_TIM8_UP_TIM13_PRIORITY!"7"}
#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY ${doc.STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_TIM15_PRIORITY ${doc.STM32_IRQ_TIM15_PRIORITY!"7"}
#define STM32_IRQ_TIM16_PRIORITY ${doc.STM32_IRQ_TIM16_PRIORITY!"7"}
#define STM32_IRQ_TIM17_PRIORITY ${doc.STM32_IRQ_TIM17_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"12"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"12"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"12"}
/*
* ADC driver system settings.
@ -240,22 +263,12 @@
#define STM32_GPT_USE_TIM6 ${doc.STM32_GPT_USE_TIM6!"FALSE"}
#define STM32_GPT_USE_TIM7 ${doc.STM32_GPT_USE_TIM7!"FALSE"}
#define STM32_GPT_USE_TIM8 ${doc.STM32_GPT_USE_TIM8!"FALSE"}
#define STM32_GPT_USE_TIM9 ${doc.STM32_GPT_USE_TIM9!"FALSE"}
#define STM32_GPT_USE_TIM11 ${doc.STM32_GPT_USE_TIM11!"FALSE"}
#define STM32_GPT_USE_TIM12 ${doc.STM32_GPT_USE_TIM12!"FALSE"}
#define STM32_GPT_USE_TIM13 ${doc.STM32_GPT_USE_TIM13!"FALSE"}
#define STM32_GPT_USE_TIM14 ${doc.STM32_GPT_USE_TIM14!"FALSE"}
#define STM32_GPT_TIM1_IRQ_PRIORITY ${doc.STM32_GPT_TIM1_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM2_IRQ_PRIORITY ${doc.STM32_GPT_TIM2_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM3_IRQ_PRIORITY ${doc.STM32_GPT_TIM3_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM4_IRQ_PRIORITY ${doc.STM32_GPT_TIM4_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM5_IRQ_PRIORITY ${doc.STM32_GPT_TIM5_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM6_IRQ_PRIORITY ${doc.STM32_GPT_TIM6_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM7_IRQ_PRIORITY ${doc.STM32_GPT_TIM7_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM8_IRQ_PRIORITY ${doc.STM32_GPT_TIM8_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM9_IRQ_PRIORITY ${doc.STM32_GPT_TIM9_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM11_IRQ_PRIORITY ${doc.STM32_GPT_TIM11_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM12_IRQ_PRIORITY ${doc.STM32_GPT_TIM12_IRQ_PRIORITY!"7"}
#define STM32_GPT_TIM14_IRQ_PRIORITY ${doc.STM32_GPT_TIM14_IRQ_PRIORITY!"7"}
#define STM32_GPT_USE_TIM15 ${doc.STM32_GPT_USE_TIM15!"FALSE"}
#define STM32_GPT_USE_TIM16 ${doc.STM32_GPT_USE_TIM16!"FALSE"}
#define STM32_GPT_USE_TIM17 ${doc.STM32_GPT_USE_TIM17!"FALSE"}
/*
* I2C driver system settings.
@ -292,14 +305,12 @@
#define STM32_ICU_USE_TIM4 ${doc.STM32_ICU_USE_TIM4!"FALSE"}
#define STM32_ICU_USE_TIM5 ${doc.STM32_ICU_USE_TIM5!"FALSE"}
#define STM32_ICU_USE_TIM8 ${doc.STM32_ICU_USE_TIM8!"FALSE"}
#define STM32_ICU_USE_TIM9 ${doc.STM32_ICU_USE_TIM9!"FALSE"}
#define STM32_ICU_TIM1_IRQ_PRIORITY ${doc.STM32_ICU_TIM1_IRQ_PRIORITY!"7"}
#define STM32_ICU_TIM2_IRQ_PRIORITY ${doc.STM32_ICU_TIM2_IRQ_PRIORITY!"7"}
#define STM32_ICU_TIM3_IRQ_PRIORITY ${doc.STM32_ICU_TIM3_IRQ_PRIORITY!"7"}
#define STM32_ICU_TIM4_IRQ_PRIORITY ${doc.STM32_ICU_TIM4_IRQ_PRIORITY!"7"}
#define STM32_ICU_TIM5_IRQ_PRIORITY ${doc.STM32_ICU_TIM5_IRQ_PRIORITY!"7"}
#define STM32_ICU_TIM8_IRQ_PRIORITY ${doc.STM32_ICU_TIM8_IRQ_PRIORITY!"7"}
#define STM32_ICU_TIM9_IRQ_PRIORITY ${doc.STM32_ICU_TIM9_IRQ_PRIORITY!"7"}
#define STM32_ICU_USE_TIM12 ${doc.STM32_ICU_USE_TIM12!"FALSE"}
#define STM32_ICU_USE_TIM13 ${doc.STM32_ICU_USE_TIM13!"FALSE"}
#define STM32_ICU_USE_TIM14 ${doc.STM32_ICU_USE_TIM14!"FALSE"}
#define STM32_ICU_USE_TIM15 ${doc.STM32_ICU_USE_TIM15!"FALSE"}
#define STM32_ICU_USE_TIM16 ${doc.STM32_ICU_USE_TIM16!"FALSE"}
#define STM32_ICU_USE_TIM17 ${doc.STM32_ICU_USE_TIM17!"FALSE"}
/*
* MAC driver system settings.
@ -322,14 +333,12 @@
#define STM32_PWM_USE_TIM4 ${doc.STM32_PWM_USE_TIM4!"FALSE"}
#define STM32_PWM_USE_TIM5 ${doc.STM32_PWM_USE_TIM5!"FALSE"}
#define STM32_PWM_USE_TIM8 ${doc.STM32_PWM_USE_TIM8!"FALSE"}
#define STM32_PWM_USE_TIM9 ${doc.STM32_PWM_USE_TIM9!"FALSE"}
#define STM32_PWM_TIM1_IRQ_PRIORITY ${doc.STM32_PWM_TIM1_IRQ_PRIORITY!"7"}
#define STM32_PWM_TIM2_IRQ_PRIORITY ${doc.STM32_PWM_TIM2_IRQ_PRIORITY!"7"}
#define STM32_PWM_TIM3_IRQ_PRIORITY ${doc.STM32_PWM_TIM3_IRQ_PRIORITY!"7"}
#define STM32_PWM_TIM4_IRQ_PRIORITY ${doc.STM32_PWM_TIM4_IRQ_PRIORITY!"7"}
#define STM32_PWM_TIM5_IRQ_PRIORITY ${doc.STM32_PWM_TIM5_IRQ_PRIORITY!"7"}
#define STM32_PWM_TIM8_IRQ_PRIORITY ${doc.STM32_PWM_TIM8_IRQ_PRIORITY!"7"}
#define STM32_PWM_TIM9_IRQ_PRIORITY ${doc.STM32_PWM_TIM9_IRQ_PRIORITY!"7"}
#define STM32_PWM_USE_TIM12 ${doc.STM32_PWM_USE_TIM12!"FALSE"}
#define STM32_PWM_USE_TIM13 ${doc.STM32_PWM_USE_TIM13!"FALSE"}
#define STM32_PWM_USE_TIM14 ${doc.STM32_PWM_USE_TIM14!"FALSE"}
#define STM32_PWM_USE_TIM15 ${doc.STM32_PWM_USE_TIM15!"FALSE"}
#define STM32_PWM_USE_TIM16 ${doc.STM32_PWM_USE_TIM16!"FALSE"}
#define STM32_PWM_USE_TIM17 ${doc.STM32_PWM_USE_TIM17!"FALSE"}
/*
* RTC driver system settings.
@ -363,14 +372,6 @@
#define STM32_SERIAL_USE_USART6 ${doc.STM32_SERIAL_USE_USART6!"FALSE"}
#define STM32_SERIAL_USE_UART7 ${doc.STM32_SERIAL_USE_UART7!"FALSE"}
#define STM32_SERIAL_USE_UART8 ${doc.STM32_SERIAL_USE_UART8!"FALSE"}
#define STM32_SERIAL_USART1_PRIORITY ${doc.STM32_SERIAL_USART1_PRIORITY!"12"}
#define STM32_SERIAL_USART2_PRIORITY ${doc.STM32_SERIAL_USART2_PRIORITY!"12"}
#define STM32_SERIAL_USART3_PRIORITY ${doc.STM32_SERIAL_USART3_PRIORITY!"12"}
#define STM32_SERIAL_UART4_PRIORITY ${doc.STM32_SERIAL_UART4_PRIORITY!"12"}
#define STM32_SERIAL_UART5_PRIORITY ${doc.STM32_SERIAL_UART5_PRIORITY!"12"}
#define STM32_SERIAL_USART6_PRIORITY ${doc.STM32_SERIAL_USART6_PRIORITY!"12"}
#define STM32_SERIAL_UART7_PRIORITY ${doc.STM32_SERIAL_UART7_PRIORITY!"12"}
#define STM32_SERIAL_UART8_PRIORITY ${doc.STM32_SERIAL_UART8_PRIORITY!"12"}
/*
* SPI driver system settings.
@ -445,12 +446,6 @@
#define STM32_UART_UART7_TX_DMA_STREAM ${doc.STM32_UART_UART7_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
#define STM32_UART_UART8_RX_DMA_STREAM ${doc.STM32_UART_UART8_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
#define STM32_UART_UART8_TX_DMA_STREAM ${doc.STM32_UART_UART8_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
#define STM32_UART_USART1_IRQ_PRIORITY ${doc.STM32_UART_USART1_IRQ_PRIORITY!"12"}
#define STM32_UART_USART2_IRQ_PRIORITY ${doc.STM32_UART_USART2_IRQ_PRIORITY!"12"}
#define STM32_UART_USART3_IRQ_PRIORITY ${doc.STM32_UART_USART3_IRQ_PRIORITY!"12"}
#define STM32_UART_UART4_IRQ_PRIORITY ${doc.STM32_UART_UART4_IRQ_PRIORITY!"12"}
#define STM32_UART_UART5_IRQ_PRIORITY ${doc.STM32_UART_UART5_IRQ_PRIORITY!"12"}
#define STM32_UART_USART6_IRQ_PRIORITY ${doc.STM32_UART_USART6_IRQ_PRIORITY!"12"}
#define STM32_UART_USART1_DMA_PRIORITY ${doc.STM32_UART_USART1_DMA_PRIORITY!"0"}
#define STM32_UART_USART2_DMA_PRIORITY ${doc.STM32_UART_USART2_DMA_PRIORITY!"0"}
#define STM32_UART_USART3_DMA_PRIORITY ${doc.STM32_UART_USART3_DMA_PRIORITY!"0"}

6
tools/ftl/processors/conf/mcuconf_stm32l432xx/mcuconf.h.ftl
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@ -122,9 +122,9 @@
#define STM32_IRQ_TIM6_PRIORITY ${doc.STM32_IRQ_TIM6_PRIORITY!"7"}
#define STM32_IRQ_TIM7_PRIORITY ${doc.STM32_IRQ_TIM7_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.

10
tools/ftl/processors/conf/mcuconf_stm32l452xx/mcuconf.h.ftl
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@ -125,11 +125,11 @@
#define STM32_IRQ_TIM3_PRIORITY ${doc.STM32_IRQ_TIM3_PRIORITY!"7"}
#define STM32_IRQ_TIM6_PRIORITY ${doc.STM32_IRQ_TIM6_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"3"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.

12
tools/ftl/processors/conf/mcuconf_stm32l476xx/mcuconf.h.ftl
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@ -133,12 +133,12 @@
#define STM32_IRQ_TIM8_UP_PRIORITY ${doc.STM32_IRQ_TIM8_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"3"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"3"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.

12
tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
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@ -137,12 +137,12 @@
#define STM32_IRQ_TIM8_UP_PRIORITY ${doc.STM32_IRQ_TIM8_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"3"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"3"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.

12
tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
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@ -149,12 +149,12 @@
#define STM32_IRQ_TIM8_UP_PRIORITY ${doc.STM32_IRQ_TIM8_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM8_CC_PRIORITY ${doc.STM32_IRQ_TIM8_CC_PRIORITY!"7"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"3"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"3"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"3"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
#define STM32_IRQ_USART3_PRIORITY ${doc.STM32_IRQ_USART3_PRIORITY!"12"}
#define STM32_IRQ_UART4_PRIORITY ${doc.STM32_IRQ_UART4_PRIORITY!"12"}
#define STM32_IRQ_UART5_PRIORITY ${doc.STM32_IRQ_UART5_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.