OCTOSPIv2 now working in STR mode, still problems in DTR mode.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15560 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -84,17 +84,9 @@ static void wspi_lld_serve_mdma_interrupt(WSPIDriver *wspip, uint32_t flags) {
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(void)wspip;
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(void)wspip;
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(void)flags;
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(void)flags;
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if (((flags & STM32_MDMA_CISR_CTCIF) != 0U) &&
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(wspip->state == WSPI_RECEIVE)) {
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/* Portable WSPI ISR code defined in the high level driver, note, it is
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a macro.*/
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_wspi_isr_code(wspip);
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mdmaChannelDisableX(wspip->mdma);
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}
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/* DMA errors handling.*/
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/* DMA errors handling.*/
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#if defined(STM32_WSPI_MDMA_ERROR_HOOK)
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#if defined(STM32_WSPI_MDMA_ERROR_HOOK)
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else if ((flags & STM32_MDMA_CISR_TEIF) != 0) {
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if ((flags & STM32_MDMA_CISR_TEIF) != 0) {
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STM32_WSPI_MDMA_ERROR_HOOK(wspip);
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STM32_WSPI_MDMA_ERROR_HOOK(wspip);
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}
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}
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#endif
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#endif
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@ -323,7 +315,6 @@ void wspi_lld_receive(WSPIDriver *wspip, const wspi_command_t *cmdp,
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STM32_MDMA_CTCR_DINC_INC | /* Destination incr. */
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STM32_MDMA_CTCR_DINC_INC | /* Destination incr. */
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STM32_MDMA_CTCR_SINC_FIXED; /* Source fixed. */
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STM32_MDMA_CTCR_SINC_FIXED; /* Source fixed. */
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uint32_t ccr = STM32_MDMA_CCR_PL(STM32_WSPI_OCTOSPI1_MDMA_PRIORITY) |
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uint32_t ccr = STM32_MDMA_CCR_PL(STM32_WSPI_OCTOSPI1_MDMA_PRIORITY) |
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STM32_MDMA_CCR_CTCIE | /* On transfer complete.*/
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STM32_MDMA_CCR_TEIE; /* On transfer error. */
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STM32_MDMA_CCR_TEIE; /* On transfer error. */
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/* MDMA initializations.*/
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/* MDMA initializations.*/
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