From 673b86136ea8b15a7813ae5ff22829ab6c5d99ef Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Mon, 8 Jul 2019 14:43:44 +0000 Subject: [PATCH] EXTIv1 adapted to G0. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12887 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../RT-STM32G071RB-NUCLEO64/cfg/halconf.h | 4 ++-- os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h | 22 ++++++++++++++++++- os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c | 13 +++++++++++ os/hal/ports/STM32/STM32G0xx/hal_lld.h | 2 +- os/hal/ports/STM32/STM32G0xx/platform.mk | 2 +- os/hal/ports/STM32/STM32G0xx/stm32_isr.c | 12 +++++----- os/hal/ports/STM32/STM32G0xx/stm32_registry.h | 2 ++ 7 files changed, 46 insertions(+), 11 deletions(-) diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h index 7f0d25903..757d5a99b 100644 --- a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h +++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h @@ -210,7 +210,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) -#define PAL_USE_CALLBACKS FALSE +#define PAL_USE_CALLBACKS TRUE #endif /** @@ -218,7 +218,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) -#define PAL_USE_WAIT FALSE +#define PAL_USE_WAIT TRUE #endif /*===========================================================================*/ diff --git a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h index 63f192ee2..bba8e54a2 100644 --- a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h +++ b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h @@ -44,8 +44,17 @@ #define EXTI_MODE_ACTION_EVENT 4U /**< @brief Event mode. */ /** @} */ +/** + * @name EXTI types + * @{ + */ +#define EXTI_TYPE_CLASSIC 0 /**< @brief Classic EXTI. */ +#define EXTI_TYPE_NEWG0 1 /**< @brief EXTI introduced in G0. */ +/** @} */ + /* Handling differences in ST headers.*/ -#if !defined(STM32H7XX) && !defined(STM32L4XX) && !defined(STM32L4XXP) +#if !defined(STM32H7XX) && !defined(STM32L4XX) && !defined(STM32L4XXP) && \ + !defined(STM32G0XX) #define EMR1 EMR #define IMR1 IMR #define PR1 PR @@ -57,6 +66,17 @@ /* Driver pre-compile time settings. */ /*===========================================================================*/ +/* If not defined then it is a classic EXTI (without EXTICR and separate PR + registers for raising and falling edges.*/ +#if !defined(STM32_EXTI_TYPE) +#define STM32_EXTI_TYPE EXTI_TYPE_CLASSIC +#endif + +#if (STM32_EXTI_TYPE != EXTI_TYPE_CLASSIC) && \ + (STM32_EXTI_TYPE != EXTI_TYPE_NEWG0) +#error "invalid STM32_EXTI_TYPE" +#endif + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c index 78d52b94d..fd8d0bf01 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c @@ -173,7 +173,11 @@ void _pal_lld_enablepadevent(ioportid_t port, portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; /* Port selection in SYSCFG.*/ +#if STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC SYSCFG->EXTICR[cridx] = (SYSCFG->EXTICR[cridx] & crmask) | (portidx << croff); +#else + EXTI->EXTICR[cridx] = (EXTI->EXTICR[cridx] & crmask) | (portidx << croff); +#endif /* Programming edge registers.*/ if (mode & PAL_EVENT_MODE_RISING_EDGE) @@ -225,7 +229,11 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) { 0x400 intervals in memory space. So far this is true for all devices.*/ portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; +#if STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC crport = (SYSCFG->EXTICR[cridx] >> croff) & 0xFU; +#else + crport = (EXTI->EXTICR[cridx] >> croff) & 0xFU; +#endif osalDbgAssert(crport == portidx, "channel mapped on different port"); @@ -242,7 +250,12 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) { EXTI->EMR1 &= ~padmask; EXTI->RTSR1 = rtsr1 & ~padmask; EXTI->FTSR1 = ftsr1 & ~padmask; +#if STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC EXTI->PR1 = padmask; +#else + EXTI->RPR1 = padmask; + EXTI->FPR1 = padmask; +#endif #endif #if PAL_USE_CALLBACKS || PAL_USE_WAIT diff --git a/os/hal/ports/STM32/STM32G0xx/hal_lld.h b/os/hal/ports/STM32/STM32G0xx/hal_lld.h index f87fd6a44..6f6eca04e 100644 --- a/os/hal/ports/STM32/STM32G0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32G0xx/hal_lld.h @@ -1540,7 +1540,7 @@ #include "nvic.h" #include "stm32_isr.h" #include "stm32_dma.h" -//#include "stm32_exti.h" +#include "stm32_exti.h" #include "stm32_rcc.h" #ifdef __cplusplus diff --git a/os/hal/ports/STM32/STM32G0xx/platform.mk b/os/hal/ports/STM32/STM32G0xx/platform.mk index bc9e2b3d5..d8e8aa535 100644 --- a/os/hal/ports/STM32/STM32G0xx/platform.mk +++ b/os/hal/ports/STM32/STM32G0xx/platform.mk @@ -28,7 +28,7 @@ endif #include $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/driver.mk #include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk -#include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk +include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk #include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk #include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_isr.c b/os/hal/ports/STM32/STM32G0xx/stm32_isr.c index 329bb6490..65bfe0d9e 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32G0xx/stm32_isr.c @@ -63,9 +63,9 @@ OSAL_IRQ_HANDLER(Vector54) { OSAL_IRQ_PROLOGUE(); - pr = EXTI->PR; + pr = EXTI->RPR1 | EXTI->FPR1; pr &= ((1U << 0) | (1U << 1)); - EXTI->PR = pr; + EXTI->RPR1 = EXTI->FPR1 = pr; exti_serve_irq(pr, 0); exti_serve_irq(pr, 1); @@ -85,9 +85,9 @@ OSAL_IRQ_HANDLER(Vector58) { OSAL_IRQ_PROLOGUE(); - pr = EXTI->PR; + pr = EXTI->RPR1 | EXTI->FPR1; pr &= ((1U << 2) | (1U << 3)); - EXTI->PR = pr; + EXTI->RPR1 = EXTI->FPR1 = pr; exti_serve_irq(pr, 2); exti_serve_irq(pr, 3); @@ -107,11 +107,11 @@ OSAL_IRQ_HANDLER(Vector5C) { OSAL_IRQ_PROLOGUE(); - pr = EXTI->PR; + pr = EXTI->RPR1 | EXTI->FPR1; pr &= ((1U << 4) | (1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) | (1U << 9) | (1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) | (1U << 14) | (1U << 15)); - EXTI->PR = pr; + EXTI->RPR1 = EXTI->FPR1 = pr; exti_serve_irq(pr, 4); exti_serve_irq(pr, 5); diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h index cfa622a29..ba97fb1e3 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h @@ -109,6 +109,7 @@ #define STM32_HAS_ETH FALSE /* EXTI attributes.*/ +#define STM32_EXTI_TYPE EXTI_TYPE_NEWG0 #define STM32_EXTI_NUM_LINES 16 #define STM32_EXTI_IMR1_MASK 0xFFF80000U @@ -303,6 +304,7 @@ #define STM32_HAS_ETH FALSE /* EXTI attributes.*/ +#define STM32_EXTI_TYPE EXTI_TYPE_NEWG0 #define STM32_EXTI_NUM_LINES 33 #define STM32_EXTI_IMR1_MASK 0xFFF80000U #define STM32_EXTI_IMR2_MASK 0xFFFFFFFFU