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ChibiOS
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SPI driver working on STM32L. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3327 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2011-09-17 15:12:48 +00:00
parent f90db59d00
commit 68a4911f73
1 changed files with 14 additions and 15 deletions
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29
testhal/STM32L1xx/SPI/main.c
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@ -36,7 +36,7 @@ static const SPIConfig hs_spicfg = {
*/ */
static const SPIConfig ls_spicfg = { static const SPIConfig ls_spicfg = {
NULL, NULL,
GPIOA, GPIOB,
12, 12,
SPI_CR1_BR_2 | SPI_CR1_BR_1 SPI_CR1_BR_2 | SPI_CR1_BR_1
}; };
@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) {
(void)p; (void)p;
chRegSetThreadName("SPI thread 1"); chRegSetThreadName("SPI thread 1");
while (TRUE) { while (TRUE) {
spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */
palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */
spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */
spiSelect(&SPID1); /* Slave Select assertion. */ spiSelect(&SPID2); /* Slave Select assertion. */
spiExchange(&SPID1, 512, spiExchange(&SPID2, 512,
txbuf, rxbuf); /* Atomic transfer operations. */ txbuf, rxbuf); /* Atomic transfer operations. */
spiUnselect(&SPID1); /* Slave Select de-assertion. */ spiUnselect(&SPID2); /* Slave Select de-assertion. */
spiReleaseBus(&SPID1); /* Ownership release. */ spiReleaseBus(&SPID2); /* Ownership release. */
} }
return 0; return 0;
} }
@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) {
(void)p; (void)p;
chRegSetThreadName("SPI thread 2"); chRegSetThreadName("SPI thread 2");
while (TRUE) { while (TRUE) {
spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */
palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */
spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */
spiSelect(&SPID1); /* Slave Select assertion. */ spiSelect(&SPID2); /* Slave Select assertion. */
spiExchange(&SPID1, 512, spiExchange(&SPID2, 512,
txbuf, rxbuf); /* Atomic transfer operations. */ txbuf, rxbuf); /* Atomic transfer operations. */
spiUnselect(&SPID1); /* Slave Select de-assertion. */ spiUnselect(&SPID2); /* Slave Select de-assertion. */
spiReleaseBus(&SPID1); /* Ownership release. */ spiReleaseBus(&SPID2); /* Ownership release. */
} }
return 0; return 0;
} }
@ -112,8 +112,7 @@ int main(void) {
PAL_STM32_OSPEED_HIGHEST); /* NSS. */ PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) |
PAL_STM32_OSPEED_HIGHEST); /* SCK. */ PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */
PAL_STM32_OSPEED_HIGHEST); /* MISO. */
palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) |
PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
palSetPad(GPIOB, 12); palSetPad(GPIOB, 12);