From 695ab44c5d12510047cf9952094a7ac12316451c Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 10 Nov 2019 16:05:07 +0000 Subject: [PATCH] Removed XML element for non-existing port. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13181 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/boards/ST_NUCLEO144_L496ZG/board.h | 166 ----------------- .../ST_NUCLEO144_L496ZG/cfg/board.chcfg | 50 ------ os/hal/boards/ST_NUCLEO144_L4R5ZI/board.h | 166 ----------------- .../ST_NUCLEO144_L4R5ZI/cfg/board.chcfg | 162 ----------------- os/hal/boards/ST_STM32L4R9I_DISCOVERY/board.h | 170 ------------------ .../ST_STM32L4R9I_DISCOVERY/cfg/board.chcfg | 162 ----------------- 6 files changed, 876 deletions(-) diff --git a/os/hal/boards/ST_NUCLEO144_L496ZG/board.h b/os/hal/boards/ST_NUCLEO144_L496ZG/board.h index 9aa0b2976..180733fd7 100644 --- a/os/hal/boards/ST_NUCLEO144_L496ZG/board.h +++ b/os/hal/boards/ST_NUCLEO144_L496ZG/board.h @@ -204,23 +204,6 @@ #define GPIOH_PIN14 14U #define GPIOH_PIN15 15U -#define GPIOI_PIN0 0U -#define GPIOI_PIN1 1U -#define GPIOI_PIN2 2U -#define GPIOI_PIN3 3U -#define GPIOI_PIN4 4U -#define GPIOI_PIN5 5U -#define GPIOI_PIN6 6U -#define GPIOI_PIN7 7U -#define GPIOI_PIN8 8U -#define GPIOI_PIN9 9U -#define GPIOI_PIN10 10U -#define GPIOI_PIN11 11U -#define GPIOI_PIN12 12U -#define GPIOI_PIN13 13U -#define GPIOI_PIN14 14U -#define GPIOI_PIN15 15U - /* * IO lines assignments. */ @@ -1478,155 +1461,6 @@ PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ PIN_LOCKR_DISABLED(GPIOH_PIN15)) -/* - * GPIOI setup: - * - * PI0 - PIN0 (analog). - * PI1 - PIN1 (analog). - * PI2 - PIN2 (analog). - * PI3 - PIN3 (analog). - * PI4 - PIN4 (analog). - * PI5 - PIN5 (analog). - * PI6 - PIN6 (analog). - * PI7 - PIN7 (analog). - * PI8 - PIN8 (analog). - * PI9 - PIN9 (analog). - * PI10 - PIN10 (analog). - * PI11 - PIN11 (analog). - * PI12 - PIN12 (analog). - * PI13 - PIN13 (analog). - * PI14 - PIN14 (analog). - * PI15 - PIN15 (analog). - */ -#define VAL_GPIOI_MODER (PIN_MODE_ANALOG(GPIOI_PIN0) | \ - PIN_MODE_ANALOG(GPIOI_PIN1) | \ - PIN_MODE_ANALOG(GPIOI_PIN2) | \ - PIN_MODE_ANALOG(GPIOI_PIN3) | \ - PIN_MODE_ANALOG(GPIOI_PIN4) | \ - PIN_MODE_ANALOG(GPIOI_PIN5) | \ - PIN_MODE_ANALOG(GPIOI_PIN6) | \ - PIN_MODE_ANALOG(GPIOI_PIN7) | \ - PIN_MODE_ANALOG(GPIOI_PIN8) | \ - PIN_MODE_ANALOG(GPIOI_PIN9) | \ - PIN_MODE_ANALOG(GPIOI_PIN10) | \ - PIN_MODE_ANALOG(GPIOI_PIN11) | \ - PIN_MODE_ANALOG(GPIOI_PIN12) | \ - PIN_MODE_ANALOG(GPIOI_PIN13) | \ - PIN_MODE_ANALOG(GPIOI_PIN14) | \ - PIN_MODE_ANALOG(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOI_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \ - PIN_ODR_LOW(GPIOI_PIN1) | \ - PIN_ODR_LOW(GPIOI_PIN2) | \ - PIN_ODR_LOW(GPIOI_PIN3) | \ - PIN_ODR_LOW(GPIOI_PIN4) | \ - PIN_ODR_LOW(GPIOI_PIN5) | \ - PIN_ODR_LOW(GPIOI_PIN6) | \ - PIN_ODR_LOW(GPIOI_PIN7) | \ - PIN_ODR_LOW(GPIOI_PIN8) | \ - PIN_ODR_LOW(GPIOI_PIN9) | \ - PIN_ODR_LOW(GPIOI_PIN10) | \ - PIN_ODR_LOW(GPIOI_PIN11) | \ - PIN_ODR_LOW(GPIOI_PIN12) | \ - PIN_ODR_LOW(GPIOI_PIN13) | \ - PIN_ODR_LOW(GPIOI_PIN14) | \ - PIN_ODR_LOW(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN7, 0U)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN15, 0U)) -#define VAL_GPIOI_ASCR (PIN_ASCR_DISABLED(GPIOI_PIN0) | \ - PIN_ASCR_DISABLED(GPIOI_PIN1) | \ - PIN_ASCR_DISABLED(GPIOI_PIN2) | \ - PIN_ASCR_DISABLED(GPIOI_PIN3) | \ - PIN_ASCR_DISABLED(GPIOI_PIN4) | \ - PIN_ASCR_DISABLED(GPIOI_PIN5) | \ - PIN_ASCR_DISABLED(GPIOI_PIN6) | \ - PIN_ASCR_DISABLED(GPIOI_PIN7) | \ - PIN_ASCR_DISABLED(GPIOI_PIN8) | \ - PIN_ASCR_DISABLED(GPIOI_PIN9) | \ - PIN_ASCR_DISABLED(GPIOI_PIN10) | \ - PIN_ASCR_DISABLED(GPIOI_PIN11) | \ - PIN_ASCR_DISABLED(GPIOI_PIN12) | \ - PIN_ASCR_DISABLED(GPIOI_PIN13) | \ - PIN_ASCR_DISABLED(GPIOI_PIN14) | \ - PIN_ASCR_DISABLED(GPIOI_PIN15)) -#define VAL_GPIOI_LOCKR (PIN_LOCKR_DISABLED(GPIOI_PIN0) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN1) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN2) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN3) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN4) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN5) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN6) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN7) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN8) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN9) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN10) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN11) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN12) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN13) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN14) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN15)) - /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_NUCLEO144_L496ZG/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_L496ZG/cfg/board.chcfg index 5eaf00890..141566096 100644 --- a/os/hal/boards/ST_NUCLEO144_L496ZG/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_L496ZG/cfg/board.chcfg @@ -416,55 +416,5 @@ PinLock="Disabled" Alternate="0" ID="" Resistor="Floating" Mode="Input" Level="Low" /> - - - - - - - - - - - - - - - - - - diff --git a/os/hal/boards/ST_NUCLEO144_L4R5ZI/board.h b/os/hal/boards/ST_NUCLEO144_L4R5ZI/board.h index 6c23ab3ac..2cccf4943 100644 --- a/os/hal/boards/ST_NUCLEO144_L4R5ZI/board.h +++ b/os/hal/boards/ST_NUCLEO144_L4R5ZI/board.h @@ -204,23 +204,6 @@ #define GPIOH_PIN14 14U #define GPIOH_PIN15 15U -#define GPIOI_PIN0 0U -#define GPIOI_PIN1 1U -#define GPIOI_PIN2 2U -#define GPIOI_PIN3 3U -#define GPIOI_PIN4 4U -#define GPIOI_PIN5 5U -#define GPIOI_PIN6 6U -#define GPIOI_PIN7 7U -#define GPIOI_PIN8 8U -#define GPIOI_PIN9 9U -#define GPIOI_PIN10 10U -#define GPIOI_PIN11 11U -#define GPIOI_PIN12 12U -#define GPIOI_PIN13 13U -#define GPIOI_PIN14 14U -#define GPIOI_PIN15 15U - /* * IO lines assignments. */ @@ -1478,155 +1461,6 @@ PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ PIN_LOCKR_DISABLED(GPIOH_PIN15)) -/* - * GPIOI setup: - * - * PI0 - PIN0 (analog). - * PI1 - PIN1 (analog). - * PI2 - PIN2 (analog). - * PI3 - PIN3 (analog). - * PI4 - PIN4 (analog). - * PI5 - PIN5 (analog). - * PI6 - PIN6 (analog). - * PI7 - PIN7 (analog). - * PI8 - PIN8 (analog). - * PI9 - PIN9 (analog). - * PI10 - PIN10 (analog). - * PI11 - PIN11 (analog). - * PI12 - PIN12 (analog). - * PI13 - PIN13 (analog). - * PI14 - PIN14 (analog). - * PI15 - PIN15 (analog). - */ -#define VAL_GPIOI_MODER (PIN_MODE_ANALOG(GPIOI_PIN0) | \ - PIN_MODE_ANALOG(GPIOI_PIN1) | \ - PIN_MODE_ANALOG(GPIOI_PIN2) | \ - PIN_MODE_ANALOG(GPIOI_PIN3) | \ - PIN_MODE_ANALOG(GPIOI_PIN4) | \ - PIN_MODE_ANALOG(GPIOI_PIN5) | \ - PIN_MODE_ANALOG(GPIOI_PIN6) | \ - PIN_MODE_ANALOG(GPIOI_PIN7) | \ - PIN_MODE_ANALOG(GPIOI_PIN8) | \ - PIN_MODE_ANALOG(GPIOI_PIN9) | \ - PIN_MODE_ANALOG(GPIOI_PIN10) | \ - PIN_MODE_ANALOG(GPIOI_PIN11) | \ - PIN_MODE_ANALOG(GPIOI_PIN12) | \ - PIN_MODE_ANALOG(GPIOI_PIN13) | \ - PIN_MODE_ANALOG(GPIOI_PIN14) | \ - PIN_MODE_ANALOG(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOI_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN5) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN6) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN8) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN9) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN10) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN11) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \ - PIN_ODR_LOW(GPIOI_PIN1) | \ - PIN_ODR_LOW(GPIOI_PIN2) | \ - PIN_ODR_LOW(GPIOI_PIN3) | \ - PIN_ODR_LOW(GPIOI_PIN4) | \ - PIN_ODR_LOW(GPIOI_PIN5) | \ - PIN_ODR_LOW(GPIOI_PIN6) | \ - PIN_ODR_LOW(GPIOI_PIN7) | \ - PIN_ODR_LOW(GPIOI_PIN8) | \ - PIN_ODR_LOW(GPIOI_PIN9) | \ - PIN_ODR_LOW(GPIOI_PIN10) | \ - PIN_ODR_LOW(GPIOI_PIN11) | \ - PIN_ODR_LOW(GPIOI_PIN12) | \ - PIN_ODR_LOW(GPIOI_PIN13) | \ - PIN_ODR_LOW(GPIOI_PIN14) | \ - PIN_ODR_LOW(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN6, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN7, 0U)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN9, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN10, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN11, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN15, 0U)) -#define VAL_GPIOI_ASCR (PIN_ASCR_DISABLED(GPIOI_PIN0) | \ - PIN_ASCR_DISABLED(GPIOI_PIN1) | \ - PIN_ASCR_DISABLED(GPIOI_PIN2) | \ - PIN_ASCR_DISABLED(GPIOI_PIN3) | \ - PIN_ASCR_DISABLED(GPIOI_PIN4) | \ - PIN_ASCR_DISABLED(GPIOI_PIN5) | \ - PIN_ASCR_DISABLED(GPIOI_PIN6) | \ - PIN_ASCR_DISABLED(GPIOI_PIN7) | \ - PIN_ASCR_DISABLED(GPIOI_PIN8) | \ - PIN_ASCR_DISABLED(GPIOI_PIN9) | \ - PIN_ASCR_DISABLED(GPIOI_PIN10) | \ - PIN_ASCR_DISABLED(GPIOI_PIN11) | \ - PIN_ASCR_DISABLED(GPIOI_PIN12) | \ - PIN_ASCR_DISABLED(GPIOI_PIN13) | \ - PIN_ASCR_DISABLED(GPIOI_PIN14) | \ - PIN_ASCR_DISABLED(GPIOI_PIN15)) -#define VAL_GPIOI_LOCKR (PIN_LOCKR_DISABLED(GPIOI_PIN0) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN1) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN2) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN3) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN4) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN5) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN6) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN7) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN8) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN9) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN10) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN11) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN12) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN13) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN14) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN15)) - /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_NUCLEO144_L4R5ZI/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_L4R5ZI/cfg/board.chcfg index ca5ad6a81..2efd3329c 100644 --- a/os/hal/boards/ST_NUCLEO144_L4R5ZI/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_L4R5ZI/cfg/board.chcfg @@ -1317,167 +1317,5 @@ Mode="Analog" Level="Low" /> - - - - - - - - - - - - - - - - - - diff --git a/os/hal/boards/ST_STM32L4R9I_DISCOVERY/board.h b/os/hal/boards/ST_STM32L4R9I_DISCOVERY/board.h index a33c77900..cf02dc57c 100644 --- a/os/hal/boards/ST_STM32L4R9I_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32L4R9I_DISCOVERY/board.h @@ -201,23 +201,6 @@ #define GPIOH_PIN14 14U #define GPIOH_PIN15 15U -#define GPIOI_PIN0 0U -#define GPIOI_PIN1 1U -#define GPIOI_PIN2 2U -#define GPIOI_PIN3 3U -#define GPIOI_PIN4 4U -#define GPIOI_PIN5 5U -#define GPIOI_OCTOSPIM_P2_CLK 6U -#define GPIOI_PIN7 7U -#define GPIOI_PIN8 8U -#define GPIOI_OCTOSPIM_P2_IO2 9U -#define GPIOI_OCTOSPIM_P2_IO1 10U -#define GPIOI_OCTOSPIM_P2_IO0 11U -#define GPIOI_PIN12 12U -#define GPIOI_PIN13 13U -#define GPIOI_PIN14 14U -#define GPIOI_PIN15 15U - /* * IO lines assignments. */ @@ -250,10 +233,6 @@ #define LINE_OCTOSPIM_P2_IO3 PAL_LINE(GPIOH, 8U) #define LINE_OCTOSPIM_P2_IO4 PAL_LINE(GPIOH, 9U) #define LINE_OCTOSPIM_P2_IO5 PAL_LINE(GPIOH, 10U) -#define LINE_OCTOSPIM_P2_CLK PAL_LINE(GPIOI, 6U) -#define LINE_OCTOSPIM_P2_IO2 PAL_LINE(GPIOI, 9U) -#define LINE_OCTOSPIM_P2_IO1 PAL_LINE(GPIOI, 10U) -#define LINE_OCTOSPIM_P2_IO0 PAL_LINE(GPIOI, 11U) /*===========================================================================*/ /* Driver pre-compile time settings. */ @@ -1489,155 +1468,6 @@ PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ PIN_LOCKR_DISABLED(GPIOH_PIN15)) -/* - * GPIOI setup: - * - * PI0 - PIN0 (analog). - * PI1 - PIN1 (analog). - * PI2 - PIN2 (analog). - * PI3 - PIN3 (analog). - * PI4 - PIN4 (analog). - * PI5 - PIN5 (analog). - * PI6 - OCTOSPIM_P2_CLK (alternate 5). - * PI7 - PIN7 (analog). - * PI8 - PIN8 (analog). - * PI9 - OCTOSPIM_P2_IO2 (alternate 5). - * PI10 - OCTOSPIM_P2_IO1 (alternate 5). - * PI11 - OCTOSPIM_P2_IO0 (alternate 5). - * PI12 - PIN12 (analog). - * PI13 - PIN13 (analog). - * PI14 - PIN14 (analog). - * PI15 - PIN15 (analog). - */ -#define VAL_GPIOI_MODER (PIN_MODE_ANALOG(GPIOI_PIN0) | \ - PIN_MODE_ANALOG(GPIOI_PIN1) | \ - PIN_MODE_ANALOG(GPIOI_PIN2) | \ - PIN_MODE_ANALOG(GPIOI_PIN3) | \ - PIN_MODE_ANALOG(GPIOI_PIN4) | \ - PIN_MODE_ANALOG(GPIOI_PIN5) | \ - PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_CLK) |\ - PIN_MODE_ANALOG(GPIOI_PIN7) | \ - PIN_MODE_ANALOG(GPIOI_PIN8) | \ - PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_IO2) |\ - PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_IO1) |\ - PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_IO0) |\ - PIN_MODE_ANALOG(GPIOI_PIN12) | \ - PIN_MODE_ANALOG(GPIOI_PIN13) | \ - PIN_MODE_ANALOG(GPIOI_PIN14) | \ - PIN_MODE_ANALOG(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_CLK) |\ - PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_IO2) |\ - PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_IO1) |\ - PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_IO0) |\ - PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOI_PIN0) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN1) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN2) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN3) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN4) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN5) | \ - PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_CLK) |\ - PIN_OSPEED_VERYLOW(GPIOI_PIN7) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN8) | \ - PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_IO2) |\ - PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_IO1) |\ - PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_IO0) |\ - PIN_OSPEED_VERYLOW(GPIOI_PIN12) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN13) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN14) | \ - PIN_OSPEED_VERYLOW(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_CLK) |\ - PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_IO2) |\ - PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_IO1) |\ - PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_IO0) |\ - PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \ - PIN_ODR_LOW(GPIOI_PIN1) | \ - PIN_ODR_LOW(GPIOI_PIN2) | \ - PIN_ODR_LOW(GPIOI_PIN3) | \ - PIN_ODR_LOW(GPIOI_PIN4) | \ - PIN_ODR_LOW(GPIOI_PIN5) | \ - PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_CLK) | \ - PIN_ODR_LOW(GPIOI_PIN7) | \ - PIN_ODR_LOW(GPIOI_PIN8) | \ - PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_IO2) | \ - PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_IO1) | \ - PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_IO0) | \ - PIN_ODR_LOW(GPIOI_PIN12) | \ - PIN_ODR_LOW(GPIOI_PIN13) | \ - PIN_ODR_LOW(GPIOI_PIN14) | \ - PIN_ODR_LOW(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ - PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_CLK, 5U) |\ - PIN_AFIO_AF(GPIOI_PIN7, 0U)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ - PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_IO2, 5U) |\ - PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_IO1, 5U) |\ - PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_IO0, 5U) |\ - PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ - PIN_AFIO_AF(GPIOI_PIN15, 0U)) -#define VAL_GPIOI_ASCR (PIN_ASCR_DISABLED(GPIOI_PIN0) | \ - PIN_ASCR_DISABLED(GPIOI_PIN1) | \ - PIN_ASCR_DISABLED(GPIOI_PIN2) | \ - PIN_ASCR_DISABLED(GPIOI_PIN3) | \ - PIN_ASCR_DISABLED(GPIOI_PIN4) | \ - PIN_ASCR_DISABLED(GPIOI_PIN5) | \ - PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_CLK) |\ - PIN_ASCR_DISABLED(GPIOI_PIN7) | \ - PIN_ASCR_DISABLED(GPIOI_PIN8) | \ - PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_IO2) |\ - PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_IO1) |\ - PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_IO0) |\ - PIN_ASCR_DISABLED(GPIOI_PIN12) | \ - PIN_ASCR_DISABLED(GPIOI_PIN13) | \ - PIN_ASCR_DISABLED(GPIOI_PIN14) | \ - PIN_ASCR_DISABLED(GPIOI_PIN15)) -#define VAL_GPIOI_LOCKR (PIN_LOCKR_DISABLED(GPIOI_PIN0) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN1) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN2) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN3) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN4) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN5) | \ - PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_CLK) |\ - PIN_LOCKR_DISABLED(GPIOI_PIN7) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN8) | \ - PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_IO2) |\ - PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_IO1) |\ - PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_IO0) |\ - PIN_LOCKR_DISABLED(GPIOI_PIN12) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN13) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN14) | \ - PIN_LOCKR_DISABLED(GPIOI_PIN15)) - /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_STM32L4R9I_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32L4R9I_DISCOVERY/cfg/board.chcfg index 08e16415a..eb4d5df78 100644 --- a/os/hal/boards/ST_STM32L4R9I_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32L4R9I_DISCOVERY/cfg/board.chcfg @@ -1317,167 +1317,5 @@ Mode="Analog" Level="Low" /> - - - - - - - - - - - - - - - - - -