ICU support for STM32 TIM9 unit.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5673 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -109,9 +109,11 @@
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#define STM32_ICU_USE_TIM2 FALSE
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#define STM32_ICU_USE_TIM2 FALSE
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#define STM32_ICU_USE_TIM3 FALSE
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#define STM32_ICU_USE_TIM3 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* PWM driver system settings.
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* PWM driver system settings.
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@ -122,6 +124,7 @@
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* SERIAL driver system settings.
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* SERIAL driver system settings.
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@ -164,12 +164,14 @@
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* MAC driver system settings.
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* MAC driver system settings.
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@ -164,12 +164,14 @@
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* MAC driver system settings.
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* MAC driver system settings.
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@ -164,12 +164,14 @@
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* MAC driver system settings.
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* MAC driver system settings.
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@ -164,12 +164,14 @@
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* MAC driver system settings.
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* MAC driver system settings.
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@ -164,12 +164,14 @@
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM4 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM5 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM9 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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/*
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* MAC driver system settings.
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* MAC driver system settings.
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@ -87,6 +87,14 @@ ICUDriver ICUD5;
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ICUDriver ICUD8;
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ICUDriver ICUD8;
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#endif
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#endif
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/**
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* @brief ICUD9 driver identifier.
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* @note The driver ICUD9 allocates the timer TIM9 when enabled.
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*/
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#if STM32_ICU_USE_TIM9 || defined(__DOXYGEN__)
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ICUDriver ICUD9;
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -297,6 +305,28 @@ CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
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}
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}
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#endif /* STM32_ICU_USE_TIM8 */
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#endif /* STM32_ICU_USE_TIM8 */
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#if STM32_ICU_USE_TIM9
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#if !defined(STM32_TIM9_HANDLER)
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#error "STM32_TIM9_HANDLER not defined"
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#endif
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/**
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* @brief TIM9 interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {
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CH_IRQ_PROLOGUE();
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icu_lld_serve_interrupt(&ICUD9);
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM32_ICU_USE_TIM9 */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/* Driver exported functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -343,6 +373,12 @@ void icu_lld_init(void) {
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icuObjectInit(&ICUD8);
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icuObjectInit(&ICUD8);
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ICUD8.tim = STM32_TIM8;
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ICUD8.tim = STM32_TIM8;
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#endif
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#endif
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#if STM32_ICU_USE_TIM9
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/* Driver initialization.*/
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icuObjectInit(&ICUD9);
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ICUD9.tim = STM32_TIM9;
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#endif
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}
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}
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/**
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/**
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icup->clock = STM32_TIMCLK1;
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icup->clock = STM32_TIMCLK1;
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}
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}
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#endif
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#endif
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#if STM32_ICU_USE_TIM5
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#if STM32_ICU_USE_TIM5
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if (&ICUD5 == icup) {
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if (&ICUD5 == icup) {
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rccEnableTIM5(FALSE);
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rccEnableTIM5(FALSE);
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
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icup->clock = STM32_TIMCLK2;
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icup->clock = STM32_TIMCLK2;
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}
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}
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#endif
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#if STM32_ICU_USE_TIM9
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if (&ICUD9 == icup) {
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rccEnableTIM9(FALSE);
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rccResetTIM9();
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nvicEnableVector(STM32_TIM9_NUMBER,
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CORTEX_PRIORITY_MASK(STM32_ICU_TIM9_IRQ_PRIORITY));
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icup->clock = STM32_TIMCLK1;
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}
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#endif
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#endif
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}
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}
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else {
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else {
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nvicDisableVector(STM32_TIM8_CC_NUMBER);
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nvicDisableVector(STM32_TIM8_CC_NUMBER);
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rccDisableTIM8(FALSE);
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rccDisableTIM8(FALSE);
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}
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}
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#endif
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#if STM32_ICU_USE_TIM9
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if (&ICUD9 == icup) {
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nvicDisableVector(STM32_TIM9_NUMBER);
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rccDisableTIM9(FALSE);
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}
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#endif
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#endif
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}
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}
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}
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}
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#define STM32_ICU_USE_TIM8 FALSE
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#define STM32_ICU_USE_TIM8 FALSE
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#endif
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#endif
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/**
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* @brief ICUD9 driver enable switch.
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* @details If set to @p TRUE the support for ICUD9 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_ICU_USE_TIM9) || defined(__DOXYGEN__)
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#define STM32_ICU_USE_TIM9 FALSE
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#endif
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/**
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/**
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* @brief ICUD1 interrupt priority level setting.
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* @brief ICUD1 interrupt priority level setting.
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*/
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*/
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#if !defined(STM32_ICU_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#if !defined(STM32_ICU_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#endif
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#endif
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/**
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* @brief ICUD9 interrupt priority level setting.
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*/
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#if !defined(STM32_ICU_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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#endif
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/** @} */
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/** @} */
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/*===========================================================================*/
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/*===========================================================================*/
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#error "TIM8 not present in the selected device"
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#error "TIM8 not present in the selected device"
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#endif
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#endif
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#if STM32_ICU_USE_TIM9 && !STM32_HAS_TIM9
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#error "TIM9 not present in the selected device"
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#endif
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#if !STM32_ICU_USE_TIM1 && !STM32_ICU_USE_TIM2 && \
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#if !STM32_ICU_USE_TIM1 && !STM32_ICU_USE_TIM2 && \
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!STM32_ICU_USE_TIM3 && !STM32_ICU_USE_TIM4 && \
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!STM32_ICU_USE_TIM3 && !STM32_ICU_USE_TIM4 && \
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!STM32_ICU_USE_TIM5 && !STM32_ICU_USE_TIM8
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!STM32_ICU_USE_TIM5 && !STM32_ICU_USE_TIM8 && \
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!STM32_ICU_USE_TIM9
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#error "ICU driver activated but no TIM peripheral assigned"
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#error "ICU driver activated but no TIM peripheral assigned"
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#endif
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#endif
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#error "Invalid IRQ priority assigned to TIM8"
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#error "Invalid IRQ priority assigned to TIM8"
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#endif
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#endif
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#if STM32_ICU_USE_TIM9 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM9_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM9"
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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extern ICUDriver ICUD8;
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extern ICUDriver ICUD8;
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#endif
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#endif
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#if STM32_ICU_USE_TIM9 && !defined(__DOXYGEN__)
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extern ICUDriver ICUD9;
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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*/
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*/
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#define rccResetTIM8() rccResetAPB2(RCC_APB2RSTR_TIM8RST)
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#define rccResetTIM8() rccResetAPB2(RCC_APB2RSTR_TIM8RST)
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/**
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* @brief Disables the TIM9 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
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/**
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* @brief Resets the TIM8 peripheral.
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*
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* @api
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*/
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#define rccResetTIM9() rccResetAPB2(RCC_APB2RSTR_TIM9RST)
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/**
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/**
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* @brief Enables the TIM89peripheral clock.
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* @brief Enables the TIM89peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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* @note The @p lp parameter is ignored in this family.
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*/
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*/
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#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)
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#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)
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/**
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* @brief Enables the TIM11 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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|
||||||
#define rccEnableTIM11(lp) rccEnableAPB2(RCC_APB2ENR_TIM11EN, lp)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Disables the TIM11 peripheral clock.
|
|
||||||
* @note The @p lp parameter is ignored in this family.
|
|
||||||
*
|
|
||||||
* @param[in] lp low power enable flag
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Resets the TIM11 peripheral.
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccResetTIM11() rccResetAPB2(RCC_APB2RSTR_TIM11RST)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Enables the TIM12 peripheral clock.
|
|
||||||
* @note The @p lp parameter is ignored in this family.
|
|
||||||
*
|
|
||||||
* @param[in] lp low power enable flag
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccEnableTIM12(lp) rccEnableAPB1(RCC_APB1ENR_TIM12EN, lp)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Disables the TIM12 peripheral clock.
|
|
||||||
* @note The @p lp parameter is ignored in this family.
|
|
||||||
*
|
|
||||||
* @param[in] lp low power enable flag
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Resets the TIM12 peripheral.
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccResetTIM12() rccResetAPB1(RCC_APB1RSTR_TIM12RST)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Enables the TIM14 peripheral clock.
|
|
||||||
* @note The @p lp parameter is ignored in this family.
|
|
||||||
*
|
|
||||||
* @param[in] lp low power enable flag
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccEnableTIM14(lp) rccEnableAPB1(RCC_APB1ENR_TIM14EN, lp)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Disables the TIM14 peripheral clock.
|
|
||||||
* @note The @p lp parameter is ignored in this family.
|
|
||||||
*
|
|
||||||
* @param[in] lp low power enable flag
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Resets the TIM14 peripheral.
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccResetTIM14() rccResetAPB1(RCC_APB1RSTR_TIM14RST)
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Enables the TIM9 peripheral clock.
|
|
||||||
* @note The @p lp parameter is ignored in this family.
|
|
||||||
*
|
|
||||||
* @param[in] lp low power enable flag
|
|
||||||
*
|
|
||||||
* @api
|
|
||||||
*/
|
|
||||||
#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Disables the TIM9 peripheral clock.
|
* @brief Disables the TIM9 peripheral clock.
|
||||||
* @note The @p lp parameter is ignored in this family.
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
@ -1186,6 +1077,7 @@
|
||||||
* @api
|
* @api
|
||||||
*/
|
*/
|
||||||
#define rccResetTIM14() rccResetAPB1(RCC_APB1RSTR_TIM14RST)
|
#define rccResetTIM14() rccResetAPB1(RCC_APB1RSTR_TIM14RST)
|
||||||
|
/** @} */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @name USART/UART peripherals specific RCC operations
|
* @name USART/UART peripherals specific RCC operations
|
||||||
|
|
|
@ -39,10 +39,12 @@
|
||||||
#define STM32_TIM2_HANDLER TIM2_IRQHandler
|
#define STM32_TIM2_HANDLER TIM2_IRQHandler
|
||||||
#define STM32_TIM3_HANDLER TIM3_IRQHandler
|
#define STM32_TIM3_HANDLER TIM3_IRQHandler
|
||||||
#define STM32_TIM4_HANDLER TIM4_IRQHandler
|
#define STM32_TIM4_HANDLER TIM4_IRQHandler
|
||||||
|
#define STM32_TIM9_HANDLER TIM9_IRQHandler
|
||||||
|
|
||||||
#define STM32_TIM2_NUMBER TIM2_IRQn
|
#define STM32_TIM2_NUMBER TIM2_IRQn
|
||||||
#define STM32_TIM3_NUMBER TIM3_IRQn
|
#define STM32_TIM3_NUMBER TIM3_IRQn
|
||||||
#define STM32_TIM4_NUMBER TIM4_IRQn
|
#define STM32_TIM4_NUMBER TIM4_IRQn
|
||||||
|
#define STM32_TIM9_NUMBER TIM9_IRQn
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* USART units.
|
* USART units.
|
||||||
|
|
|
@ -452,6 +452,33 @@
|
||||||
* @api
|
* @api
|
||||||
*/
|
*/
|
||||||
#define rccResetTIM4() rccResetAPB1(RCC_APB1RSTR_TIM4RST)
|
#define rccResetTIM4() rccResetAPB1(RCC_APB1RSTR_TIM4RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the TIM89peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the TIM9 peripheral clock.
|
||||||
|
* @note The @p lp parameter is ignored in this family.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the TIM8 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetTIM9() rccResetAPB2(RCC_APB2RSTR_TIM9RST)
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -154,7 +154,7 @@
|
||||||
- NEW: Added new pwmIsChannelEnabledI() API to the PWM driver, implemented
|
- NEW: Added new pwmIsChannelEnabledI() API to the PWM driver, implemented
|
||||||
in the STM32 driver.
|
in the STM32 driver.
|
||||||
- NEW: Added support for timers 6, 7, 9, 11, 12, 14 to the STM32 GPT driver.
|
- NEW: Added support for timers 6, 7, 9, 11, 12, 14 to the STM32 GPT driver.
|
||||||
- NEW: Added support for timer 9 to the STM32 PWM driver.
|
- NEW: Added support for timer 9 to the STM32 PWM and ICU drivers.
|
||||||
- NEW: Relicensed parts of the distribution tree under the Apache 2.0
|
- NEW: Relicensed parts of the distribution tree under the Apache 2.0
|
||||||
license in order to make specific parts of the code more accessible
|
license in order to make specific parts of the code more accessible
|
||||||
to the open source community and adopters.
|
to the open source community and adopters.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -164,12 +164,14 @@
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
#define STM32_ICU_USE_TIM5 FALSE
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
#define STM32_ICU_USE_TIM8 FALSE
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MAC driver system settings.
|
* MAC driver system settings.
|
||||||
|
|
|
@ -109,9 +109,11 @@
|
||||||
#define STM32_ICU_USE_TIM2 FALSE
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
#define STM32_ICU_USE_TIM3 FALSE
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
|
@ -119,9 +121,11 @@
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 FALSE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SERIAL driver system settings.
|
* SERIAL driver system settings.
|
||||||
|
|
|
@ -109,9 +109,11 @@
|
||||||
#define STM32_ICU_USE_TIM2 FALSE
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
#define STM32_ICU_USE_TIM3 FALSE
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
|
@ -119,9 +121,11 @@
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 FALSE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SERIAL driver system settings.
|
* SERIAL driver system settings.
|
||||||
|
|
|
@ -109,9 +109,11 @@
|
||||||
#define STM32_ICU_USE_TIM2 FALSE
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
#define STM32_ICU_USE_TIM3 FALSE
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
|
@ -119,9 +121,11 @@
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 FALSE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SERIAL driver system settings.
|
* SERIAL driver system settings.
|
||||||
|
|
|
@ -109,9 +109,11 @@
|
||||||
#define STM32_ICU_USE_TIM2 FALSE
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
#define STM32_ICU_USE_TIM3 TRUE
|
#define STM32_ICU_USE_TIM3 TRUE
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
|
@ -119,9 +121,11 @@
|
||||||
#define STM32_PWM_USE_TIM2 TRUE
|
#define STM32_PWM_USE_TIM2 TRUE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 FALSE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SERIAL driver system settings.
|
* SERIAL driver system settings.
|
||||||
|
|
|
@ -109,9 +109,11 @@
|
||||||
#define STM32_ICU_USE_TIM2 FALSE
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
#define STM32_ICU_USE_TIM3 FALSE
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
|
@ -119,9 +121,11 @@
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 FALSE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SERIAL driver system settings.
|
* SERIAL driver system settings.
|
||||||
|
|
|
@ -109,9 +109,11 @@
|
||||||
#define STM32_ICU_USE_TIM2 FALSE
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
#define STM32_ICU_USE_TIM3 FALSE
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
#define STM32_ICU_USE_TIM4 FALSE
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* PWM driver system settings.
|
* PWM driver system settings.
|
||||||
|
@ -119,9 +121,11 @@
|
||||||
#define STM32_PWM_USE_TIM2 FALSE
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
#define STM32_PWM_USE_TIM3 FALSE
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
#define STM32_PWM_USE_TIM4 FALSE
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SERIAL driver system settings.
|
* SERIAL driver system settings.
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||||||
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Reference in New Issue