QUADSPI settings in all registries and platform.mk.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9535 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
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@ -153,6 +153,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -412,6 +415,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -613,6 +619,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -822,6 +831,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -1046,6 +1058,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -1274,6 +1289,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -1530,6 +1548,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -1802,6 +1823,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -138,6 +138,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -336,6 +339,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -512,6 +518,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -718,6 +727,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -964,6 +976,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -1212,6 +1227,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -134,6 +134,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -382,6 +385,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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@ -164,6 +164,9 @@
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c
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endif
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ifneq ($(findstring HAL_USE_QSPI TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c
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endif
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ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
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endif
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$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1 \
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 TRUE
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#define STM32_QUADSPI1_HANDLER Vector1AC
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#define STM32_QUADSPI1_NUMBER 91
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#define STM32_QUADSPI1_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 7)
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#define STM32_QUADSPI1_DMA_CHN 0x30000000
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 TRUE
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#define STM32_QUADSPI1_HANDLER Vector1AC
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#define STM32_QUADSPI1_NUMBER 91
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#define STM32_QUADSPI1_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 7)
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#define STM32_QUADSPI1_DMA_CHN 0x30000000
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#if !defined(STM32F2XX)
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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STM32_DMA_STREAM_ID_MSK(1, 1))
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#define STM32_I2C4_TX_DMA_CHN 0x00040020
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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#define STM32_HAS_I2C4 FALSE
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 FALSE
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/* RTC attributes.*/
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#define STM32_HAS_RTC TRUE
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#define STM32_RTC_HAS_SUBSECONDS TRUE
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ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c
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endif
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ifneq ($(findstring HAL_USE_QSPI TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c
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endif
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ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
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endif
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$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1 \
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$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2 \
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#define STM32_I2C4_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
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#define STM32_I2C4_TX_DMA_CHN 0x00200000
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/* QUADSPI attributes.*/
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#define STM32_HAS_QUADSPI1 TRUE
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#define STM32_QUADSPI1_HANDLER Vector1B0
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#define STM32_QUADSPI1_NUMBER 92
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||||
#define STM32_QUADSPI1_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 7)
|
||||
#define STM32_QUADSPI1_DMA_CHN 0x30000000
|
||||
|
||||
/* RTC attributes.*/
|
||||
#define STM32_HAS_RTC TRUE
|
||||
#define STM32_RTC_HAS_SUBSECONDS TRUE
|
||||
|
|
|
@ -141,6 +141,9 @@
|
|||
#define STM32_HAS_I2C3 FALSE
|
||||
#define STM32_HAS_I2C4 FALSE
|
||||
|
||||
/* QUADSPI attributes.*/
|
||||
#define STM32_HAS_QUADSPI1 FALSE
|
||||
|
||||
/* RTC attributes.*/
|
||||
#define STM32_HAS_RTC TRUE
|
||||
#define STM32_RTC_HAS_SUBSECONDS TRUE
|
||||
|
|
|
@ -184,6 +184,9 @@
|
|||
#define STM32_HAS_I2C3 FALSE
|
||||
#define STM32_HAS_I2C4 FALSE
|
||||
|
||||
/* QUADSPI attributes.*/
|
||||
#define STM32_HAS_QUADSPI1 FALSE
|
||||
|
||||
/* RTC attributes.*/
|
||||
#define STM32_HAS_RTC TRUE
|
||||
#if (STM32L1XX_PROD_CAT == 1) || defined(__DOXYGEN__)
|
||||
|
|
Loading…
Reference in New Issue