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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7406 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2014-10-16 18:55:09 +00:00
parent 8a0ff15114
commit 73a96c620a
2 changed files with 21 additions and 28 deletions
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26
doc/reports/LPC2148-48-ARM.txt
View File

@ -6,7 +6,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 3.0.0dev *** Kernel: 3.0.0dev
*** Compiled: Oct 14 2014 - 19:58:28 *** Compiled: Oct 16 2014 - 18:28:29
*** Compiler: GCC 4.7.4 20140401 (release) [ARM/embedded-4_7-branch revision 209195] *** Compiler: GCC 4.7.4 20140401 (release) [ARM/embedded-4_7-branch revision 209195]
*** Architecture: ARMv4T *** Architecture: ARMv4T
*** Core Variant: ARM7 *** Core Variant: ARM7
@ -100,51 +100,51 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1) --- Test Case 11.1 (Benchmark, messages #1)
--- Score : 149904 msgs/S, 299808 ctxswc/S --- Score : 149917 msgs/S, 299834 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2) --- Test Case 11.2 (Benchmark, messages #2)
--- Score : 115226 msgs/S, 230452 ctxswc/S --- Score : 115237 msgs/S, 230474 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3) --- Test Case 11.3 (Benchmark, messages #3)
--- Score : 115226 msgs/S, 230452 ctxswc/S --- Score : 115237 msgs/S, 230474 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch) --- Test Case 11.4 (Benchmark, context switch)
--- Score : 506696 ctxswc/S --- Score : 506736 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle) --- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 87582 threads/S --- Score : 87589 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only) --- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 123245 threads/S --- Score : 123256 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 35795 reschedules/S, 214770 ctxswc/S --- Score : 35798 reschedules/S, 214788 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching) --- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 269780 ctxswc/S --- Score : 269800 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput) --- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 368200 bytes/S --- Score : 368232 bytes/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset) --- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 313730 timers/S --- Score : 313756 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal) --- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 577876 wait+signal/S --- Score : 577928 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock) --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 365748 lock+unlock/S --- Score : 365776 lock+unlock/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint) --- Test Case 11.13 (Benchmark, RAM footprint)

21
os/rt/ports/ARM/compilers/GCC/chcoreasm.s
View File

@ -63,7 +63,6 @@ _port_get_cpsr:
.code 32 .code 32
mrs r0, CPSR mrs r0, CPSR
bx lr bx lr
.endfunc
.balign 16 .balign 16
.code 16 .code 16
@ -79,7 +78,6 @@ _port_disable_thumb:
orr r3, #F_BIT orr r3, #F_BIT
msr CPSR_c, r3 msr CPSR_c, r3
bx lr bx lr
.endfunc
.balign 16 .balign 16
.code 16 .code 16
@ -96,7 +94,6 @@ _port_lock_thumb:
.code 32 .code 32
msr CPSR_c, #MODE_SYS | I_BIT msr CPSR_c, #MODE_SYS | I_BIT
bx lr bx lr
.endfunc
.balign 16 .balign 16
.code 16 .code 16
@ -113,7 +110,6 @@ _port_unlock_thumb:
.code 32 .code 32
msr CPSR_c, #MODE_SYS msr CPSR_c, #MODE_SYS
bx lr bx lr
.endfunc
#endif /* defined(THUMB_PRESENT) */ #endif /* defined(THUMB_PRESENT) */
.balign 16 .balign 16
@ -128,7 +124,6 @@ _port_switch_thumb:
#endif /* defined(THUMB_PRESENT) */ #endif /* defined(THUMB_PRESENT) */
.code 32 .code 32
.func
.global _port_switch_arm .global _port_switch_arm
_port_switch_arm: _port_switch_arm:
stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
@ -140,7 +135,6 @@ _port_switch_arm:
#else /* !defined(THUMB_PRESENT)T */ #else /* !defined(THUMB_PRESENT)T */
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
#endif /* !defined(THUMB_PRESENT) */ #endif /* !defined(THUMB_PRESENT) */
.endfunc
/* /*
* Common IRQ code. It expects a macro ARM_IRQ_VECTOR_REG with the address * Common IRQ code. It expects a macro ARM_IRQ_VECTOR_REG with the address
@ -173,7 +167,6 @@ _port_switch_arm:
*/ */
.balign 16 .balign 16
.code 32 .code 32
.func
.global Irq_Handler .global Irq_Handler
Irq_Handler: Irq_Handler:
stmfd sp!, {r0-r3, r12, lr} stmfd sp!, {r0-r3, r12, lr}
@ -184,18 +177,20 @@ Irq_Handler:
bx r0 // Calling the ISR. bx r0 // Calling the ISR.
_irq_ret_arm: _irq_ret_arm:
#else /* defined(THUMB_NO_INTERWORKING) */ #else /* defined(THUMB_NO_INTERWORKING) */
add r0, pc, #1 add r1, pc, #1
bx r0 bx r1
.code 16 .code 16
ldr lr, =_irq_ret_thumb // ISR return point. ldr r1, =(_irq_ret_thumb+1) // ISR return point.
mov lr,r1
bx r0 // Calling the ISR. bx r0 // Calling the ISR.
.balign 4
_irq_ret_thumb: _irq_ret_thumb:
mov lr, pc mov lr, pc
bx lr bx lr
.code 32 .code 32
#endif /* defined(THUMB_NO_INTERWORKING) */ #endif /* defined(THUMB_NO_INTERWORKING) */
cmp r0, #0 cmp r0, #0
ldmeq sp!, {r0-r3, r12, lr} ldmfd sp!, {r0-r3, r12, lr}
subeqs pc, lr, #4 // No reschedule, returns. subeqs pc, lr, #4 // No reschedule, returns.
// Now the frame is created in the system stack, the IRQ // Now the frame is created in the system stack, the IRQ
@ -242,7 +237,6 @@ _irq_ret_thumb:
ldmfd sp!, {r0-r3, r12, lr} ldmfd sp!, {r0-r3, r12, lr}
msr CPSR_c, #MODE_IRQ | I_BIT msr CPSR_c, #MODE_IRQ | I_BIT
subs pc, lr, #4 subs pc, lr, #4
.endfunc
/* /*
* Threads trampoline code. * Threads trampoline code.
@ -251,7 +245,6 @@ _irq_ret_thumb:
*/ */
.balign 16 .balign 16
.code 32 .code 32
.func
.globl _port_thread_start .globl _port_thread_start
_port_thread_start: _port_thread_start:
#if defined(THUMB_NO_INTERWORKING) #if defined(THUMB_NO_INTERWORKING)
@ -272,7 +265,7 @@ _port_thread_start:
mov lr, pc mov lr, pc
bx r4 bx r4
bl chThdExit bl chThdExit
.endfunc _zombies: b _zombies
#endif /* !defined(__DOXYGEN__) */ #endif /* !defined(__DOXYGEN__) */