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Enhanced STM32F7xx MPU configuration in mcuconf.h. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16217 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2023-04-13 17:25:05 +00:00
parent cacda50b6c
commit 73dfb7d03e
23 changed files with 287 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/NIL-STM32F746G-DISCOVERY/cfg/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32-LWIP-FATFS-USB-HTTPS/cfg/stm32f746_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg/stm32f746_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg/stm32f769_discovery/mcuconf.h
View File

@ -39,9 +39,21 @@
#define STM32F779_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -98,7 +110,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32F722ZE-NUCLEO144/cfg/mcuconf.h
View File

@ -38,9 +38,21 @@
#define STM32F733_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -95,7 +107,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32F746G-DISCOVERY/cfg/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32F746ZG-NUCLEO144/cfg/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32F756ZG-NUCLEO144/cfg/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32F767ZI-NUCLEO144/cfg/mcuconf.h
View File

@ -39,9 +39,21 @@
#define STM32F779_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -98,7 +110,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-STM32F769I-DISCOVERY/cfg/mcuconf.h
View File

@ -39,9 +39,21 @@
#define STM32F779_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -98,7 +110,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
demos/STM32/RT-VFS-FATFS/cfg/stm32f769ni_discovery/mcuconf.h
View File

@ -39,9 +39,21 @@
#define STM32F779_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -98,7 +110,6 @@
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

1
readme.txt
View File

@ -74,6 +74,7 @@
*****************************************************************************
*** Next ***
- NEW: Enhanced STM32F7xx MPU configuration in mcuconf.h.
- NEW: I2C slave support in HAL high level driver.
- NEW: Added settings for STM32 OCTOSPIv1 and OCTOSPIv2 TCR bits SSHIFT and
DHQC.

15
testex/STM32/STM32F7xx/SPI-ADXL355/cfg/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/multi/CRYPTO/cfg/stm32f756zg_nucleo144/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/multi/PAL/cfg/stm32f746_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/multi/RTC/cfg/stm32f746_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/multi/SPI/cfg/stm32f746ng_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/multi/UART/cfg/stm32f746_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.

15
testhal/STM32/multi/USB_CDC/cfg/stm32f746_discovery/mcuconf.h
View File

@ -36,9 +36,21 @@
#define STM32F756_MCUCONF
/*
* HAL driver system settings.
* General settings.
*/
#define STM32_NO_INIT FALSE
/*
* Memory attributes settings.
*/
#define STM32_NOCACHE_ENABLE TRUE
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_RBAR 0x2004C000U
#define STM32_NOCACHE_RASR MPU_RASR_SIZE_16K
/*
* HAL driver system settings.
*/
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
@ -94,7 +106,6 @@
#define STM32_CECSEL STM32_CECSEL_LSE
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
#define STM32_SRAM2_NOCACHE FALSE
/*
* IRQ system settings.