From 7502b3ac78dc41cc695c8cb189925fe6a52399a0 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 29 Nov 2020 14:03:23 +0000 Subject: [PATCH] EXTI, TIM changes related to STM32WB. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13935 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h | 2 +- .../STM32/LLD/EXTIv1/stm32_exti16-31-33.inc | 119 ++++++++++++++++++ os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c | 30 +++-- 3 files changed, 140 insertions(+), 11 deletions(-) create mode 100644 os/hal/ports/STM32/LLD/EXTIv1/stm32_exti16-31-33.inc diff --git a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h index dadc58c50..7399ca217 100644 --- a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h +++ b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h @@ -46,7 +46,7 @@ /* Handling differences in ST headers.*/ #if !defined(STM32H7XX) && !defined(STM32L4XX) && !defined(STM32L4XXP) && \ - !defined(STM32G0XX) && !defined(STM32G4XX) + !defined(STM32G0XX) && !defined(STM32G4XX) && !defined(STM32WBXX) #define EMR1 EMR #define IMR1 IMR #define PR1 PR diff --git a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti16-31-33.inc b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti16-31-33.inc new file mode 100644 index 000000000..30570ea1a --- /dev/null +++ b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti16-31-33.inc @@ -0,0 +1,119 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Ilya Kharin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file EXTIv1/stm32_exti16-31-33.inc + * @brief Shared EXTI16-31-33 handler. + * + * @addtogroup STM32_EXTI16_31_33_HANDLER + * @{ + */ + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/* Priority settings checks.*/ +#if !defined(STM32_IRQ_EXTI16_31_33_PRIORITY) +#error "STM32_IRQ_EXTI16_31_33_PRIORITY not defined in mcuconf.h" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI16_31_33_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI16_31_33_PRIORITY" +#endif + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static inline void exti16_exti31_exti33_irq_init(void) { +#if defined(STM32_EXTI16_IS_USED) || defined(STM32_EXTI31_IS_USED) || \ + defined(STM32_EXTI33_IS_USED) + nvicEnableVector(STM32_EXTI1635_38_NUMBER, STM32_IRQ_EXTI16_31_33_PRIORITY); +#endif +} + +static inline void exti16_exti31_exti33_irq_deinit(void) { +#if defined(STM32_EXTI16_IS_USED) || defined(STM32_EXTI31_IS_USED) || \ + defined(STM32_EXTI33_IS_USED) + nvicDisableVector(STM32_EXTI1635_38_NUMBER); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if defined(STM32_EXTI16_IS_USED) || defined(STM32_EXTI31_IS_USED) || \ + defined(STM32_EXTI33_IS_USED) +#if !defined(STM32_DISABLE_EXTI16_31_33_HANDLER) +/** + * @brief EXTI[16], EXTI[31], EXTI[33] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(STM32_EXTI16_31_33_HANDLER) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + +#if defined(STM32_EXTI16_IS_USED) || defined(STM32_EXTI31_IS_USED) + extiGetAndClearGroup1((1U << 16) | (1U << 31), pr); + + /* Could be unused.*/ + (void)pr; + +#if defined(STM32_EXTI16_ISR) + STM32_EXTI16_ISR(pr, 16); +#endif +#if defined(STM32_EXTI31_ISR) + STM32_EXTI31_ISR(pr, 31); +#endif +#endif + +#if defined(STM32_EXTI33_IS_USED) + extiGetAndClearGroup2((1U << (33 - 32)), pr); + + /* Could be unused.*/ + (void)pr; + +#if defined(STM32_EXTI33_ISR) + STM32_EXTI33_ISR(pr, 33); +#endif +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c index ba9f9bd9a..4b8340906 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c @@ -54,7 +54,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM2(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM2_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM2_STOP #elif defined(STM32G0XX) #define ST_ENABLE_STOP() DBG->APBFZ1 |= DBG_APB_FZ1_DBG_TIM2_STOP @@ -80,7 +81,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM3(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM3_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM3_STOP #elif defined(STM32G0XX) #define ST_ENABLE_STOP() DBG->APBFZ1 |= DBG_APB_FZ1_DBG_TIM3_STOP @@ -106,7 +108,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM4(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM4_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM4_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB1LFZ1 |= DBGMCU_APB1LFZ1_DBG_TIM4 @@ -130,7 +133,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM5(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM5_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM5_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB1LFZ1 |= DBGMCU_APB1LFZ1_DBG_TIM5 @@ -154,7 +158,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM9(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM9_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB2FZR1 |= DBGMCU_APB2FZR1_DBG_TIM9_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB2LFZ1 |= DBGMCU_APB2LFZ1_DBG_TIM9 @@ -178,7 +183,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM10(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM10_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB2FZR1 |= DBGMCU_APB2FZR1_DBG_TIM10_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB2LFZ1 |= DBGMCU_APB2LFZ1_DBG_TIM10 @@ -202,7 +208,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM11(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM11_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB2FZR1 |= DBGMCU_APB2FZR1_DBG_TIM11_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB2LFZ1 |= DBGMCU_APB2LFZ1_DBG_TIM11 @@ -226,7 +233,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM12(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM12_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM12_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB1LFZ1 |= DBGMCU_APB1LFZ1_DBG_TIM12 @@ -250,7 +258,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM13(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM13_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM13_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB1LFZ1 |= DBGMCU_APB1LFZ1_DBG_TIM13 @@ -274,7 +283,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM14(true) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM14_STOP -#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || defined(STM32L5XX) +#elif defined(STM32L4XX) || defined(STM32L4XXP) || defined(STM32G4XX) || \ + defined(STM32L5XX) || defined(STM32WBXX) #define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM14_STOP #elif defined(STM32H7XX) #define ST_ENABLE_STOP() DBGMCU->APB1LFZ1 |= DBGMCU_APB1LFZ1_DBG_TIM14