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Improvements to L3GD20 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9647 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Rocco Marco Guglielmi 2016-06-21 20:50:04 +00:00
parent c6cad23bd9
commit 759c55de0f
3 changed files with 47 additions and 9 deletions
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43
os/ex/ST/l3gd20.h
View File

@ -161,7 +161,36 @@
#define L3GD20_CTRL_REG5_FIFO_EN (1 << 6) /**< FIFO enable */
#define L3GD20_CTRL_REG5_BOOT (1 << 7) /**< Reboot memory content */
/** @} */
/**
* @name L3GD20_INT1_CFG register bits definitions
* @{
*/
#define L3GD20_INT1_CFG_MASK 0xFF /**< L3GD20_INT1_CFG mask */
#define L3GD20_INT1_CFG_XLIE (1 << 0) /**< Enable INT1 on X low */
#define L3GD20_INT1_CFG_XHIE (1 << 1) /**< Enable INT1 on X high */
#define L3GD20_INT1_CFG_YLIE (1 << 2) /**< Enable INT1 on Y low */
#define L3GD20_INT1_CFG_YHIE (1 << 3) /**< Enable INT1 on Y high */
#define L3GD20_INT1_CFG_ZLIE (1 << 4) /**< Enable INT1 on Z low */
#define L3GD20_INT1_CFG_ZHIE (1 << 5) /**< Enable INT1 on Z high */
#define L3GD20_INT1_CFG_LIR (1 << 6) /**< Latch INT1 */
#define L3GD20_INT1_CFG_AND_OR (1 << 7) /**< AND OR combination */
/** @} */
/**
* @name L3GD20_INT1_SRC register bits definitions
* @{
*/
#define L3GD20_INT1_SRC_MASK 0x7F /**< L3GD20_INT1_SRC mask */
#define L3GD20_INT1_SRC_XL (1 << 0) /**< X low event */
#define L3GD20_INT1_SRC_XH (1 << 1) /**< X high event */
#define L3GD20_INT1_SRC_YL (1 << 2) /**< Y low event */
#define L3GD20_INT1_SRC_YH (1 << 3) /**< Y high event */
#define L3GD20_INT1_SRC_ZL (1 << 4) /**< Z low event */
#define L3GD20_INT1_SRC_ZH (1 << 5) /**< Z high event */
#define L3GD20_INT1_SRC_IA (1 << 6) /**< Interrupt active */
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@ -348,7 +377,7 @@ typedef enum {
L3GD20_STOP = 1, /**< Stopped. */
L3GD20_READY = 2, /**< Ready. */
} l3gd20_state_t;
/**
* @brief L3GD20 configuration structure.
*/
@ -381,7 +410,11 @@ typedef struct {
/**
* @brief L3GD20 initial bias.
*/
float bias[L3GD20_NUMBER_OF_AXES];
float bias[L3GD20_NUMBER_OF_AXES];
/**
* @brief L3GD20 initial measurement unit.
*/
l3gd20_unit_t unit;
/**
* @brief L3GD20 initial full scale value.
*/
@ -417,10 +450,6 @@ typedef struct {
*/
l3gd20_lp2m_t lp2mode;
#endif
/**
* @brief L3GD20 initial measurement unit.
*/
l3gd20_unit_t unit;
} L3GD20Config;
/**

3
testhal/STM32/STM32F3xx/SPI-L3GD20/Makefile
View File

@ -200,7 +200,8 @@ CPPWARN = -Wall -Wextra -Wundef
#
# List all user C define here, like -D_DEBUG=1
UDEFS = -DCHPRINTF_USE_FLOAT=1 -DSHELL_CMD_TEST_ENABLED=0
UDEFS = -DCHPRINTF_USE_FLOAT=1 -DSHELL_CMD_TEST_ENABLED=0 \
-DL3GD20_USE_ADVANCED=0
# Define ASM defines here
UADEFS =

10
testhal/STM32/STM32F3xx/SPI-L3GD20/main.c
View File

@ -51,9 +51,17 @@ static L3GD20Config l3gd20cfg = {
&spicfg, /* Pointer to SPI Configuration */
{0, 0, 0}, /* Use default sensitivity */
{0, 0, 0}, /* Use default bias */
L3GD20_UNIT_DPS, /* Measurement unit DPS */
L3GD20_FS_250DPS, /* Full scale value */
L3GD20_ODR_760HZ, /* Output data rate */
L3GD20_UNIT_DPS,
#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__)
L3GD20_BDU_CONTINUOUS,
L3GD20_END_LITTLE,
L3GD20_BW3,
L3GD20_HPM_REFERENCE,
L3GD20_HPCF_8,
L3GD20_LP2M_ON,
#endif
};
/*===========================================================================*/