diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c
index 966d81136..174dc4f72 100644
--- a/os/hal/platforms/STM32F2xx/hal_lld.c
+++ b/os/hal/platforms/STM32F2xx/hal_lld.c
@@ -190,7 +190,7 @@ void stm32_clock_init(void) {
 
 #if STM32_ACTIVATE_PLLI2S
   /* PLLI2S activation.*/
-  RCC->PLLI2SCFGR = STM32_PLLI2SR_VALUE | STM32_PLLI2SN_VALUE;
+  RCC->PLLI2SCFGR = STM32_PLLI2SR | STM32_PLLI2SN;
   RCC->CR |= RCC_CR_PLLI2SON;
   while (!(RCC->CR & RCC_CR_PLLI2SRDY))
     ;                           /* Waits until PLLI2S is stable.            */
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index 3452ce9ff..f2de0b728 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -192,7 +192,7 @@ void stm32_clock_init(void) {
 
 #if STM32_ACTIVATE_PLLI2S
   /* PLLI2S activation.*/
-  RCC->PLLI2SCFGR = STM32_PLLI2SR_VALUE | STM32_PLLI2SN_VALUE;
+  RCC->PLLI2SCFGR = STM32_PLLI2SR | STM32_PLLI2SN;
   RCC->CR |= RCC_CR_PLLI2SON;
   while (!(RCC->CR & RCC_CR_PLLI2SRDY))
     ;                           /* Waits until PLLI2S is stable.            */
diff --git a/readme.txt b/readme.txt
index 2db8a773e..c46bdc52d 100644
--- a/readme.txt
+++ b/readme.txt
@@ -99,6 +99,7 @@
 - FIX: Fixed STM32 ICUD8 not functional because wrong initialization (bug
   3508758).
 - FIX: Fixed chMBFetchI does not decrement mb_fullsem (bug 3504450).
+- FIX: Fixed STM32 PLLI2S initialization error (bug 3503490).
 - FIX: Fixed USART3 not working on STM32F2/F4 UART driver (bug 3496981).
 - FIX: Fixed stack misalignment on Posix-MacOSX (bug 3495487).
 - FIX: Fixed STM8S HSI clock initialization error (bug 3489727).