Fixed bug #1035.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12853 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

os/hal/ports/STM32/STM32F0xx/hal_lld.c

@@ -335,6 +335,9 @@ void stm32_clock_init(void) {
 
   /* Flash setup and final clock selection.   */
   FLASH->ACR = STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)

os/hal/ports/STM32/STM32F1xx/hal_lld.c

@@ -316,6 +316,9 @@ void stm32_clock_init(void) {
 
   /* Flash setup and final clock selection.   */
   FLASH->ACR = STM32_FLASHBITS; /* Flash wait states depending on clock.    */
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)

os/hal/ports/STM32/STM32F37x/hal_lld.c

@@ -199,6 +199,9 @@ void stm32_clock_init(void) {
 
   /* Flash setup and final clock selection.   */
   FLASH->ACR = STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)

os/hal/ports/STM32/STM32F3xx/hal_lld.c

@@ -205,6 +205,9 @@ void stm32_clock_init(void) {
 
   /* Flash setup and final clock selection.   */
   FLASH->ACR = STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)

os/hal/ports/STM32/STM32F4xx/hal_lld.c

@@ -314,6 +314,9 @@ void stm32_clock_init(void) {
   FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |
                FLASH_ACR_DCEN | STM32_FLASHBITS;
 #endif
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)

os/hal/ports/STM32/STM32F7xx/hal_lld.c

@@ -288,6 +288,9 @@ void stm32_clock_init(void) {
 
   /* Flash setup.*/
   FLASH->ACR = FLASH_ACR_ARTEN | FLASH_ACR_PRFTEN | STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured clock source if it is different from HSI.*/
 #if (STM32_SW != STM32_SW_HSI)

os/hal/ports/STM32/STM32G0xx/hal_lld.c

@@ -223,6 +223,9 @@ void stm32_clock_init(void) {
 
   /* Set flash WS's for SYSCLK source */
   FLASH->ACR = FLASH_ACR_ICEN | FLASH_ACR_PRFTEN | STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 
   /* Switching to the configured SYSCLK source if it is different from HSI16.*/
 #if STM32_SW != STM32_SW_HSISYS

os/hal/ports/STM32/STM32H7xx/hal_lld.c

@@ -368,6 +368,9 @@ void stm32_clock_init(void) {
 
   /* Flash setup.*/
   FLASH->ACR = FLASH_ACR_WRHIGHFREQ_2 | STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY)) {
+  }
 
   /* Switching to the configured clock source if it is different
      from HSI.*/

os/hal/ports/STM32/STM32L0xx/hal_lld.c

@@ -64,7 +64,7 @@ static void hal_lld_backup_domain_init(void) {
   /* If enabled then the LSE is started.*/
 #if STM32_LSE_ENABLED
   RCC->CSR |= RCC_CSR_LSEON;
-  while ((RCC->CSR & RCC_CSR_LSERDY) == 0) {
+  while ((RCC->CSR & RCC_CSR_LSERDY) == 0)
     ;                                       /* Waits until LSE is stable.   */
 #endif
 
@@ -290,6 +290,9 @@ void stm32_clock_init(void) {
   /* Flash setup and final clock selection.*/
 #if defined(STM32_FLASHBITS)
   FLASH->ACR = STM32_FLASHBITS;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+  }
 #endif
 
   /* Switching to the configured clock source if it is different from MSI.  */

os/hal/ports/STM32/STM32L1xx/hal_lld.c

@@ -210,9 +210,15 @@ void stm32_clock_init(void) {
   /* Flash setup and final clock selection.*/
 #if defined(STM32_FLASHBITS1)
   FLASH->ACR = STM32_FLASHBITS1;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS1 & FLASH_ACR_LATENCY_Msk)) {
+  }
 #endif
 #if defined(STM32_FLASHBITS2)
   FLASH->ACR = STM32_FLASHBITS2;
+  while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+         (STM32_FLASHBITS2 & FLASH_ACR_LATENCY_Msk)) {
+  }
 #endif
 
   /* Switching to the configured clock source if it is different from MSI.*/

os/hal/ports/STM32/STM32L4xx+/hal_lld.c

@@ -333,8 +333,12 @@ void stm32_clock_init(void) {
   }
 
   /* Set flash WS's for SYSCLK source */
-  if (STM32_FLASHBITS > STM32_MSI_FLASHBITS)
+  if (STM32_FLASHBITS > STM32_MSI_FLASHBITS) {
     FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY_Msk) | STM32_FLASHBITS;
+    while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+           (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+    }
+  }
 
   /* Switching to the configured SYSCLK source if it is different from MSI.*/
 #if (STM32_SW != STM32_SW_MSI)
@@ -345,8 +349,12 @@ void stm32_clock_init(void) {
 #endif
 
   /* Reduce the flash WS's for SYSCLK source if they are less than MSI WSs */
-  if (STM32_FLASHBITS < STM32_MSI_FLASHBITS)
+  if (STM32_FLASHBITS < STM32_MSI_FLASHBITS) {
     FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY_Msk) | STM32_FLASHBITS;
+    while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+           (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+    }
+  }
 
 #endif /* STM32_NO_INIT */
 

os/hal/ports/STM32/STM32L4xx/hal_lld.c

@@ -351,8 +351,12 @@ void stm32_clock_init(void) {
   }
 
   /* Set flash WS's for SYSCLK source */
-  if (STM32_FLASHBITS > STM32_MSI_FLASHBITS)
+  if (STM32_FLASHBITS > STM32_MSI_FLASHBITS) {
     FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY_Msk) | STM32_FLASHBITS;
+    while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+           (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+    }
+  }
 
   /* Switching to the configured SYSCLK source if it is different from MSI.*/
 #if (STM32_SW != STM32_SW_MSI)
@@ -363,8 +367,12 @@ void stm32_clock_init(void) {
 #endif
 
   /* Reduce the flash WS's for SYSCLK source if they are less than MSI WSs */
-  if (STM32_FLASHBITS < STM32_MSI_FLASHBITS)
+  if (STM32_FLASHBITS < STM32_MSI_FLASHBITS) {
     FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY_Msk) | STM32_FLASHBITS;
+    while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+           (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+    }
+  }
 
 #endif /* STM32_NO_INIT */
 

readme.txt

@@ -101,6 +101,8 @@
 - HAL: Added a new interface for range-finder devices (used by EX).
 - HAL: Added mcuconf.h updater tool for STM32F407 (backported to 19.1.1).
 - NIL: Integrated NIL 4.0.
+- FIX: Fixed missing delay after STM32 wait states setup (bug #1035)
+       (backported to 19.1.3)(backported to 18.2.3).
 - FIX: Fixed reduced time slices in RT (bug #1034)
        (backported to 19.1.3)(backported to 18.2.3).
 - FIX: Fixed GCC scatter files alignment problem (bug #1033)