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Change to the STM32 SPI driver suggested by Liam. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2126 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2010-08-13 09:01:55 +00:00
parent b01b63ed5a
commit 78c71e4870
1 changed files with 7 additions and 8 deletions
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15
os/hal/platforms/STM32/spi_lld.c
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@ -63,9 +63,6 @@ static void spi_stop(SPIDriver *spip) {
dmaChannelDisable(spip->spd_dmarx);
dmaChannelDisable(spip->spd_dmatx);
/* Stops SPI operations.*/
spip->spd_spi->CR1 &= ~SPI_CR1_SPE;
chSysLockFromIsr();
chSchReadyI(spip->spd_thread);
chSysUnlockFromIsr();
@ -79,9 +76,6 @@ static void spi_start_wait(SPIDriver *spip) {
dmaChannelEnable(spip->spd_dmarx);
dmaChannelEnable(spip->spd_dmatx);
/* SPI enable.*/
spip->spd_spi->CR1 |= SPI_CR1_SPE;
/* Wait for completion event.*/
spip->spd_thread = currp;
chSchGoSleepS(THD_STATE_SUSPENDED);
@ -280,9 +274,10 @@ void spi_lld_start(SPIDriver *spip) {
DMA_CCR1_TEIE | DMA_CCR1_MSIZE_0 |
DMA_CCR1_PSIZE_0; /* 16 bits transfers. */
/* SPI setup.*/
spip->spd_spi->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR;
/* SPI setup and enable.*/
spip->spd_spi->CR1 = 0;
spip->spd_spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
spip->spd_spi->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR | SPI_CR1_SPE;
}
/**
@ -294,6 +289,10 @@ void spi_lld_stop(SPIDriver *spip) {
/* If in ready state then disables the SPI clock.*/
if (spip->spd_state == SPI_READY) {
/* SPI disable.*/
spip->spd_spi->CR1 = 0;
#if STM32_SPI_USE_SPI1
if (&SPID1 == spip) {
NVICDisableVector(DMA1_Channel2_IRQn);