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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6393 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-10-29 13:00:10 +00:00
parent 2b536049a9
commit 78cdf6419f
1 changed files with 7 additions and 3 deletions
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10
os/hal/platforms/STM32F4xx/hal_lld.c
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@ -154,8 +154,6 @@ void stm32_clock_init(void) {
/* PWR initialization.*/
#if defined(STM32F4XX) || defined(__DOXYGEN__)
PWR->CR = STM32_VOS;
while ((PWR->CSR & PWR_CSR_VOSRDY) == 0)
; /* Waits until power regulator is stable. */
#else
PWR->CR = 0;
#endif
@ -192,6 +190,11 @@ void stm32_clock_init(void) {
STM32_PLLM;
RCC->CR |= RCC_CR_PLLON;
/* Synchronization with voltage regulator stabilization.*/
#if defined(STM32F4XX)
while ((PWR->CSR & PWR_CSR_VOSRDY) == 0)
; /* Waits until power regulator is stable. */
#if STM32_OVERDRIVE_REQUIRED
/* Overdrive activation performed after activating the PLL in order to save
time as recommended in RM in "Entering Over-drive mode" paragraph.*/
@ -201,7 +204,8 @@ void stm32_clock_init(void) {
PWR->CR |= PWR_CR_ODSWEN;
while (!(PWR->CSR & PWR_CSR_ODSWRDY)
;
#endif
#endif /* STM32_OVERDRIVE_REQUIRED */
#endif /* defined(STM32F4XX) */
/* Waiting for PLL lock.*/
while (!(RCC->CR & RCC_CR_PLLRDY))