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Ported GPT. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6141 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2013-08-12 16:01:07 +00:00
parent 67e80419b7
commit 78e314cdad
7 changed files with 449 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
demos/ARMCM4-STM32F303-DISCOVERY/halconf.h
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@ -62,7 +62,7 @@
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#define HAL_USE_GPT TRUE
#endif
/**

12
demos/ARMCM4-STM32F303-DISCOVERY/mcuconf.h
View File

@ -109,9 +109,9 @@
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM4 TRUE
#define STM32_GPT_USE_TIM6 TRUE
#define STM32_GPT_USE_TIM7 TRUE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
@ -138,7 +138,7 @@
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 TRUE
#define STM32_ICU_USE_TIM4 TRUE
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
@ -149,8 +149,8 @@
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE

1
os/hal/hal.mk
View File

@ -4,6 +4,7 @@ HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
${CHIBIOS}/os/hal/src/hal_queues.c \
${CHIBIOS}/os/hal/src/adc.c \
${CHIBIOS}/os/hal/src/can.c \
${CHIBIOS}/os/hal/src/gpt.c \
${CHIBIOS}/os/hal/src/icu.c \
${CHIBIOS}/os/hal/src/pal.c \
${CHIBIOS}/os/hal/src/pwm.c \

123
os/hal/include/gpt.h Normal file
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@ -0,0 +1,123 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file gpt.h
* @brief GPT Driver macros and structures.
*
* @addtogroup GPT
* @{
*/
#ifndef _GPT_H_
#define _GPT_H_
#if HAL_USE_GPT || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Driver state machine possible states.
*/
typedef enum {
GPT_UNINIT = 0, /**< Not initialized. */
GPT_STOP = 1, /**< Stopped. */
GPT_READY = 2, /**< Ready. */
GPT_CONTINUOUS = 3, /**< Active in continuous mode. */
GPT_ONESHOT = 4 /**< Active in one shot mode. */
} gptstate_t;
/**
* @brief Type of a structure representing a GPT driver.
*/
typedef struct GPTDriver GPTDriver;
/**
* @brief GPT notification callback type.
*
* @param[in] gptp pointer to a @p GPTDriver object
*/
typedef void (*gptcallback_t)(GPTDriver *gptp);
#include "gpt_lld.h"
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Changes the interval of GPT peripheral.
* @details This function changes the interval of a running GPT unit.
* @pre The GPT unit must have been activated using @p gptStart().
* @pre The GPT unit must have been running in continuous mode using
* @p gptStartContinuous().
* @post The GPT unit interval is changed to the new value.
*
* @param[in] gptp pointer to a @p GPTDriver object
* @param[in] interval new cycle time in timer ticks
*
* @iclass
*/
#define gptChangeIntervalI(gptp, interval) { \
gpt_lld_change_interval(gptp, interval); \
}
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void gptInit(void);
void gptObjectInit(GPTDriver *gptp);
void gptStart(GPTDriver *gptp, const GPTConfig *config);
void gptStop(GPTDriver *gptp);
void gptStartContinuous(GPTDriver *gptp, gptcnt_t interval);
void gptStartContinuousI(GPTDriver *gptp, gptcnt_t interval);
void gptChangeInterval(GPTDriver *gptp, gptcnt_t interval);
void gptStartOneShot(GPTDriver *gptp, gptcnt_t interval);
void gptStartOneShotI(GPTDriver *gptp, gptcnt_t interval);
void gptStopTimer(GPTDriver *gptp);
void gptStopTimerI(GPTDriver *gptp);
void gptPolledDelay(GPTDriver *gptp, gptcnt_t interval);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_GPT */
#endif /* _GPT_H_ */
/** @} */

2
os/hal/include/hal.h
View File

@ -49,7 +49,7 @@
#include "adc.h"
#include "can.h"
//#include "ext.h"
//#include "gpt.h"
#include "gpt.h"
//#include "i2c.h"
#include "icu.h"
//#include "mac.h"

113
os/hal/platforms/STM32/TIMv1/gpt_lld.c
View File

@ -22,7 +22,6 @@
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_GPT || defined(__DOXYGEN__)
@ -167,13 +166,13 @@ static void gpt_lld_serve_interrupt(GPTDriver *gptp) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD1);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM1 */
@ -186,13 +185,13 @@ CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM2_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD2);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM2 */
@ -205,13 +204,13 @@ CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM3_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD3);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM3 */
@ -224,13 +223,13 @@ CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM4_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD4);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM4 */
@ -243,13 +242,13 @@ CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD5);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM5 */
@ -262,13 +261,13 @@ CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM6_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM6_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD6);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM6 */
@ -281,13 +280,13 @@ CH_IRQ_HANDLER(STM32_TIM6_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM7_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM7_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD7);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM7 */
@ -300,13 +299,13 @@ CH_IRQ_HANDLER(STM32_TIM7_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD8);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM8 */
@ -319,13 +318,13 @@ CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM9_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD9);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM9 */
@ -338,13 +337,13 @@ CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM11_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM11_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD11);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM11 */
@ -357,13 +356,13 @@ CH_IRQ_HANDLER(STM32_TIM11_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM12_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM12_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD12);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM12 */
@ -376,13 +375,13 @@ CH_IRQ_HANDLER(STM32_TIM12_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_TIM14_HANDLER) {
OSAL_IRQ_HANDLER(STM32_TIM14_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
gpt_lld_serve_interrupt(&GPTD14);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_GPT_USE_TIM14 */
@ -486,8 +485,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD1 == gptp) {
rccEnableTIM1(FALSE);
rccResetTIM1();
nvicEnableVector(STM32_TIM1_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM1_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_GPT_TIM1_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK2;
}
#endif
@ -495,8 +493,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD2 == gptp) {
rccEnableTIM2(FALSE);
rccResetTIM2();
nvicEnableVector(STM32_TIM2_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM2_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM2_NUMBER, STM32_GPT_TIM2_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -504,8 +501,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD3 == gptp) {
rccEnableTIM3(FALSE);
rccResetTIM3();
nvicEnableVector(STM32_TIM3_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM3_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM3_NUMBER, STM32_GPT_TIM3_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -513,8 +509,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD4 == gptp) {
rccEnableTIM4(FALSE);
rccResetTIM4();
nvicEnableVector(STM32_TIM4_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM4_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM4_NUMBER, STM32_GPT_TIM4_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -523,8 +518,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD5 == gptp) {
rccEnableTIM5(FALSE);
rccResetTIM5();
nvicEnableVector(STM32_TIM5_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM5_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM5_NUMBER, STM32_GPT_TIM5_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -533,8 +527,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD6 == gptp) {
rccEnableTIM6(FALSE);
rccResetTIM6();
nvicEnableVector(STM32_TIM6_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM6_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM6_NUMBER, STM32_GPT_TIM6_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -543,8 +536,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD7 == gptp) {
rccEnableTIM7(FALSE);
rccResetTIM7();
nvicEnableVector(STM32_TIM7_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM7_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM7_NUMBER, STM32_GPT_TIM7_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -553,8 +545,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD8 == gptp) {
rccEnableTIM8(FALSE);
rccResetTIM8();
nvicEnableVector(STM32_TIM8_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM8_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_GPT_TIM8_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK2;
}
#endif
@ -563,8 +554,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD9 == gptp) {
rccEnableTIM9(FALSE);
rccResetTIM9();
nvicEnableVector(STM32_TIM9_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM9_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM9_NUMBER, STM32_GPT_TIM9_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK2;
}
#endif
@ -573,8 +563,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD11 == gptp) {
rccEnableTIM11(FALSE);
rccResetTIM11();
nvicEnableVector(STM32_TIM11_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM11_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM11_NUMBER, STM32_GPT_TIM11_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK2;
}
#endif
@ -583,8 +572,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD12 == gptp) {
rccEnableTIM12(FALSE);
rccResetTIM12();
nvicEnableVector(STM32_TIM12_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM12_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM12_NUMBER, STM32_GPT_TIM12_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -593,8 +581,7 @@ void gpt_lld_start(GPTDriver *gptp) {
if (&GPTD14 == gptp) {
rccEnableTIM14(FALSE);
rccResetTIM14();
nvicEnableVector(STM32_TIM14_NUMBER,
CORTEX_PRIORITY_MASK(STM32_GPT_TIM14_IRQ_PRIORITY));
nvicEnableVector(STM32_TIM14_NUMBER, STM32_GPT_TIM14_IRQ_PRIORITY);
gptp->clock = STM32_TIMCLK1;
}
#endif
@ -602,8 +589,8 @@ void gpt_lld_start(GPTDriver *gptp) {
/* Prescaler value calculation.*/
psc = (uint16_t)((gptp->clock / gptp->config->frequency) - 1);
chDbgAssert(((uint32_t)(psc + 1) * gptp->config->frequency) == gptp->clock,
"gpt_lld_start(), #1", "invalid frequency");
osalDbgAssert(((uint32_t)(psc + 1) * gptp->config->frequency) == gptp->clock,
"invalid frequency");
/* Timer configuration.*/
gptp->tim->CR1 = 0; /* Initially stopped. */

267
os/hal/src/gpt.c Normal file
View File

@ -0,0 +1,267 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file gpt.c
* @brief GPT Driver code.
*
* @addtogroup GPT
* @{
*/
#include "hal.h"
#if HAL_USE_GPT || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief GPT Driver initialization.
* @note This function is implicitly invoked by @p halInit(), there is
* no need to explicitly initialize the driver.
*
* @init
*/
void gptInit(void) {
gpt_lld_init();
}
/**
* @brief Initializes the standard part of a @p GPTDriver structure.
*
* @param[out] gptp pointer to the @p GPTDriver object
*
* @init
*/
void gptObjectInit(GPTDriver *gptp) {
gptp->state = GPT_STOP;
gptp->config = NULL;
}
/**
* @brief Configures and activates the GPT peripheral.
*
* @param[in] gptp pointer to the @p GPTDriver object
* @param[in] config pointer to the @p GPTConfig object
*
* @api
*/
void gptStart(GPTDriver *gptp, const GPTConfig *config) {
osalDbgCheck((gptp != NULL) && (config != NULL));
osalSysLock();
osalDbgAssert((gptp->state == GPT_STOP) || (gptp->state == GPT_READY),
"invalid state");
gptp->config = config;
gpt_lld_start(gptp);
gptp->state = GPT_READY;
osalSysUnlock();
}
/**
* @brief Deactivates the GPT peripheral.
*
* @param[in] gptp pointer to the @p GPTDriver object
*
* @api
*/
void gptStop(GPTDriver *gptp) {
osalDbgCheck(gptp != NULL);
osalSysLock();
osalDbgAssert((gptp->state == GPT_STOP) || (gptp->state == GPT_READY),
"invalid state");
gpt_lld_stop(gptp);
gptp->state = GPT_STOP;
osalSysUnlock();
}
/**
* @brief Changes the interval of GPT peripheral.
* @details This function changes the interval of a running GPT unit.
* @pre The GPT unit must have been activated using @p gptStart().
* @pre The GPT unit must have been running in continuous mode using
* @p gptStartContinuous().
* @post The GPT unit interval is changed to the new value.
*
* @param[in] gptp pointer to a @p GPTDriver object
* @param[in] interval new cycle time in timer ticks
*
* @api
*/
void gptChangeInterval(GPTDriver *gptp, gptcnt_t interval) {
osalDbgCheck(gptp != NULL);
osalSysLock();
osalDbgAssert(gptp->state == GPT_CONTINUOUS,
"invalid state");
gptChangeIntervalI(gptp, interval);
osalSysUnlock();
}
/**
* @brief Starts the timer in continuous mode.
*
* @param[in] gptp pointer to the @p GPTDriver object
* @param[in] interval period in ticks
*
* @api
*/
void gptStartContinuous(GPTDriver *gptp, gptcnt_t interval) {
osalSysLock();
gptStartContinuousI(gptp, interval);
osalSysUnlock();
}
/**
* @brief Starts the timer in continuous mode.
*
* @param[in] gptp pointer to the @p GPTDriver object
* @param[in] interval period in ticks
*
* @iclass
*/
void gptStartContinuousI(GPTDriver *gptp, gptcnt_t interval) {
osalDbgCheckClassI();
osalDbgCheck(gptp != NULL);
osalDbgAssert(gptp->state == GPT_READY,
"invalid state");
gptp->state = GPT_CONTINUOUS;
gpt_lld_start_timer(gptp, interval);
}
/**
* @brief Starts the timer in one shot mode.
*
* @param[in] gptp pointer to the @p GPTDriver object
* @param[in] interval time interval in ticks
*
* @api
*/
void gptStartOneShot(GPTDriver *gptp, gptcnt_t interval) {
osalSysLock();
gptStartOneShotI(gptp, interval);
osalSysUnlock();
}
/**
* @brief Starts the timer in one shot mode.
*
* @param[in] gptp pointer to the @p GPTDriver object
* @param[in] interval time interval in ticks
*
* @api
*/
void gptStartOneShotI(GPTDriver *gptp, gptcnt_t interval) {
osalDbgCheckClassI();
osalDbgCheck(gptp != NULL);
osalDbgAssert(gptp->state == GPT_READY,
"invalid state");
gptp->state = GPT_ONESHOT;
gpt_lld_start_timer(gptp, interval);
}
/**
* @brief Stops the timer.
*
* @param[in] gptp pointer to the @p GPTDriver object
*
* @api
*/
void gptStopTimer(GPTDriver *gptp) {
osalSysLock();
gptStopTimerI(gptp);
osalSysUnlock();
}
/**
* @brief Stops the timer.
*
* @param[in] gptp pointer to the @p GPTDriver object
*
* @api
*/
void gptStopTimerI(GPTDriver *gptp) {
osalDbgCheckClassI();
osalDbgCheck(gptp != NULL);
osalDbgAssert((gptp->state == GPT_READY) || (gptp->state == GPT_CONTINUOUS) ||
(gptp->state == GPT_ONESHOT),
"invalid state");
gptp->state = GPT_READY;
gpt_lld_stop_timer(gptp);
}
/**
* @brief Starts the timer in one shot mode and waits for completion.
* @details This function specifically polls the timer waiting for completion
* in order to not have extra delays caused by interrupt servicing,
* this function is only recommended for short delays.
* @note The configured callback is not invoked when using this function.
*
* @param[in] gptp pointer to the @p GPTDriver object
* @param[in] interval time interval in ticks
*
* @api
*/
void gptPolledDelay(GPTDriver *gptp, gptcnt_t interval) {
osalDbgAssert(gptp->state == GPT_READY,
"invalid state");
gptp->state = GPT_ONESHOT;
gpt_lld_polled_delay(gptp, interval);
gptp->state = GPT_READY;
}
#endif /* HAL_USE_GPT */
/** @} */