Moved monitor code in monitor.S
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11006 35acf78f-673a-0410-8e92-d51de3d6d3f4
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isiora
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79ecb6db5f
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@ -55,17 +55,8 @@
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.set MODE_UND, 0x1B
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.set MODE_SYS, 0x1F
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.equ I_BIT, 0x80
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.equ F_BIT, 0x40
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.equ SCR_NS, 0x01
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.equ SCR_IRQ, 0x02
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.equ SCR_FIQ, 0x04
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.equ SCR_EA, 0x08
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.equ SCR_FW, 0x10
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.equ SCR_AW, 0x20
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.equ MON_S_SCR, SCR_IRQ
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.equ MON_NS_SCR, SCR_FIQ|SCR_NS
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.set I_BIT, 0x80
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.set F_BIT, 0x40
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.text
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@ -94,10 +85,10 @@ _port_switch_arm:
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* | r2 | | External context: IRQ handler frame
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* | r1 | |
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* | r0 | |
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* | LR_IRQ | | (user code return address)(could be in non-secure space)
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* | LR_FIQ | | (user code return address)
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* | PSR_USR | -+ (user code status)
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* | .... | <- chSchDoReschedule() stack frame, optimize it for space
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* | LR | -+ (system code return address)(always in secure space)
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* | LR | -+ (system code return address)
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* | r11 | |
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* | r10 | |
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* | r9 | |
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@ -108,133 +99,10 @@ _port_switch_arm:
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* SP-> | r4 | -+
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* Low +------------+
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*
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*/
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/*
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* We are facing an architecure with security extension exploited.
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* The following two monitor execution paths are taken by the execution units
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* running in secure state when an irq is fired (Mon_Irq_Handler), and in non-secure
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* state when a fiq interrupt is fired (Mon_Fiq_Handler).
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* They originate by the monitor irq/fiq vector and run in monitor mode,
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* ie in secure state.
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* It assumes the following, set at boot time, or wherever it needs:
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* SCR.FW == 0 and SCR.FIQ == 1 and SCR.IRQ == 0 in non-secure state,
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* ie FIQs are taken to monitor mode, IRQs are taken locally
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* SCR.FW == 0 and SCR.FIQ == 0 and SCR.IRQ == 1 in secure state,
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* ie FIQs are taken locally, IRQs are taken to monitor mode
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* MVBAR holds the address of the monitor vectors base.
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* The code and the stacks memory reside both in secure memory.
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*/
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.balign 16
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.code 32
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.global Mon_Fiq_Handler
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.global Mon_Irq_Handler
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.global Fiq_Handler
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Mon_Irq_Handler:
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// Here the IRQ is taken from secure state,
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// current mode is monitor (so current state is secure),
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// the previous mode and status is in mon.spsr and
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// the return address+4 is in mon.lr.
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//
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// This procedure is challenging, because the irq must be
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// executed in the non secure context and must return in this
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// secure context. The non secure IRQ handler has
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// the responsibility to return into secure state via a smc.
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//
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// The thread is interrupted in the same way that local FIQ.
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// The frame is created in the system stack of the current thread
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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stmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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mrs r0, SPSR
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mov r1, lr
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
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/* Save the s_ctx e recover the ns_ctx */
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// Re-establish the original conditions
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ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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msr SPSR_fsxc, r0
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mov lr, r1
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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ldmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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stmfd sp!, {lr} // save lr into monitor stack
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ldr lr, =MON_NS_SCR // set non-secure SCR before return
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mrc p15, 0, lr, c1, c1, 0
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ldmfd sp!, {lr}
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subs pc, lr, #4 // return into non-secure world
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// and serve the IRQ
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/*
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*
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*/
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Mon_Fiq_Handler:
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// Here the fiq is taken from non-secure state, via the FIQ vector
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// that is in the mon vector table.
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// Current mode is monitor (so current state is secure).
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// Note also that we never leave secure state while sec FIQ was disabled,
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// then it's always safe to process the FIQ here.
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stmfd sp!, {lr} // save lr into monitor stack
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ldr lr, =MON_S_SCR // set secure SCR before to switch to FIQ mode
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mrc p15, 0, lr, c1, c1, 0
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cpsid if, #MODE_FIQ // secure FIQ mode
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stmfd sp!, {r0-r3, r12} // IRQ frame, save scratch registers
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ldr r0, =ARM_IRQ_VECTOR_REG
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ldr r0, [r0]
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ldr lr, =_mon_fiq_ret_arm // ISR return point.
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bx r0 // Calling the ISR.
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_mon_fiq_ret_arm:
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cmp r0, #0
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ldmfd sp!, {r0-r3, r12}
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cpsid if, #MODE_MON
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ldr lr, =MON_NS_SCR // set non-secure SCR before return
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mrceq p15, 0, lr, c1, c1, 0 // only if it will return
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ldmfd sp!, {lr}
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subeqs pc, lr, #4 // No reschedule, returns.
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// Now the frame is created in the system stack
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// relative to non secure context,
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// the IRQ and monitor stacks are empty,
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// the state is secure.
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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stmfd sp!, {r0-r3, r12, lr}
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mov r0, sp
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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stmfd sp!, {r0} // address of ns_ctx in mon stack
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mrs r0, SPSR
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mov r1, lr
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
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mov r0, sp
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// Context switch.
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#if CH_DBG_SYSTEM_STATE_CHECK
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bl _dbg_check_lock
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#endif
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bl chSchDoReschedule
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#if CH_DBG_SYSTEM_STATE_CHECK
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bl _dbg_check_unlock
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#endif
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// Re-establish the IRQ conditions again.
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ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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msr SPSR_fsxc, r0
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mov lr, r1
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ldmfd sp!, {r0} // ns_ctx no longer exists, cleanup mon stack
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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ldmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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stmfd sp!, {lr} // save lr into mon stack
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ldr lr, =MON_NS_SCR // set non-secure SCR before return
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mrc p15, 0, lr, c1, c1, 0
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ldmfd sp!, {lr}
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subs pc, lr, #4 // return into non-secure world
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/*
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*
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*/
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Fiq_Handler:
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// the fiq is taken locally from secure state
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// current mode is fiq
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@ -256,7 +124,7 @@ _fiq_ret_arm:
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mrs r0, SPSR
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mov r1, lr
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msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
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stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_FIQ.
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// Context switch.
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#if CH_DBG_SYSTEM_STATE_CHECK
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@ -268,7 +136,7 @@ _fiq_ret_arm:
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#endif
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// Re-establish the IRQ conditions again.
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ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
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ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_FIQ.
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msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
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msr SPSR_fsxc, r0
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mov lr, r1
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@ -288,7 +156,7 @@ _port_thread_start:
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#if CH_DBG_SYSTEM_STATE_CHECK
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bl _dbg_check_unlock
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#endif
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msr CPSR_c, #MODE_SYS | I_BIT
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msr CPSR_c, #MODE_SYS
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mov r0, r5
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mov lr, pc
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bx r4
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