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I2C. "Slave_addr" and "nbit_addr" fields from I2CSlaveConfig structure merged together. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3057 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
barthess 2011-06-18 14:31:27 +00:00
parent f3e571839b
commit 79f477ba95
3 changed files with 38 additions and 48 deletions
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12
os/hal/include/i2c.h
View File

@ -147,8 +147,16 @@ struct I2CSlaveConfig{
size_t rxbytes; /*!< Number of bytes to received. */
i2cblock_t *rxbuf; /*!< Pointer to receive buffer. */
i2cblock_t *txbuf; /*!< Pointer to transmit buffer.*/
uint16_t slave_addr; /*!< Slave device address.*/
uint8_t nbit_addr; /*!< Length of address (must be 7 or 10).*/
/**
* @brief Slave device address.
* @details Bits 0-9 contain slave device address.
*
* Bit 15 must be set to 1 if 10-bit addressing modes used. Otherwise
* keep it cleared.
*
* Bits 10-14 unused.
*/
uint16_t slave_addr;
i2cflags_t errors; /*!< Error flags.*/
i2cflags_t flags; /*!< State flags.*/
/* Status Change @p EventSource.*/

44
os/hal/platforms/STM32/i2c_lld.c
View File

@ -522,19 +522,17 @@ void i2c_lld_master_transmit(I2CDriver *i2cp) {
i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN);
i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
switch(i2cp->id_slave_config->nbit_addr){
case 7:
// LSB = 0 -> write
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
break;
case 10:
// add the two msb of 10-bit address to the header
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
// add the header bits with LSB = 0 -> write
i2cp->slave_addr1 |= 0xF0;
// the remaining 8 bit of 10-bit address
i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
break;
if(i2cp->id_slave_config->slave_addr & 0x8000){// 10-bit mode used
// add the two msb of 10-bit address to the header
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
// add the header bits with LSB = 0 -> write
i2cp->slave_addr1 |= 0xF0;
// the remaining 8 bit of 10-bit address
i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
}
else{
// LSB = 0 -> write
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
}
i2cp->id_slave_config->flags = 0;
@ -564,19 +562,17 @@ void i2c_lld_master_receive(I2CDriver *i2cp){
i2cp->id_i2c->CR1 |= I2C_CR1_ACK; // acknowledge returned
i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
switch(i2cp->id_slave_config->nbit_addr){
case 7:
if(i2cp->id_slave_config->slave_addr & 0x8000){// 10-bit mode used
// add the two msb of 10-bit address to the header
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
// add the header bits (the LSB -> 1 will be add to second
i2cp->slave_addr1 |= 0xF0;
// the remaining 8 bit of 10-bit address
i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
}
else{
// LSB = 1 -> receive
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) | 0x01);
break;
case 10:
// add the two msb of 10-bit address to the header
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
// add the header bits (the LSB -> 1 will be add to second
i2cp->slave_addr1 |= 0xF0;
// the remaining 8 bit of 10-bit address
i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
break;
}
i2cp->id_slave_config->flags = I2C_FLG_MASTER_RECEIVER;

30
os/hal/src/i2c.c
View File

@ -139,17 +139,10 @@ void i2cStop(I2CDriver *i2cp) {
*/
void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
size_t n;
i2cblock_t *txbuf;
uint8_t nbit_addr;
txbuf = i2cscfg->txbuf;
nbit_addr = i2cscfg->nbit_addr;
n = i2cscfg->txbytes;
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && \
((nbit_addr == 7) || (nbit_addr == 10)) && (n > 0) && (txbuf != NULL),
"i2cMasterTransmit");
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\
(i2cscfg->txbytes > 0) &&\
(i2cscfg->txbuf != NULL),
"i2cMasterTransmit");
// init slave config field in driver
i2cp->id_slave_config = i2cscfg;
@ -188,17 +181,10 @@ void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
*/
void i2cMasterReceive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){
size_t n;
i2cblock_t *rxbuf;
uint8_t nbit_addr;
rxbuf = i2cscfg->rxbuf;
n = i2cscfg->rxbytes;
nbit_addr = i2cscfg->nbit_addr;
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && (n > 0) && \
((nbit_addr == 7) || (nbit_addr == 10)) && (rxbuf != NULL),
"i2cMasterReceive");
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\
(i2cscfg->rxbytes > 0) && \
(i2cscfg->rxbuf != NULL),
"i2cMasterReceive");
// init slave config field in driver
i2cp->id_slave_config = i2cscfg;