diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.h b/os/hal/ports/STM32/STM32F4xx/hal_lld.h index 2bc06ef3d..bc7556b4c 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.h @@ -398,12 +398,6 @@ #define STM32_MCO2SEL_HSE (2U << 30) /**< HSE clock on MCO2 pin. */ #define STM32_MCO2SEL_PLL (3U << 30) /**< PLL clock on MCO2 pin. */ -#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */ -#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */ -#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */ -#define STM32_RTC_HSE (3 << 8) /**< HSE divided by programmable - prescaler used as RTC clock*/ - /** * @name RCC_PLLI2SCFGR register bits definitions * @{ diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h index 7b1232a19..b850f51d4 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h @@ -270,12 +270,6 @@ #define STM32_MCO2SEL_HSE (2U << 30) /**< HSE clock on MCO2 pin. */ #define STM32_MCO2SEL_PLL (3U << 30) /**< PLL clock on MCO2 pin. */ -#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */ -#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */ -#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */ -#define STM32_RTC_HSE (3 << 8) /**< HSE divided by programmable - prescaler used as RTC clock*/ - /** * @name RCC_PLLI2SCFGR register bits definitions * @{ diff --git a/readme.txt b/readme.txt index b1db31d96..af4422c9e 100644 --- a/readme.txt +++ b/readme.txt @@ -73,6 +73,7 @@ ***************************************************************************** *** 16.1.5 *** +- HAL: Removed unused macros in STM32F7xx and STM32F4xx hal_lld.h (bug #742). - HAL: Fixed Doxygen related macros in STM32F7xx, STM32L0xx and STM32L4xx lld files (bug #741). - HAL: Fixed bug in VREF enable/disable functions in ADCv3 driver