git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2150 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -183,14 +183,14 @@ struct intctx {
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* @details Usually this function just disables interrupts but may perform
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* more actions.
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*/
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#define port_lock() asm volatile ("cpsid i")
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#define port_lock() asm volatile ("cpsid i" : : : "memory")
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/**
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* @brief Kernel-unlock action.
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* @details Usually this function just disables interrupts but may perform
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* more actions.
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*/
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#define port_unlock() asm volatile ("cpsie i")
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#define port_unlock() asm volatile ("cpsie i" : : : "memory")
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/**
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* @brief Kernel-lock action from an interrupt handler.
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@ -213,17 +213,17 @@ struct intctx {
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/**
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* @brief Disables all the interrupt sources.
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*/
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#define port_disable() asm volatile ("cpsid i")
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#define port_disable() asm volatile ("cpsid i" : : : "memory")
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/**
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* @brief Disables the interrupt sources below kernel-level priority.
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*/
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#define port_suspend() asm volatile ("cpsid i")
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#define port_suspend() asm volatile ("cpsid i" : : : "memory")
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/**
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* @brief Enables all the interrupt sources.
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*/
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#define port_enable() asm volatile ("cpsie i")
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#define port_enable() asm volatile ("cpsie i" : : : "memory")
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/**
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* @brief Enters an architecture-dependent IRQ-waiting mode.
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@ -234,7 +234,7 @@ struct intctx {
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* @note Implemented as an inlined @p WFI instruction.
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*/
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#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
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#define port_wait_for_interrupt() asm volatile ("wfi")
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#define port_wait_for_interrupt() asm volatile ("wfi" : : : "memory")
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#else
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#define port_wait_for_interrupt()
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#endif
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@ -162,11 +162,11 @@ struct intctx {
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#if CH_OPTIMIZE_SPEED
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#define port_lock() { \
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register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; \
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); \
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}
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#else
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#define port_lock() { \
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asm volatile ("bl _port_lock" : : : "r3", "lr"); \
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asm volatile ("bl _port_lock" : : : "r3", "lr", "memory"); \
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}
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#endif
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@ -179,11 +179,11 @@ struct intctx {
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#if CH_OPTIMIZE_SPEED
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#define port_unlock() { \
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register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; \
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
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asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); \
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}
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#else
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#define port_unlock() { \
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asm volatile ("bl _port_unlock" : : : "r3", "lr"); \
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asm volatile ("bl _port_unlock" : : : "r3", "lr", "memory"); \
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}
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#endif
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@ -211,7 +211,7 @@ struct intctx {
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* @note In this port it disables all the interrupt sources by raising
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* the priority mask to level 0.
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*/
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#define port_disable() asm volatile ("cpsid i")
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#define port_disable() asm volatile ("cpsid i" : : : "memory")
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/**
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* @brief Disables the interrupt sources below kernel-level priority.
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@ -221,7 +221,7 @@ struct intctx {
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#define port_suspend() { \
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register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; \
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asm volatile ("msr BASEPRI, %0 \n\t" \
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"cpsie i" : : "r" (tmp)); \
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"cpsie i" : : "r" (tmp) : "memory"); \
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}
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/**
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@ -231,7 +231,7 @@ struct intctx {
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#define port_enable() { \
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register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; \
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asm volatile ("msr BASEPRI, %0 \n\t" \
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"cpsie i" : : "r" (tmp)); \
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"cpsie i" : : "r" (tmp) : "memory"); \
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}
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/**
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@ -244,7 +244,7 @@ struct intctx {
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*/
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#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
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#define port_wait_for_interrupt() { \
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asm volatile ("wfi"); \
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asm volatile ("wfi" : : : "memory"); \
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}
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#else
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#define port_wait_for_interrupt()
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