diff --git a/demos/STM32/NIL-STM32F051-DISCOVERY/mcuconf.h b/demos/STM32/NIL-STM32F051-DISCOVERY/mcuconf.h index c5d61d726..6cf75522e 100644 --- a/demos/STM32/NIL-STM32F051-DISCOVERY/mcuconf.h +++ b/demos/STM32/NIL-STM32F051-DISCOVERY/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/demos/STM32/RT-STM32F030R8-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32F030R8-NUCLEO/mcuconf.h index 73a87484f..167038e23 100644 --- a/demos/STM32/RT-STM32F030R8-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32F030R8-NUCLEO/mcuconf.h @@ -51,6 +51,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI #define STM32_USART1SW STM32_USART1SW_PCLK diff --git a/demos/STM32/RT-STM32F051-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F051-DISCOVERY/mcuconf.h index c5d61d726..6cf75522e 100644 --- a/demos/STM32/RT-STM32F051-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F051-DISCOVERY/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/demos/STM32/RT-STM32F072-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F072-DISCOVERY/mcuconf.h index ac561cf71..cb4117dc1 100644 --- a/demos/STM32/RT-STM32F072-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F072-DISCOVERY/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/demos/STM32/RT-STM32F072RB-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32F072RB-NUCLEO/mcuconf.h index 3d4abb67d..b7cc3a9af 100644 --- a/demos/STM32/RT-STM32F072RB-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32F072RB-NUCLEO/mcuconf.h @@ -54,6 +54,8 @@ #define STM32_ADCSW STM32_ADCSW_HSI14 #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_ADCSW STM32_ADCSW_HSI14 #define STM32_USBSW STM32_USBSW_HSI48 diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h index f81a23857..439037864 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI #define STM32_USART1SW STM32_USART1SW_PCLK diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.c b/os/hal/ports/STM32/STM32F0xx/hal_lld.c index 87fc9af15..325991e13 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.c @@ -307,8 +307,8 @@ void stm32_clock_init(void) { #endif /* Clock settings.*/ - RCC->CFGR = STM32_MCOSEL | STM32_PLLMUL | STM32_PLLSRC | - STM32_PPRE | STM32_HPRE; + RCC->CFGR = STM32_PLLNODIV | STM32_MCOPRE | STM32_MCOSEL | STM32_PLLMUL | + STM32_PLLSRC | STM32_PPRE | STM32_HPRE; RCC->CFGR2 = STM32_PREDIV; #if STM32_CECSW == STM32_CECSW_OFF RCC->CFGR3 = STM32_USBSW | STM32_I2C1SW | STM32_USART1SW; diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h index cb2c4129f..68706ee1a 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h @@ -229,6 +229,19 @@ #define STM32_MCOSEL_HSE (6 << 24) /**< HSE clock on MCO pin. */ #define STM32_MCOSEL_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */ #define STM32_MCOSEL_HSI48 (8 << 24) /**< HSI48 clock on MCO pin. */ + +#define STM32_MCOPRE_DIV1 (0 << 28) /**< MCO divided by 1. */ +#define STM32_MCOPRE_DIV2 (1 << 28) /**< MCO divided by 2. */ +#define STM32_MCOPRE_DIV4 (2 << 28) /**< MCO divided by 4. */ +#define STM32_MCOPRE_DIV8 (3 << 28) /**< MCO divided by 8. */ +#define STM32_MCOPRE_DIV16 (4 << 28) /**< MCO divided by 16. */ +#define STM32_MCOPRE_DIV32 (5 << 28) /**< MCO divided by 32. */ +#define STM32_MCOPRE_DIV64 (6 << 28) /**< MCO divided by 64. */ +#define STM32_MCOPRE_DIV128 (7 << 28) /**< MCO divided by 128. */ + +#define STM32_PLLNODIV_MASK (1 << 31) /**< MCO PLL divider mask. */ +#define STM32_PLLNODIV_DIV2 (0 << 31) /**< MCO PLL is divided by two. */ +#define STM32_PLLNODIV_DIV1 (1 << 31) /**< MCO PLL is divided by one. */ /** @} */ /** @@ -404,6 +417,20 @@ #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #endif +/** + * @brief MCO divider setting. + */ +#if !defined(STM32_MCOPRE) || defined(__DOXYGEN__) +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#endif + +/** + * @brief MCO PLL divider setting. + */ +#if !defined(STM32_PLLNODIV) || defined(__DOXYGEN__) +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 +#endif + /** * @brief USB Clock source. */ @@ -741,6 +768,58 @@ #error "STM32_PCLK exceeding maximum frequency (STM32_PCLK_MAX)" #endif +/* STM32_PLLNODIV check.*/ +#if (STM32_PLLNODIV != STM32_PLLNODIV_DIV2) && \ + (STM32_PLLNODIV != STM32_PLLNODIV_DIV1) +#error "invalid STM32_PLLNODIV value specified" +#endif + +/** + * @brief MCO clock before divider. + */ +#if (STM32_MCOSEL == STM32_MCOSEL_NOCLOCK) || defined(__DOXYGEN__) +#define STM32_MCODIVCLK 0 +#elif STM32_MCOSEL == STM32_MCOSEL_HSI14 +#define STM32_MCODIVCLK STM32_HSI14CLK +#elif STM32_MCOSEL == STM32_MCOSEL_LSI +#define STM32_MCODIVCLK STM32_LSICLK +#elif STM32_MCOSEL == STM32_MCOSEL_LSE +#define STM32_MCODIVCLK STM32_LSECLK +#elif STM32_MCOSEL == STM32_MCOSEL_SYSCLK +#define STM32_MCODIVCLK STM32_SYSCLK +#elif STM32_MCOSEL == STM32_MCOSEL_HSI +#define STM32_MCODIVCLK STM32_HSICLK +#elif STM32_MCOSEL == STM32_MCOSEL_HSE +#define STM32_MCODIVCLK STM32_HSECLK +#elif STM32_MCOSEL == STM32_MCOSEL_PLLDIV2 +#if STM32_PLLNODIV == STM32_PLLNODIV_DIV2 +#define STM32_MCODIVCLK (STM32_PLLCLKOUT / 2) +#else +#define STM32_MCODIVCLK (STM32_PLLCLKOUT / 1) +#endif +#elif STM32_MCOSEL == STM32_MCOSEL_HSI48 +#define STM32_MCODIVCLK STM32_HSI48CLK +#else +#error "invalid STM32_MCOSEL value specified" +#endif + +/** + * @brief MCO output pin clock. + */ +#if (STM32_MCOPRE == STM32_MCOPRE_DIV1) || defined(__DOXYGEN__) +#define STM32_MCOCLK STM32_MCODIVCLK +#elif STM32_MCOPRE == STM32_MCOPRE_DIV2 +#define STM32_MCOCLK (STM32_MCODIVCLK / 2) +#elif STM32_MCOPRE == STM32_MCOPRE_DIV4 +#define STM32_MCOCLK (STM32_MCODIVCLK / 4) +#elif STM32_MCOPRE == STM32_MCOPRE_DIV8 +#define STM32_MCOCLK (STM32_MCODIVCLK / 8) +#elif STM32_MCOPRE == STM32_MCOPRE_DIV16 +#define STM32_MCOCLK (STM32_MCODIVCLK / 16) +#else +#error "invalid STM32_MCOPRE value specified" +#endif + /** * @brief RTC clock. */ diff --git a/readme.txt b/readme.txt index 8fec0835e..2fc0a9407 100644 --- a/readme.txt +++ b/readme.txt @@ -126,6 +126,7 @@ - HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC, STM32F098xx devices. +- HAL: Fixed STM32F0xx HAL missing MCOPRE support (bug #658). - HAL: Fixed STM32L1xx HAL errors in comments (bug #657)(backported to 3.0.3 and 2.6.10). - HAL: Fixed STM32 USBv1 wrong buffer alignment (bug #656)(backported diff --git a/testhal/STM32/STM32F0xx/ADC/mcuconf.h b/testhal/STM32/STM32F0xx/ADC/mcuconf.h index 57cc0e77f..5eb9fe01d 100644 --- a/testhal/STM32/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32/STM32F0xx/ADC/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/CAN/mcuconf.h b/testhal/STM32/STM32F0xx/CAN/mcuconf.h index 0b5e9f9c5..481927aa6 100644 --- a/testhal/STM32/STM32F0xx/CAN/mcuconf.h +++ b/testhal/STM32/STM32F0xx/CAN/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/EXT/mcuconf.h b/testhal/STM32/STM32F0xx/EXT/mcuconf.h index 3afbfc88f..98aeadc05 100644 --- a/testhal/STM32/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32/STM32F0xx/EXT/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h index 559a6ec12..b918f8275 100644 --- a/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/STM32F0xx/IRQ_STORM/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h index 26c39712e..be2b64928 100644 --- a/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32/STM32F0xx/PWM-ICU/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/SPI/mcuconf.h b/testhal/STM32/STM32F0xx/SPI/mcuconf.h index 8fa797035..05a934710 100644 --- a/testhal/STM32/STM32F0xx/SPI/mcuconf.h +++ b/testhal/STM32/STM32F0xx/SPI/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/UART/mcuconf.h b/testhal/STM32/STM32F0xx/UART/mcuconf.h index f8e6250d2..13568f1cf 100644 --- a/testhal/STM32/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32/STM32F0xx/UART/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI diff --git a/testhal/STM32/STM32F0xx/USB_CDC/mcuconf.h b/testhal/STM32/STM32F0xx/USB_CDC/mcuconf.h index 35e91dd27..c0ef22c93 100644 --- a/testhal/STM32/STM32F0xx/USB_CDC/mcuconf.h +++ b/testhal/STM32/STM32F0xx/USB_CDC/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 #define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI