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Patch from @preisi. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15710 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2022-08-05 11:39:53 +00:00
parent ad2385e83f
commit 7f09ea6b8d
1 changed files with 12 additions and 6 deletions
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18
os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c
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@ -133,7 +133,7 @@ static bool fdcan_clock_stop(CANDriver *canp) {
canp->fdcan->CCCR |= FDCAN_CCCR_CSR; canp->fdcan->CCCR |= FDCAN_CCCR_CSR;
start = osalOsGetSystemTimeX(); start = osalOsGetSystemTimeX();
end = osalTimeAddX(start, TIME_MS2I(TIMEOUT_INIT_MS)); end = osalTimeAddX(start, TIME_MS2I(TIMEOUT_INIT_MS));
while ((canp->fdcan->CCCR & FDCAN_CCCR_CSA) != 0U) { while ((canp->fdcan->CCCR & FDCAN_CCCR_CSA) == 0U) {
if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) { if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
return true; return true;
} }
@ -163,7 +163,7 @@ static bool fdcan_init_mode(CANDriver *canp) {
static bool fdcan_active_mode(CANDriver *canp) { static bool fdcan_active_mode(CANDriver *canp) {
systime_t start, end; systime_t start, end;
/* Going in initialization mode then waiting for it to happen.*/ /* Going in active mode then waiting for it to happen.*/
canp->fdcan->CCCR &= ~FDCAN_CCCR_INIT; canp->fdcan->CCCR &= ~FDCAN_CCCR_INIT;
start = osalOsGetSystemTimeX(); start = osalOsGetSystemTimeX();
end = osalTimeAddX(start, TIME_MS2I(TIMEOUT_INIT_MS)); end = osalTimeAddX(start, TIME_MS2I(TIMEOUT_INIT_MS));
@ -275,16 +275,22 @@ bool can_lld_start(CANDriver *canp) {
} }
/* Configuration can be performed now.*/ /* Configuration can be performed now.*/
canp->fdcan->CCCR = FDCAN_CCCR_CCE; canp->fdcan->CCCR |= FDCAN_CCCR_CCE;
/* Setting up operation mode except driver-controlled bits.*/ /* Setting up operation mode except driver-controlled bits.*/
canp->fdcan->NBTP = canp->config->NBTP; canp->fdcan->NBTP = canp->config->NBTP;
canp->fdcan->DBTP = canp->config->DBTP; canp->fdcan->DBTP = canp->config->DBTP;
canp->fdcan->CCCR |= canp->config->CCCR & ~(FDCAN_CCCR_CSR | FDCAN_CCCR_CSA | canp->fdcan->CCCR = canp->config->CCCR | FDCAN_CCCR_CCE | FDCAN_CCCR_INIT;
FDCAN_CCCR_CCE | FDCAN_CCCR_INIT); /* TEST is only writable when FDCAN_CCCR_TEST is set and FDCAN is still in
canp->fdcan->TEST = canp->config->TEST; * configuration mode */
if (canp->config->CCCR & FDCAN_CCCR_TEST) {
canp->fdcan->TEST = canp->config->TEST;
}
canp->fdcan->RXGFC = canp->config->RXGFC; canp->fdcan->RXGFC = canp->config->RXGFC;
/* Start clock and disable configuration mode.*/
canp->fdcan->CCCR &= ~(FDCAN_CCCR_CSR | FDCAN_CCCR_INIT);
/* Enabling interrupts, only using interrupt zero.*/ /* Enabling interrupts, only using interrupt zero.*/
canp->fdcan->IR = (uint32_t)-1; canp->fdcan->IR = (uint32_t)-1;
canp->fdcan->IE = FDCAN_IE_RF1NE | FDCAN_IE_RF1LE | canp->fdcan->IE = FDCAN_IE_RF1NE | FDCAN_IE_RF1LE |