From 81fc1ef3995af4857a815f09c591d20fd351012c Mon Sep 17 00:00:00 2001 From: areviu Date: Mon, 12 Mar 2018 19:31:13 +0000 Subject: [PATCH] fixed reliance demo configuration and chconf git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11707 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- testhal/ATSAMA5D2/SDMMC/chconf.h | 2 +- .../SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch | 116 +++++++++--------- testhal/ATSAMA5D2/SDMMC/mcuconf.h | 2 +- testhal/ATSAMA5D2/SDMMC/redconf.c | 2 +- 4 files changed, 61 insertions(+), 61 deletions(-) diff --git a/testhal/ATSAMA5D2/SDMMC/chconf.h b/testhal/ATSAMA5D2/SDMMC/chconf.h index 49b16647b..d0f3b0374 100644 --- a/testhal/ATSAMA5D2/SDMMC/chconf.h +++ b/testhal/ATSAMA5D2/SDMMC/chconf.h @@ -409,7 +409,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE /** * @brief Debug option, consistency checks. diff --git a/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch b/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch index 2151c3899..8fed6b9bc 100644 --- a/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch +++ b/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch @@ -1,58 +1,58 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/ATSAMA5D2/SDMMC/mcuconf.h b/testhal/ATSAMA5D2/SDMMC/mcuconf.h index 22725886a..05b9cf19c 100644 --- a/testhal/ATSAMA5D2/SDMMC/mcuconf.h +++ b/testhal/ATSAMA5D2/SDMMC/mcuconf.h @@ -85,7 +85,7 @@ #define HAL_USE_SECUMOD FALSE #define SAMA_ST_USE_PIT FALSE #define SAMA_ST_USE_TC0 FALSE -#define SAMA_ST_USE_TC1 FALSE +#define SAMA_ST_USE_TC1 TRUE /* diff --git a/testhal/ATSAMA5D2/SDMMC/redconf.c b/testhal/ATSAMA5D2/SDMMC/redconf.c index 480af8e03..305933f93 100644 --- a/testhal/ATSAMA5D2/SDMMC/redconf.c +++ b/testhal/ATSAMA5D2/SDMMC/redconf.c @@ -27,7 +27,7 @@ const VOLCONF gaRedVolConf[REDCONF_VOLUME_COUNT] = false, //fAtomicSectorWrite 1024U, //ulInodeCount 2U, //bBlockIoRetries - "CHIBIVOL" + "" } };