git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2115 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/platforms/STM32/adc_lld.c

@@ -61,8 +61,7 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   isr = DMA1->ISR;
-  DMA1->IFCR = DMA_IFCR_CGIF1  | DMA_IFCR_CTCIF1 |
-               DMA_IFCR_CHTIF1 | DMA_IFCR_CTEIF1;
+  dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_1);
   if ((isr & DMA_ISR_HTIF1) != 0) {
     /* Half transfer processing.*/
     if (ADCD1.ad_callback != NULL) {
@@ -120,7 +119,7 @@ void adc_lld_init(void) {
   /* Driver initialization.*/
   adcObjectInit(&ADCD1);
   ADCD1.ad_adc = ADC1;
-  ADCD1.ad_dma = DMA1_Channel1;
+  ADCD1.ad_dmap = STM32_DMA1;
   ADCD1.ad_dmaprio = STM32_ADC1_DMA_PRIORITY << 12;
 
   /* Temporary activation.*/
@@ -201,7 +200,6 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   const ADCConversionGroup *grpp = adcp->ad_grpp;
 
   /* DMA setup.*/
-  adcp->ad_dma->CMAR  = (uint32_t)adcp->ad_samples;
   ccr = adcp->ad_dmaprio | DMA_CCR1_EN   | DMA_CCR1_MSIZE_0 | DMA_CCR1_PSIZE_0 |
                            DMA_CCR1_MINC | DMA_CCR1_TCIE    | DMA_CCR1_TEIE;
   if (grpp->acg_circular)
@@ -214,8 +212,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   }
   else
     n = (uint32_t)grpp->acg_num_channels;
-  adcp->ad_dma->CNDTR = n;
-  adcp->ad_dma->CCR = ccr;
+  dmaSetupChannel(adcp->ad_dmap, STM32_DMA_CHANNEL_1,
+                  n, adcp->ad_samples, ccr);
 
   /* ADC setup.*/
   adcp->ad_adc->SMPR1 = grpp->acg_smpr1;
@@ -237,7 +235,7 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
  */
 void adc_lld_stop_conversion(ADCDriver *adcp) {
 
-  adcp->ad_dma->CCR = 0;
+  adcp->ad_dmap->channels[STM32_DMA_CHANNEL_1].CCR = 0;
   adcp->ad_adc->CR2 = 0;
 }
 

os/hal/platforms/STM32/adc_lld.h

@@ -213,9 +213,9 @@ typedef struct {
    */
   ADC_TypeDef               *ad_adc;
   /**
-   * @brief Pointer to the DMA channel registers block.
+   * @brief Pointer to the DMA registers block.
    */
-  DMA_Channel_TypeDef       *ad_dma;
+  stm32_dma_t               *ad_dmap;
   /**
    * @brief DMA priority bit mask.
    */

readme.txt

@@ -72,6 +72,7 @@
 - NEW: Added a generic BaseFileStream interface for future File System
   implementations or integrations (untested and not sure if it will stay or
   change).
+- CHANGE: Modified the STM32 ADC driver to use the new DMA infrastructure.
 
 *** 2.1.1 ***
 - FIX: Fixed insufficient stack size for idle thread (bug 3033624)(backported