Makefile optimizations, adjusted some scatter files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12129 110e8d01-0319-4d1e-a829-52ad28d1bb01
This commit is contained in:
Giovanni Di Sirio
parent
3a10919497
commit
858b658d39
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@ -18,7 +18,7 @@ ifeq ($(USE_CPPOPT),)
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USE_CPPOPT = -fno-rtti
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endif
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# Enable this if you want the linker to remove unused code and data
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# Enable this if you want the linker to remove unused code and data.
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ifeq ($(USE_LINK_GC),)
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USE_LINK_GC = yes
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endif
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@ -28,16 +28,11 @@ ifeq ($(USE_LDOPT),)
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USE_LDOPT =
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endif
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# Enable this if you want link time optimizations (LTO)
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# Enable this if you want link time optimizations (LTO).
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ifeq ($(USE_LTO),)
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USE_LTO = yes
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endif
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# If enabled, this option allows to compile the application in THUMB mode.
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ifeq ($(USE_THUMB),)
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USE_THUMB = yes
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endif
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# Enable this if you want to see the full log while compiling.
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ifeq ($(USE_VERBOSE_COMPILE),)
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USE_VERBOSE_COMPILE = no
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@ -74,19 +69,30 @@ ifeq ($(USE_FPU),)
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USE_FPU = no
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endif
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# FPU-related options.
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ifeq ($(USE_FPU_OPT),)
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USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
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endif
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#
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# Architecture or project specific options
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##############################################################################
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##############################################################################
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# Project, sources and paths
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# Project, target, sources and paths
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#
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# Define project name here
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PROJECT = ch
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# Imported source files and paths
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# Target settings.
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MCU = cortex-m4
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# Imported source files and paths.
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CHIBIOS = ../../..
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CONFDIR := ./cfg
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BUILDDIR := ./build
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DEPDIR := ./.dep
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# Licensing files.
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include $(CHIBIOS)/os/license/license.mk
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@ -100,12 +106,14 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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# Auto-build files in ./source recursively.
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include $(CHIBIOS)/tools/mk/autobuild.mk
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# Other files (optional).
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include $(CHIBIOS)/test/lib/test.mk
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include $(CHIBIOS)/test/rt/rt_test.mk
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include $(CHIBIOS)/test/oslib/oslib_test.mk
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# Define linker script file here
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# Define linker script file here.
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LDSCRIPT= $(STARTUPLD)/STM32F401xE.ld
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# C sources that can be compiled in ARM or THUMB mode depending on the global
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@ -118,73 +126,23 @@ CSRC = $(ALLCSRC) \
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# setting.
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CPPSRC = $(ALLCPPSRC)
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# C sources to be compiled in ARM mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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ACSRC =
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# C++ sources to be compiled in ARM mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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ACPPSRC =
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# C sources to be compiled in THUMB mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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TCSRC =
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# C sources to be compiled in THUMB mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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TCPPSRC =
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# List ASM source files here
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# List ASM source files here.
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ASMSRC = $(ALLASMSRC)
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# List ASM with preprocessor source files here.
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ASMXSRC = $(ALLXASMSRC)
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INCDIR = $(ALLINC) $(TESTINC)
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# Inclusion directories.
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INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
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#
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# Project, sources and paths
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##############################################################################
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##############################################################################
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# Compiler settings
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#
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MCU = cortex-m4
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#TRGT = arm-elf-
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TRGT = arm-none-eabi-
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CC = $(TRGT)gcc
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CPPC = $(TRGT)g++
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# Enable loading with g++ only if you need C++ runtime support.
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# NOTE: You can use C++ even without C++ support if you are careful. C++
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# runtime support makes code size explode.
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LD = $(TRGT)gcc
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#LD = $(TRGT)g++
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CP = $(TRGT)objcopy
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AS = $(TRGT)gcc -x assembler-with-cpp
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AR = $(TRGT)ar
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OD = $(TRGT)objdump
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SZ = $(TRGT)size
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HEX = $(CP) -O ihex
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BIN = $(CP) -O binary
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# ARM-specific options here
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AOPT =
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# THUMB-specific options here
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TOPT = -mthumb -DTHUMB
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# Define C warning options here
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# Define C warning options here.
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CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
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# Define C++ warning options here
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# Define C++ warning options here.
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CPPWARN = -Wall -Wextra -Wundef
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#
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# Compiler settings
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# Project, target, sources and paths
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##############################################################################
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##############################################################################
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@ -207,8 +165,25 @@ ULIBDIR =
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ULIBS =
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#
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# End of user defines
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# End of user section
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##############################################################################
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RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
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##############################################################################
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# Common rules
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#
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RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
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include $(RULESPATH)/arm-none-eabi.mk
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include $(RULESPATH)/rules.mk
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#
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# Common rules
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##############################################################################
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##############################################################################
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# Custom rules
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#
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#
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# Custom rules
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##############################################################################
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@ -33,11 +33,6 @@ ifeq ($(USE_LTO),)
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USE_LTO = yes
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endif
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# If enabled, this option allows to compile the application in THUMB mode.
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ifeq ($(USE_THUMB),)
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USE_THUMB = yes
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endif
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# Enable this if you want to see the full log while compiling.
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ifeq ($(USE_VERBOSE_COMPILE),)
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USE_VERBOSE_COMPILE = no
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@ -76,7 +71,7 @@ endif
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# FPU-related options.
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ifeq ($(USE_FPU_OPT),)
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USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant
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USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
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endif
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#
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@ -84,13 +79,16 @@ endif
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##############################################################################
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##############################################################################
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# Project, sources and paths
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# Project, target, sources and paths
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#
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# Define project name here
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PROJECT = ch
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# Imported source files and paths
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# Target settings.
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MCU = cortex-m4
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# Imported source files and paths.
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CHIBIOS = ../../..
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CONFDIR := ./cfg
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BUILDDIR := ./build
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@ -115,7 +113,7 @@ include $(CHIBIOS)/test/lib/test.mk
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include $(CHIBIOS)/test/rt/rt_test.mk
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include $(CHIBIOS)/test/oslib/oslib_test.mk
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# Define linker script file here
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# Define linker script file here.
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LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld
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# C sources that can be compiled in ARM or THUMB mode depending on the global
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@ -128,34 +126,23 @@ CSRC = $(ALLCSRC) \
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# setting.
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CPPSRC = $(ALLCPPSRC)
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# C sources to be compiled in ARM mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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ACSRC =
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# C++ sources to be compiled in ARM mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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ACPPSRC =
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# C sources to be compiled in THUMB mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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TCSRC =
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# C sources to be compiled in THUMB mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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# option that results in lower performance and larger code size.
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TCPPSRC =
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# List ASM source files here.
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ASMSRC = $(ALLASMSRC)
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# List ASM with preprocessor source files here.
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ASMXSRC = $(ALLXASMSRC)
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# Inclusion directories.
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INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
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# Define C warning options here.
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CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
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# Define C++ warning options here.
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CPPWARN = -Wall -Wextra -Wundef
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#
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# Project, sources and paths
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# Project, target, sources and paths
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##############################################################################
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##############################################################################
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@ -182,43 +169,21 @@ ULIBS =
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##############################################################################
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##############################################################################
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# Compiler settings
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# Common rules
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#
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MCU = cortex-m4
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#TRGT = arm-elf-
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TRGT = arm-none-eabi-
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CC = $(TRGT)gcc
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CPPC = $(TRGT)g++
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# Enable loading with g++ only if you need C++ runtime support.
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# NOTE: You can use C++ even without C++ support if you are careful. C++
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# runtime support makes code size explode.
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LD = $(TRGT)gcc
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#LD = $(TRGT)g++
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CP = $(TRGT)objcopy
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AS = $(TRGT)gcc -x assembler-with-cpp
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AR = $(TRGT)ar
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OD = $(TRGT)objdump
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SZ = $(TRGT)size
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HEX = $(CP) -O ihex
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BIN = $(CP) -O binary
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# ARM-specific options here
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AOPT =
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# THUMB-specific options here
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TOPT = -mthumb -DTHUMB
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# Define C warning options here
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CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
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# Define C++ warning options here
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CPPWARN = -Wall -Wextra -Wundef
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RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
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include $(RULESPATH)/arm-none-eabi.mk
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include $(RULESPATH)/rules.mk
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#
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# Compiler settings
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# Common rules
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##############################################################################
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RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
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include $(RULESPATH)/rules.mk
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##############################################################################
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# Custom rules
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#
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#
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# Custom rules
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##############################################################################
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@ -111,7 +111,7 @@ SECTIONS
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_etext = .;
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_textdata = _etext;
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.stacks :
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.stacks (NOLOAD) :
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{
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. = ALIGN(8);
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__stacks_base__ = .;
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@ -132,7 +132,7 @@ SECTIONS
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PROVIDE(_edata = .);
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} > DATA_RAM AT > flash
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.bss : ALIGN(4)
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.bss (NOLOAD) : ALIGN(4)
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{
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. = ALIGN(4);
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PROVIDE(_bss_start = .);
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@ -111,7 +111,7 @@ SECTIONS
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_etext = .;
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_textdata = _etext;
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.stacks :
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.stacks (NOLOAD) :
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{
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. = ALIGN(8);
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__stacks_base__ = .;
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@ -132,7 +132,7 @@ SECTIONS
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PROVIDE(_edata = .);
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} > DATA_RAM AT > flash
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.bss : ALIGN(4)
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.bss (NOLOAD) : ALIGN(4)
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{
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. = ALIGN(4);
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PROVIDE(_bss_start = .);
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@ -17,7 +17,7 @@
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SECTIONS
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{
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/* Special section for exceptions stack.*/
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.mstack :
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.mstack (NOLOAD) :
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{
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. = ALIGN(8);
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__main_stack_base__ = .;
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@ -27,7 +27,7 @@ SECTIONS
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} > MAIN_STACK_RAM
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/* Special section for process stack.*/
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.pstack :
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.pstack (NOLOAD) :
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{
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__process_stack_base__ = .;
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__main_thread_stack_base__ = .;
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|
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@ -0,0 +1,23 @@
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##############################################################################
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# Compiler settings
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#
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TRGT = arm-none-eabi-
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CC = $(TRGT)gcc
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CPPC = $(TRGT)g++
|
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# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
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LD = $(TRGT)gcc
|
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#LD = $(TRGT)g++
|
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CP = $(TRGT)objcopy
|
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AS = $(TRGT)gcc -x assembler-with-cpp
|
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AR = $(TRGT)ar
|
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OD = $(TRGT)objdump
|
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SZ = $(TRGT)size
|
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HEX = $(CP) -O ihex
|
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BIN = $(CP) -O binary
|
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|
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#
|
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# Compiler settings
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||||
##############################################################################
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@ -86,24 +86,16 @@ ifdef SREC
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endif
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|
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# Source files groups and paths
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ifeq ($(USE_THUMB),yes)
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TCSRC += $(CSRC)
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TCPPSRC += $(CPPSRC)
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else
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ACSRC += $(CSRC)
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ACPPSRC += $(CPPSRC)
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endif
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ASRC := $(ACSRC) $(ACPPSRC)
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TCSRC += $(CSRC)
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TCPPSRC += $(CPPSRC)
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TSRC := $(TCSRC) $(TCPPSRC)
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SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
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SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(TSRC)))
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# Various directories
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OBJDIR := $(BUILDDIR)/obj
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LSTDIR := $(BUILDDIR)/lst
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# Object files groups
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ACOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
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ACPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
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TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
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TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
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ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
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@ -131,36 +123,6 @@ CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:
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CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
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LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)
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|
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# Thumb interwork enabled only if needed because it kills performance.
|
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ifneq ($(strip $(TSRC)),)
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CFLAGS += -DTHUMB_PRESENT
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CPPFLAGS += -DTHUMB_PRESENT
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ASFLAGS += -DTHUMB_PRESENT
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ASXFLAGS += -DTHUMB_PRESENT
|
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ifneq ($(strip $(ASRC)),)
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# Mixed ARM and THUMB mode.
|
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CFLAGS += -mthumb-interwork
|
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CPPFLAGS += -mthumb-interwork
|
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ASFLAGS += -mthumb-interwork
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ASXFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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else
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# Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
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CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
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CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
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ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
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ASXFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
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LDFLAGS += -mno-thumb-interwork -mthumb
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endif
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else
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# Pure ARM mode
|
||||
CFLAGS += -mno-thumb-interwork
|
||||
CPPFLAGS += -mno-thumb-interwork
|
||||
ASFLAGS += -mno-thumb-interwork
|
||||
ASXFLAGS += -mno-thumb-interwork
|
||||
LDFLAGS += -mno-thumb-interwork
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
|
||||
ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
|
||||
|
|
@ -199,40 +161,22 @@ $(LSTDIR):
|
|||
$(DEPDIR):
|
||||
@mkdir -p $(DEPDIR)
|
||||
|
||||
$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ACOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
@$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(TCOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
@$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ASMOBJS) : $(OBJDIR)/%.o : %.s $(MAKEFILE_LIST)
|
||||
|
|
@ -23,12 +23,12 @@ ENTRY(_reset_address)
|
|||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(flash);
|
||||
.boot0 : ALIGN(16) SUBALIGN(16)
|
||||
.boot0 : ALIGN(16)
|
||||
{
|
||||
KEEP(*(.boot))
|
||||
} > flash
|
||||
|
||||
.boot1 : ALIGN(16) SUBALIGN(16)
|
||||
.boot1 : ALIGN(16)
|
||||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
|
|
@ -41,7 +41,7 @@ SECTIONS
|
|||
KEEP(*(.ivors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
constructors : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
|
|
@ -49,7 +49,7 @@ SECTIONS
|
|||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
destructors : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
|
|
@ -57,21 +57,21 @@ SECTIONS
|
|||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
.text_vle : ALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
.text : ALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
.rodata : ALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
|
|
@ -81,7 +81,7 @@ SECTIONS
|
|||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
.sdata2 : ALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
|
|
@ -102,12 +102,12 @@ SECTIONS
|
|||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
.romdata : ALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
.stacks (NOLOAD) : ALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
|
|
@ -136,7 +136,7 @@ SECTIONS
|
|||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
.sbss (NOLOAD) :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
|
|
@ -145,7 +145,7 @@ SECTIONS
|
|||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
|
|
|
|||
|
|
@ -23,13 +23,13 @@ ENTRY(_reset_address)
|
|||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(flash);
|
||||
.boot0 : ALIGN(16) SUBALIGN(16)
|
||||
.boot0 : ALIGN(16)
|
||||
{
|
||||
__ivpr_base__ = .;
|
||||
KEEP(*(.boot))
|
||||
} > flash
|
||||
|
||||
.boot1 : ALIGN(16) SUBALIGN(16)
|
||||
.boot1 : ALIGN(16)
|
||||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
|
|
@ -38,7 +38,7 @@ SECTIONS
|
|||
KEEP(*(.vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
constructors : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
|
|
@ -46,7 +46,7 @@ SECTIONS
|
|||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
destructors : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
|
|
@ -54,21 +54,21 @@ SECTIONS
|
|||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
.text_vle : ALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
.text : ALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
.rodata : ALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
|
|
@ -78,7 +78,7 @@ SECTIONS
|
|||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
.sdata2 : ALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
|
|
@ -99,12 +99,12 @@ SECTIONS
|
|||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
.romdata : ALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
.stacks (NOLOAD) : ALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
|
|
@ -133,7 +133,7 @@ SECTIONS
|
|||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
.sbss (NOLOAD) :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
|
|
@ -142,7 +142,7 @@ SECTIONS
|
|||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
|
|
|
|||
|
|
@ -23,13 +23,13 @@ ENTRY(_reset_address)
|
|||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(flash);
|
||||
.boot0 : ALIGN(16) SUBALIGN(16)
|
||||
.boot0 : ALIGN(16)
|
||||
{
|
||||
__ivpr_base__ = .;
|
||||
KEEP(*(.boot))
|
||||
} > flash
|
||||
|
||||
.boot1 : ALIGN(16) SUBALIGN(16)
|
||||
.boot1 : ALIGN(16)
|
||||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
|
|
@ -38,7 +38,7 @@ SECTIONS
|
|||
KEEP(*(.vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
constructors : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
|
|
@ -46,7 +46,7 @@ SECTIONS
|
|||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
destructors : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
|
|
@ -54,21 +54,21 @@ SECTIONS
|
|||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
.text_vle : ALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
.text : ALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
.rodata : ALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
|
|
@ -78,7 +78,7 @@ SECTIONS
|
|||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
.sdata2 : ALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
|
|
@ -99,12 +99,12 @@ SECTIONS
|
|||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
.romdata : ALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
.stacks (NOLOAD) : ALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
|
|
@ -133,7 +133,7 @@ SECTIONS
|
|||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
.sbss (NOLOAD) :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
|
|
@ -142,7 +142,7 @@ SECTIONS
|
|||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
|
|
|
|||
Loading…
Reference in New Issue