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Makefile optimizations, adjusted some scatter files. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12129 110e8d01-0319-4d1e-a829-52ad28d1bb01
This commit is contained in:
Giovanni Di Sirio 2018-07-06 12:54:03 +00:00
parent 3a10919497
commit 858b658d39
13 changed files with 146 additions and 239 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

115
demos/STM32/RT-STM32F401RE-NUCLEO64/Makefile
View File

@ -18,7 +18,7 @@ ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti USE_CPPOPT = -fno-rtti
endif endif
# Enable this if you want the linker to remove unused code and data # Enable this if you want the linker to remove unused code and data.
ifeq ($(USE_LINK_GC),) ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes USE_LINK_GC = yes
endif endif
@ -28,16 +28,11 @@ ifeq ($(USE_LDOPT),)
USE_LDOPT = USE_LDOPT =
endif endif
# Enable this if you want link time optimizations (LTO) # Enable this if you want link time optimizations (LTO).
ifeq ($(USE_LTO),) ifeq ($(USE_LTO),)
USE_LTO = yes USE_LTO = yes
endif endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling. # Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),) ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no USE_VERBOSE_COMPILE = no
@ -74,19 +69,30 @@ ifeq ($(USE_FPU),)
USE_FPU = no USE_FPU = no
endif endif
# FPU-related options.
ifeq ($(USE_FPU_OPT),)
USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
endif
# #
# Architecture or project specific options # Architecture or project specific options
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Project, sources and paths # Project, target, sources and paths
# #
# Define project name here # Define project name here
PROJECT = ch PROJECT = ch
# Imported source files and paths # Target settings.
MCU = cortex-m4
# Imported source files and paths.
CHIBIOS = ../../.. CHIBIOS = ../../..
CONFDIR := ./cfg
BUILDDIR := ./build
DEPDIR := ./.dep
# Licensing files. # Licensing files.
include $(CHIBIOS)/os/license/license.mk include $(CHIBIOS)/os/license/license.mk
@ -100,12 +106,14 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk
# RTOS files (optional). # RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
# Auto-build files in ./source recursively.
include $(CHIBIOS)/tools/mk/autobuild.mk
# Other files (optional). # Other files (optional).
include $(CHIBIOS)/test/lib/test.mk include $(CHIBIOS)/test/lib/test.mk
include $(CHIBIOS)/test/rt/rt_test.mk include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here # Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32F401xE.ld LDSCRIPT= $(STARTUPLD)/STM32F401xE.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global # C sources that can be compiled in ARM or THUMB mode depending on the global
@ -118,73 +126,23 @@ CSRC = $(ALLCSRC) \
# setting. # setting.
CPPSRC = $(ALLCPPSRC) CPPSRC = $(ALLCPPSRC)
# C sources to be compiled in ARM mode regardless of the global setting. # List ASM source files here.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(ALLASMSRC) ASMSRC = $(ALLASMSRC)
# List ASM with preprocessor source files here.
ASMXSRC = $(ALLXASMSRC) ASMXSRC = $(ALLXASMSRC)
INCDIR = $(ALLINC) $(TESTINC) # Inclusion directories.
INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
# # Define C warning options here.
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m4
#TRGT = arm-elf-
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
AR = $(TRGT)ar
OD = $(TRGT)objdump
SZ = $(TRGT)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
# Define C++ warning options here # Define C++ warning options here.
CPPWARN = -Wall -Wextra -Wundef CPPWARN = -Wall -Wextra -Wundef
# #
# Compiler settings # Project, target, sources and paths
############################################################################## ##############################################################################
############################################################################## ##############################################################################
@ -207,8 +165,25 @@ ULIBDIR =
ULIBS = ULIBS =
# #
# End of user defines # End of user section
############################################################################## ##############################################################################
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC ##############################################################################
# Common rules
#
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
include $(RULESPATH)/arm-none-eabi.mk
include $(RULESPATH)/rules.mk include $(RULESPATH)/rules.mk
#
# Common rules
##############################################################################
##############################################################################
# Custom rules
#
#
# Custom rules
##############################################################################

0
demos/STM32/RT-STM32F401RE-NUCLEO64/chconf.h → demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/chconf.h
View File

0
demos/STM32/RT-STM32F401RE-NUCLEO64/halconf.h → demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/halconf.h
View File

0
demos/STM32/RT-STM32F401RE-NUCLEO64/mcuconf.h → demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/mcuconf.h
View File

93
demos/STM32/RT-STM32L476-DISCOVERY/Makefile
View File

@ -33,11 +33,6 @@ ifeq ($(USE_LTO),)
USE_LTO = yes USE_LTO = yes
endif endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling. # Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),) ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no USE_VERBOSE_COMPILE = no
@ -76,7 +71,7 @@ endif
# FPU-related options. # FPU-related options.
ifeq ($(USE_FPU_OPT),) ifeq ($(USE_FPU_OPT),)
USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
endif endif
# #
@ -84,13 +79,16 @@ endif
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Project, sources and paths # Project, target, sources and paths
# #
# Define project name here # Define project name here
PROJECT = ch PROJECT = ch
# Imported source files and paths # Target settings.
MCU = cortex-m4
# Imported source files and paths.
CHIBIOS = ../../.. CHIBIOS = ../../..
CONFDIR := ./cfg CONFDIR := ./cfg
BUILDDIR := ./build BUILDDIR := ./build
@ -115,7 +113,7 @@ include $(CHIBIOS)/test/lib/test.mk
include $(CHIBIOS)/test/rt/rt_test.mk include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here # Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global # C sources that can be compiled in ARM or THUMB mode depending on the global
@ -128,34 +126,23 @@ CSRC = $(ALLCSRC) \
# setting. # setting.
CPPSRC = $(ALLCPPSRC) CPPSRC = $(ALLCPPSRC)
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here. # List ASM source files here.
ASMSRC = $(ALLASMSRC) ASMSRC = $(ALLASMSRC)
# List ASM with preprocessor source files here.
ASMXSRC = $(ALLXASMSRC) ASMXSRC = $(ALLXASMSRC)
# Inclusion directories.
INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
# Define C warning options here.
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
# Define C++ warning options here.
CPPWARN = -Wall -Wextra -Wundef
# #
# Project, sources and paths # Project, target, sources and paths
############################################################################## ##############################################################################
############################################################################## ##############################################################################
@ -182,43 +169,21 @@ ULIBS =
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Compiler settings # Common rules
# #
MCU = cortex-m4 RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
include $(RULESPATH)/arm-none-eabi.mk
#TRGT = arm-elf- include $(RULESPATH)/rules.mk
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
AR = $(TRGT)ar
OD = $(TRGT)objdump
SZ = $(TRGT)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra -Wundef
# #
# Compiler settings # Common rules
############################################################################## ##############################################################################
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC ##############################################################################
include $(RULESPATH)/rules.mk # Custom rules
#
#
# Custom rules
##############################################################################

4
os/common/startup/ARM/compilers/GCC/ld/rules.ld
View File

@ -111,7 +111,7 @@ SECTIONS
_etext = .; _etext = .;
_textdata = _etext; _textdata = _etext;
.stacks : .stacks (NOLOAD) :
{ {
. = ALIGN(8); . = ALIGN(8);
__stacks_base__ = .; __stacks_base__ = .;
@ -132,7 +132,7 @@ SECTIONS
PROVIDE(_edata = .); PROVIDE(_edata = .);
} > DATA_RAM AT > flash } > DATA_RAM AT > flash
.bss : ALIGN(4) .bss (NOLOAD) : ALIGN(4)
{ {
. = ALIGN(4); . = ALIGN(4);
PROVIDE(_bss_start = .); PROVIDE(_bss_start = .);

4
os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld
View File

@ -111,7 +111,7 @@ SECTIONS
_etext = .; _etext = .;
_textdata = _etext; _textdata = _etext;
.stacks : .stacks (NOLOAD) :
{ {
. = ALIGN(8); . = ALIGN(8);
__stacks_base__ = .; __stacks_base__ = .;
@ -132,7 +132,7 @@ SECTIONS
PROVIDE(_edata = .); PROVIDE(_edata = .);
} > DATA_RAM AT > flash } > DATA_RAM AT > flash
.bss : ALIGN(4) .bss (NOLOAD) : ALIGN(4)
{ {
. = ALIGN(4); . = ALIGN(4);
PROVIDE(_bss_start = .); PROVIDE(_bss_start = .);

4
os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld
View File

@ -17,7 +17,7 @@
SECTIONS SECTIONS
{ {
/* Special section for exceptions stack.*/ /* Special section for exceptions stack.*/
.mstack : .mstack (NOLOAD) :
{ {
. = ALIGN(8); . = ALIGN(8);
__main_stack_base__ = .; __main_stack_base__ = .;
@ -27,7 +27,7 @@ SECTIONS
} > MAIN_STACK_RAM } > MAIN_STACK_RAM
/* Special section for process stack.*/ /* Special section for process stack.*/
.pstack : .pstack (NOLOAD) :
{ {
__process_stack_base__ = .; __process_stack_base__ = .;
__main_thread_stack_base__ = .; __main_thread_stack_base__ = .;

23
os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk Normal file
View File

@ -0,0 +1,23 @@
##############################################################################
# Compiler settings
#
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
AR = $(TRGT)ar
OD = $(TRGT)objdump
SZ = $(TRGT)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
#
# Compiler settings
##############################################################################

70
os/common/startup/ARMCMx/compilers/GCC/rules.mk → os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk
View File

@ -86,24 +86,16 @@ ifdef SREC
endif endif
# Source files groups and paths # Source files groups and paths
ifeq ($(USE_THUMB),yes) TCSRC += $(CSRC)
TCSRC += $(CSRC) TCPPSRC += $(CPPSRC)
TCPPSRC += $(CPPSRC)
else
ACSRC += $(CSRC)
ACPPSRC += $(CPPSRC)
endif
ASRC := $(ACSRC) $(ACPPSRC)
TSRC := $(TCSRC) $(TCPPSRC) TSRC := $(TCSRC) $(TCPPSRC)
SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC))) SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(TSRC)))
# Various directories # Various directories
OBJDIR := $(BUILDDIR)/obj OBJDIR := $(BUILDDIR)/obj
LSTDIR := $(BUILDDIR)/lst LSTDIR := $(BUILDDIR)/lst
# Object files groups # Object files groups
ACOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
ACPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o))) TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o))) TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o))) ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
@ -131,36 +123,6 @@ CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:
CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS) CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT) LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)
# Thumb interwork enabled only if needed because it kills performance.
ifneq ($(strip $(TSRC)),)
CFLAGS += -DTHUMB_PRESENT
CPPFLAGS += -DTHUMB_PRESENT
ASFLAGS += -DTHUMB_PRESENT
ASXFLAGS += -DTHUMB_PRESENT
ifneq ($(strip $(ASRC)),)
# Mixed ARM and THUMB mode.
CFLAGS += -mthumb-interwork
CPPFLAGS += -mthumb-interwork
ASFLAGS += -mthumb-interwork
ASXFLAGS += -mthumb-interwork
LDFLAGS += -mthumb-interwork
else
# Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
ASXFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
LDFLAGS += -mno-thumb-interwork -mthumb
endif
else
# Pure ARM mode
CFLAGS += -mno-thumb-interwork
CPPFLAGS += -mno-thumb-interwork
ASFLAGS += -mno-thumb-interwork
ASXFLAGS += -mno-thumb-interwork
LDFLAGS += -mno-thumb-interwork
endif
# Generate dependency information # Generate dependency information
ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
@ -199,40 +161,22 @@ $(LSTDIR):
$(DEPDIR): $(DEPDIR):
@mkdir -p $(DEPDIR) @mkdir -p $(DEPDIR)
$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
else
@echo Compiling $(<F)
@$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
endif
$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST) $(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes) ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo @echo
$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@ $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
else else
@echo Compiling $(<F) @echo Compiling $(<F)
@$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@ @$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
endif
$(ACOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
else
@echo Compiling $(<F)
@$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
endif endif
$(TCOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST) $(TCOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes) ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo @echo
$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@ $(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
else else
@echo Compiling $(<F) @echo Compiling $(<F)
@$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@ @$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
endif endif
$(ASMOBJS) : $(OBJDIR)/%.o : %.s $(MAKEFILE_LIST) $(ASMOBJS) : $(OBJDIR)/%.o : %.s $(MAKEFILE_LIST)

24
os/common/startup/e200/compilers/GCC/ld/rules_z0.ld
View File

@ -23,12 +23,12 @@ ENTRY(_reset_address)
SECTIONS SECTIONS
{ {
. = ORIGIN(flash); . = ORIGIN(flash);
.boot0 : ALIGN(16) SUBALIGN(16) .boot0 : ALIGN(16)
{ {
KEEP(*(.boot)) KEEP(*(.boot))
} > flash } > flash
.boot1 : ALIGN(16) SUBALIGN(16) .boot1 : ALIGN(16)
{ {
KEEP(*(.handlers)) KEEP(*(.handlers))
KEEP(*(.crt0)) KEEP(*(.crt0))
@ -41,7 +41,7 @@ SECTIONS
KEEP(*(.ivors)) KEEP(*(.ivors))
} > flash } > flash
constructors : ALIGN(4) SUBALIGN(4) constructors : ALIGN(4)
{ {
PROVIDE(__init_array_start = .); PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*))) KEEP(*(SORT(.init_array.*)))
@ -49,7 +49,7 @@ SECTIONS
PROVIDE(__init_array_end = .); PROVIDE(__init_array_end = .);
} > flash } > flash
destructors : ALIGN(4) SUBALIGN(4) destructors : ALIGN(4)
{ {
PROVIDE(__fini_array_start = .); PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array)) KEEP(*(.fini_array))
@ -57,21 +57,21 @@ SECTIONS
PROVIDE(__fini_array_end = .); PROVIDE(__fini_array_end = .);
} > flash } > flash
.text_vle : ALIGN(16) SUBALIGN(16) .text_vle : ALIGN(16)
{ {
*(.text_vle) *(.text_vle)
*(.text_vle.*) *(.text_vle.*)
*(.gnu.linkonce.t_vle.*) *(.gnu.linkonce.t_vle.*)
} > flash } > flash
.text : ALIGN(16) SUBALIGN(16) .text : ALIGN(16)
{ {
*(.text) *(.text)
*(.text.*) *(.text.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
} > flash } > flash
.rodata : ALIGN(16) SUBALIGN(16) .rodata : ALIGN(16)
{ {
*(.glue_7t) *(.glue_7t)
*(.glue_7) *(.glue_7)
@ -81,7 +81,7 @@ SECTIONS
*(.rodata1) *(.rodata1)
} > flash } > flash
.sdata2 : ALIGN(16) SUBALIGN(16) .sdata2 : ALIGN(16)
{ {
__sdata2_start__ = . + 0x8000; __sdata2_start__ = . + 0x8000;
*(.sdata2) *(.sdata2)
@ -102,12 +102,12 @@ SECTIONS
*(.eh_frame) *(.eh_frame)
} > flash } > flash
.romdata : ALIGN(16) SUBALIGN(16) .romdata : ALIGN(16)
{ {
__romdata_start__ = .; __romdata_start__ = .;
} > flash } > flash
.stacks : ALIGN(16) SUBALIGN(16) .stacks (NOLOAD) : ALIGN(16)
{ {
. = ALIGN(8); . = ALIGN(8);
__irq_stack_base__ = .; __irq_stack_base__ = .;
@ -136,7 +136,7 @@ SECTIONS
__data_end__ = .; __data_end__ = .;
} > ram } > ram
.sbss : .sbss (NOLOAD) :
{ {
__bss_start__ = .; __bss_start__ = .;
*(.sbss) *(.sbss)
@ -145,7 +145,7 @@ SECTIONS
*(.scommon) *(.scommon)
} > ram } > ram
.bss : .bss (NOLOAD) :
{ {
*(.bss) *(.bss)
*(.bss.*) *(.bss.*)

24
os/common/startup/e200/compilers/GCC/ld/rules_z3.ld
View File

@ -23,13 +23,13 @@ ENTRY(_reset_address)
SECTIONS SECTIONS
{ {
. = ORIGIN(flash); . = ORIGIN(flash);
.boot0 : ALIGN(16) SUBALIGN(16) .boot0 : ALIGN(16)
{ {
__ivpr_base__ = .; __ivpr_base__ = .;
KEEP(*(.boot)) KEEP(*(.boot))
} > flash } > flash
.boot1 : ALIGN(16) SUBALIGN(16) .boot1 : ALIGN(16)
{ {
KEEP(*(.handlers)) KEEP(*(.handlers))
KEEP(*(.crt0)) KEEP(*(.crt0))
@ -38,7 +38,7 @@ SECTIONS
KEEP(*(.vectors)) KEEP(*(.vectors))
} > flash } > flash
constructors : ALIGN(4) SUBALIGN(4) constructors : ALIGN(4)
{ {
PROVIDE(__init_array_start = .); PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*))) KEEP(*(SORT(.init_array.*)))
@ -46,7 +46,7 @@ SECTIONS
PROVIDE(__init_array_end = .); PROVIDE(__init_array_end = .);
} > flash } > flash
destructors : ALIGN(4) SUBALIGN(4) destructors : ALIGN(4)
{ {
PROVIDE(__fini_array_start = .); PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array)) KEEP(*(.fini_array))
@ -54,21 +54,21 @@ SECTIONS
PROVIDE(__fini_array_end = .); PROVIDE(__fini_array_end = .);
} > flash } > flash
.text_vle : ALIGN(16) SUBALIGN(16) .text_vle : ALIGN(16)
{ {
*(.text_vle) *(.text_vle)
*(.text_vle.*) *(.text_vle.*)
*(.gnu.linkonce.t_vle.*) *(.gnu.linkonce.t_vle.*)
} > flash } > flash
.text : ALIGN(16) SUBALIGN(16) .text : ALIGN(16)
{ {
*(.text) *(.text)
*(.text.*) *(.text.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
} > flash } > flash
.rodata : ALIGN(16) SUBALIGN(16) .rodata : ALIGN(16)
{ {
*(.glue_7t) *(.glue_7t)
*(.glue_7) *(.glue_7)
@ -78,7 +78,7 @@ SECTIONS
*(.rodata1) *(.rodata1)
} > flash } > flash
.sdata2 : ALIGN(16) SUBALIGN(16) .sdata2 : ALIGN(16)
{ {
__sdata2_start__ = . + 0x8000; __sdata2_start__ = . + 0x8000;
*(.sdata2) *(.sdata2)
@ -99,12 +99,12 @@ SECTIONS
*(.eh_frame) *(.eh_frame)
} > flash } > flash
.romdata : ALIGN(16) SUBALIGN(16) .romdata : ALIGN(16)
{ {
__romdata_start__ = .; __romdata_start__ = .;
} > flash } > flash
.stacks : ALIGN(16) SUBALIGN(16) .stacks (NOLOAD) : ALIGN(16)
{ {
. = ALIGN(8); . = ALIGN(8);
__irq_stack_base__ = .; __irq_stack_base__ = .;
@ -133,7 +133,7 @@ SECTIONS
__data_end__ = .; __data_end__ = .;
} > ram } > ram
.sbss : .sbss (NOLOAD) :
{ {
__bss_start__ = .; __bss_start__ = .;
*(.sbss) *(.sbss)
@ -142,7 +142,7 @@ SECTIONS
*(.scommon) *(.scommon)
} > ram } > ram
.bss : .bss (NOLOAD) :
{ {
*(.bss) *(.bss)
*(.bss.*) *(.bss.*)

24
os/common/startup/e200/compilers/GCC/ld/rules_z4.ld
View File

@ -23,13 +23,13 @@ ENTRY(_reset_address)
SECTIONS SECTIONS
{ {
. = ORIGIN(flash); . = ORIGIN(flash);
.boot0 : ALIGN(16) SUBALIGN(16) .boot0 : ALIGN(16)
{ {
__ivpr_base__ = .; __ivpr_base__ = .;
KEEP(*(.boot)) KEEP(*(.boot))
} > flash } > flash
.boot1 : ALIGN(16) SUBALIGN(16) .boot1 : ALIGN(16)
{ {
KEEP(*(.handlers)) KEEP(*(.handlers))
KEEP(*(.crt0)) KEEP(*(.crt0))
@ -38,7 +38,7 @@ SECTIONS
KEEP(*(.vectors)) KEEP(*(.vectors))
} > flash } > flash
constructors : ALIGN(4) SUBALIGN(4) constructors : ALIGN(4)
{ {
PROVIDE(__init_array_start = .); PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*))) KEEP(*(SORT(.init_array.*)))
@ -46,7 +46,7 @@ SECTIONS
PROVIDE(__init_array_end = .); PROVIDE(__init_array_end = .);
} > flash } > flash
destructors : ALIGN(4) SUBALIGN(4) destructors : ALIGN(4)
{ {
PROVIDE(__fini_array_start = .); PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array)) KEEP(*(.fini_array))
@ -54,21 +54,21 @@ SECTIONS
PROVIDE(__fini_array_end = .); PROVIDE(__fini_array_end = .);
} > flash } > flash
.text_vle : ALIGN(16) SUBALIGN(16) .text_vle : ALIGN(16)
{ {
*(.text_vle) *(.text_vle)
*(.text_vle.*) *(.text_vle.*)
*(.gnu.linkonce.t_vle.*) *(.gnu.linkonce.t_vle.*)
} > flash } > flash
.text : ALIGN(16) SUBALIGN(16) .text : ALIGN(16)
{ {
*(.text) *(.text)
*(.text.*) *(.text.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
} > flash } > flash
.rodata : ALIGN(16) SUBALIGN(16) .rodata : ALIGN(16)
{ {
*(.glue_7t) *(.glue_7t)
*(.glue_7) *(.glue_7)
@ -78,7 +78,7 @@ SECTIONS
*(.rodata1) *(.rodata1)
} > flash } > flash
.sdata2 : ALIGN(16) SUBALIGN(16) .sdata2 : ALIGN(16)
{ {
__sdata2_start__ = . + 0x8000; __sdata2_start__ = . + 0x8000;
*(.sdata2) *(.sdata2)
@ -99,12 +99,12 @@ SECTIONS
*(.eh_frame) *(.eh_frame)
} > flash } > flash
.romdata : ALIGN(16) SUBALIGN(16) .romdata : ALIGN(16)
{ {
__romdata_start__ = .; __romdata_start__ = .;
} > flash } > flash
.stacks : ALIGN(16) SUBALIGN(16) .stacks (NOLOAD) : ALIGN(16)
{ {
. = ALIGN(8); . = ALIGN(8);
__irq_stack_base__ = .; __irq_stack_base__ = .;
@ -133,7 +133,7 @@ SECTIONS
__data_end__ = .; __data_end__ = .;
} > ram } > ram
.sbss : .sbss (NOLOAD) :
{ {
__bss_start__ = .; __bss_start__ = .;
*(.sbss) *(.sbss)
@ -142,7 +142,7 @@ SECTIONS
*(.scommon) *(.scommon)
} > ram } > ram
.bss : .bss (NOLOAD) :
{ {
*(.bss) *(.bss)
*(.bss.*) *(.bss.*)