From 86cacdf737c7c8892e5fd75e8c6aaf940c8fb0b1 Mon Sep 17 00:00:00 2001 From: Andrey Gusakov Date: Wed, 31 May 2023 22:59:40 +0300 Subject: [PATCH] port to 20 more --- os/hal/ports/AT32/AT32F4xx/at32_isr.c | 274 ++++++++++++++++--------- os/hal/ports/AT32/AT32F4xx/platform.mk | 2 +- 2 files changed, 177 insertions(+), 99 deletions(-) diff --git a/os/hal/ports/AT32/AT32F4xx/at32_isr.c b/os/hal/ports/AT32/AT32F4xx/at32_isr.c index d4a42a35e..f39c6f7b2 100644 --- a/os/hal/ports/AT32/AT32F4xx/at32_isr.c +++ b/os/hal/ports/AT32/AT32F4xx/at32_isr.c @@ -51,38 +51,166 @@ /* Driver interrupt handlers. */ /*===========================================================================*/ -#include "stm32_exti0.inc" -#include "stm32_exti1.inc" -#include "stm32_exti2.inc" -#include "stm32_exti3.inc" -#include "stm32_exti4.inc" -#include "stm32_exti5_9.inc" -#include "stm32_exti10_15.inc" -#include "stm32_exti16.inc" -#include "stm32_exti17.inc" -#include "stm32_exti18.inc" -#include "stm32_exti19.inc" -#include "stm32_exti20.inc" -#include "stm32_exti21.inc" -#include "stm32_exti22.inc" +#if (HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS)) || defined(__DOXYGEN__) +#if !defined(STM32_DISABLE_EXTI0_HANDLER) +/** + * @brief EXTI[0] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector58) { + uint32_t pr; -#include "stm32_usart1.inc" -#include "stm32_usart2.inc" -#include "stm32_usart3.inc" -#include "stm32_uart4.inc" -#include "stm32_uart5.inc" -#include "stm32_usart6.inc" -#include "stm32_uart7.inc" -#include "stm32_uart8.inc" + OSAL_IRQ_PROLOGUE(); -#include "stm32_tim1_9_10_11.inc" -#include "stm32_tim2.inc" -#include "stm32_tim3.inc" -#include "stm32_tim4.inc" -#include "stm32_tim5.inc" -#include "stm32_tim6.inc" -#include "stm32_tim7.inc" -#include "stm32_tim8_12_13_14.inc" + pr = EXTI->PR; + pr &= EXTI->IMR & (1U << 0); + EXTI->PR = pr; + + exti_serve_irq(pr, 0); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if !defined(STM32_DISABLE_EXTI1_HANDLER) +/** + * @brief EXTI[1] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector5C) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= EXTI->IMR & (1U << 1); + EXTI->PR = pr; + + exti_serve_irq(pr, 1); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if !defined(STM32_DISABLE_EXTI2_HANDLER) +/** + * @brief EXTI[2] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector60) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= EXTI->IMR & (1U << 2); + EXTI->PR = pr; + + exti_serve_irq(pr, 2); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if !defined(STM32_DISABLE_EXTI3_HANDLER) +/** + * @brief EXTI[3] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector64) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= EXTI->IMR & (1U << 3); + EXTI->PR = pr; + + exti_serve_irq(pr, 3); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if !defined(STM32_DISABLE_EXTI4_HANDLER) +/** + * @brief EXTI[4] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector68) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= EXTI->IMR & (1U << 4); + EXTI->PR = pr; + + exti_serve_irq(pr, 4); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if !defined(STM32_DISABLE_EXTI5_9_HANDLER) +/** + * @brief EXTI[5]...EXTI[9] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector9C) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= EXTI->IMR & ((1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) | + (1U << 9)); + EXTI->PR = pr; + + exti_serve_irq(pr, 5); + exti_serve_irq(pr, 6); + exti_serve_irq(pr, 7); + exti_serve_irq(pr, 8); + exti_serve_irq(pr, 9); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if !defined(STM32_DISABLE_EXTI10_15_HANDLER) +/** + * @brief EXTI[10]...EXTI[15] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(VectorE0) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= EXTI->IMR & ((1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) | + (1U << 14) | (1U << 15)); + EXTI->PR = pr; + + exti_serve_irq(pr, 10); + exti_serve_irq(pr, 11); + exti_serve_irq(pr, 12); + exti_serve_irq(pr, 13); + exti_serve_irq(pr, 14); + exti_serve_irq(pr, 15); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#endif /* HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS) */ /*===========================================================================*/ /* Driver exported functions. */ @@ -95,40 +223,15 @@ */ void irqInit(void) { - exti0_irq_init(); - exti1_irq_init(); - exti2_irq_init(); - exti3_irq_init(); - exti4_irq_init(); - exti5_9_irq_init(); - exti10_15_irq_init(); - exti16_irq_init(); - exti17_irq_init(); - exti18_irq_init(); - exti19_irq_init(); - exti20_irq_init(); - exti21_irq_init(); - exti22_irq_init(); - - tim1_tim9_tim10_tim11_irq_init(); - tim2_irq_init(); - tim3_irq_init(); - tim4_irq_init(); - tim5_irq_init(); - tim6_irq_init(); - tim7_irq_init(); - tim8_tim12_tim13_tim14_irq_init(); - - usart1_irq_init(); - usart2_irq_init(); - usart3_irq_init(); - uart4_irq_init(); - uart5_irq_init(); - usart6_irq_init(); - uart7_irq_init(); - uart8_irq_init(); - uart9_irq_init(); - uart10_irq_init(); +#if HAL_USE_PAL + nvicEnableVector(EXTI0_IRQn, STM32_IRQ_EXTI0_PRIORITY); + nvicEnableVector(EXTI1_IRQn, STM32_IRQ_EXTI1_PRIORITY); + nvicEnableVector(EXTI2_IRQn, STM32_IRQ_EXTI2_PRIORITY); + nvicEnableVector(EXTI3_IRQn, STM32_IRQ_EXTI3_PRIORITY); + nvicEnableVector(EXTI4_IRQn, STM32_IRQ_EXTI4_PRIORITY); + nvicEnableVector(EXTI9_5_IRQn, STM32_IRQ_EXTI5_9_PRIORITY); + nvicEnableVector(EXTI15_10_IRQn, STM32_IRQ_EXTI10_15_PRIORITY); +#endif } /** @@ -138,40 +241,15 @@ void irqInit(void) { */ void irqDeinit(void) { - exti0_irq_deinit(); - exti1_irq_deinit(); - exti2_irq_deinit(); - exti3_irq_deinit(); - exti4_irq_deinit(); - exti5_9_irq_deinit(); - exti10_15_irq_deinit(); - exti16_irq_deinit(); - exti17_irq_deinit(); - exti18_irq_deinit(); - exti19_irq_deinit(); - exti20_irq_deinit(); - exti21_irq_deinit(); - exti22_irq_deinit(); - - tim1_tim9_tim10_tim11_irq_deinit(); - tim2_irq_deinit(); - tim3_irq_deinit(); - tim4_irq_deinit(); - tim5_irq_deinit(); - tim6_irq_deinit(); - tim7_irq_deinit(); - tim8_tim12_tim13_tim14_irq_deinit(); - - usart1_irq_deinit(); - usart2_irq_deinit(); - usart3_irq_deinit(); - uart4_irq_deinit(); - uart5_irq_deinit(); - usart6_irq_deinit(); - uart7_irq_deinit(); - uart8_irq_deinit(); - uart9_irq_deinit(); - uart10_irq_deinit(); +#if HAL_USE_PAL + nvicDisableVector(EXTI0_IRQn); + nvicDisableVector(EXTI1_IRQn); + nvicDisableVector(EXTI2_IRQn); + nvicDisableVector(EXTI3_IRQn); + nvicDisableVector(EXTI4_IRQn); + nvicDisableVector(EXTI9_5_IRQn); + nvicDisableVector(EXTI15_10_IRQn); +#endif } /** @} */ diff --git a/os/hal/ports/AT32/AT32F4xx/platform.mk b/os/hal/ports/AT32/AT32F4xx/platform.mk index 8cf6d3560..0ee6b3933 100644 --- a/os/hal/ports/AT32/AT32F4xx/platform.mk +++ b/os/hal/ports/AT32/AT32F4xx/platform.mk @@ -38,7 +38,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/MACv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk -include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/driver_v2.mk +include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/SDIOv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv1/driver.mk