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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8508 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
Giovanni Di Sirio 2015-11-18 10:24:08 +00:00
parent da4c0dbaa0
commit 88928325f6
14 changed files with 319 additions and 133 deletions
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BIN
demos/SPC5/RT-SPC560D-EVB-CW/cw/ch/ch.mcp
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19
os/rt/ports/e200/chcore.h
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@ -59,7 +59,7 @@
#if defined(__GNUC__) || defined(__DOXYGEN__)
#define PORT_COMPILER_NAME "GCC " __VERSION__
#elif defined(__CWCC__)
#elif defined(__MWERKS__)
#define PORT_COMPILER_NAME "CW " __VERSION__
#else
@ -425,12 +425,17 @@ static inline void port_init(void) {
port_write_spr(272, n);
#if PPC_SUPPORTS_IVORS
/* The CPU supports IVOR registers, the kernel requires IVOR4 and IVOR10
and the initialization is performed here.*/
asm volatile ("li %%r3, _IVOR4@l \t\n"
"mtIVOR4 %%r3 \t\n"
"li %%r3, _IVOR10@l \t\n"
"mtIVOR10 %%r3" : : : "r3", "memory");
{
/* The CPU supports IVOR registers, the kernel requires IVOR4 and IVOR10
and the initialization is performed here.*/
extern void _IVOR4(void);
port_write_spr(404, _IVOR4);
#if PPC_SUPPORTS_DECREMENTER
extern void _IVOR10(void);
port_write_spr(410, _IVOR10);
#endif
}
#endif
/* INTC initialization, software vector mode, 4 bytes vectors, starting

103
os/rt/ports/e200/compilers/CW/chcoreasm.s Normal file
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@ -0,0 +1,103 @@
/*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file e200/compilers/GCC/chcoreasm.s
* @brief Power Architecture port low level code.
*
* @addtogroup PPC_GCC_CORE
* @{
*/
/*===========================================================================*/
/* Module constants. */
/*===========================================================================*/
#if !defined(FALSE) || defined(__DOXYGEN__)
#define FALSE 0
#endif
#if !defined(TRUE) || defined(__DOXYGEN__)
#define TRUE 1
#endif
/*===========================================================================*/
/* Code section. */
/*===========================================================================*/
/*
* Imports the PPC configuration headers.
*/
#define _FROM_ASM_
#include "chconf.h"
#include "chcore.h"
#if !defined(__DOXYGEN__)
#if PPC_USE_VLE == TRUE
.section .text_vle, "ax"
.align 2
.globl _port_switch
.type _port_switch, @function
_port_switch:
e_subi r1, r1, 80
se_mflr r0
e_stw r0, 84(r1)
mfcr r0
se_stw r0, 0(r1)
e_stmw r14, 4(r1)
se_stw r1, 12(r4)
se_lwz r1, 12(r3)
e_lmw r14, 4(r1)
se_lwz r0, 0(r1)
mtcr r0
e_lwz r0, 84(r1)
se_mtlr r0
e_addi r1, r1, 80
se_blr
.align 2
.globl _port_thread_start
.type _port_thread_start, @function
_port_thread_start:
#if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_unlock
#endif
#if CH_DBG_STATISTICS
bl _stats_stop_measure_crit_thd
#endif
wrteei 1
mr r3, r31
mtctr r30
se_bctrl
se_li r0, 0
e_bl chThdExit
#else /* PPC_USE_VLE == FALSE */
#error "non-VLE mode not yet implemented"
#endif /* PPC_USE_VLE == FALSE */
#endif /* !defined(__DOXYGEN__) */
/** @} */

196
os/rt/ports/e200/compilers/CW/ivor.s Normal file
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@ -0,0 +1,196 @@
/*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file ivor.s
* @brief Kernel ISRs.
*
* @addtogroup PPC_CORE
* @{
*/
/*===========================================================================*/
/* Module constants. */
/*===========================================================================*/
#if !defined(FALSE) || defined(__DOXYGEN__)
#define FALSE 0
#endif
#if !defined(TRUE) || defined(__DOXYGEN__)
#define TRUE 1
#endif
/*===========================================================================*/
/* Code section. */
/*===========================================================================*/
/*
* Imports the PPC configuration headers.
*/
#define _FROM_ASM_
#include "chconf.h"
#include "chcore.h"
#if !defined(__DOXYGEN__)
.section .handlers, "ax"
#if PPC_USE_VLE == TRUE
#if PPC_SUPPORTS_DECREMENTER
/*
* _IVOR10 handler (Book-E decrementer).
*/
.align 4
.globl _IVOR10
.type _IVOR10, @function
_IVOR10:
/* Saving the external context (port_extctx structure).*/
se_stwu r1, -80(r1)
e_stmvsrrw 8(r1) /* Saves PC, MSR. */
e_stmvsprw 16(r1) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(r1) /* Saves GPR0, GPR3...GPR12. */
/* Increasing the SPGR0 register.*/
mfspr r0, 272
eaddi r0, r0, 1
mtspr 272, r0
/* Reset DIE bit in TSR register.*/
lis r3, 0x0800 /* DIS bit mask. */
mtspr 336, r3 /* TSR register. */
/* Restoring pre-IRQ MSR register value.*/
mfSRR1 r0
#if !PPC_USE_IRQ_PREEMPTION
/* No preemption, keeping EE disabled.*/
se_bclri r0, 16 /* EE = bit 16. */
#endif
mtMSR r0
#if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_enter_isr
bl _dbg_check_lock_from_isr
#endif
/* System tick handler invocation.*/
bl chSysTimerHandlerI
#if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_unlock_from_isr
bl _dbg_check_leave_isr
#endif
#if PPC_USE_IRQ_PREEMPTION
/* Prevents preemption again.*/
wrteei 0
#endif
/* Jumps to the common IVOR epilogue code.*/
b _ivor_exit
#endif /* PPC_SUPPORTS_DECREMENTER */
/*
* _IVOR4 handler (Book-E external interrupt).
*/
.align 4
.globl _IVOR4
.type _IVOR4, @function
_IVOR4:
/* Saving the external context (port_extctx structure).*/
e_stwu r1, -80(r1)
e_stmvsrrw 8(r1) /* Saves PC, MSR. */
e_stmvsprw 16(r1) /* Saves CR, LR, CTR, XER. */
e_stmvgprw 32(r1) /* Saves GPR0, GPR3...GPR12. */
/* Increasing the SPGR0 register.*/
mfspr r0, 272
se_addi r0, 1
mtspr 272, r0
/* Software vector address from the INTC register.*/
e_lis r3, INTC_IACKR_ADDR@h
e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */
se_lwz r3, 0(r3) /* IACKR register value. */
se_lwz r3, 0(r3)
mtCTR r3 /* Software handler address. */
/* Restoring pre-IRQ MSR register value.*/
mfSRR1 r0
#if !PPC_USE_IRQ_PREEMPTION
/* No preemption, keeping EE disabled.*/
se_bclri r0, 16 /* EE = bit 16. */
#endif
mtMSR r0
/* Exectes the software handler.*/
se_bctrl
#if PPC_USE_IRQ_PREEMPTION
/* Prevents preemption again.*/
wrteei 0
#endif
/* Informs the INTC that the interrupt has been served.*/
mbar 0
e_lis r3, INTC_EOIR_ADDR@h
e_or2i r3, INTC_EOIR_ADDR@l
se_stw r3, 0(r3) /* Writing any value should do. */
/* Common IVOR epilogue code, context restore.*/
.globl _ivor_exit
_ivor_exit:
/* Decreasing the SPGR0 register.*/
mfspr r0, 272
se_subi r0, 1
mtspr 272, r0
#if CH_DBG_STATISTICS
e_bl _stats_start_measure_crit_thd
#endif
#if CH_DBG_SYSTEM_STATE_CHECK
e_bl _dbg_check_lock
#endif
e_bl chSchIsPreemptionRequired
e_cmpli cr0, r3, 0
se_beq .noresch
e_bl chSchDoReschedule
.noresch:
#if CH_DBG_SYSTEM_STATE_CHECK
e_bl _dbg_check_unlock
#endif
#if CH_DBG_STATISTICS
e_bl _stats_stop_measure_crit_thd
#endif
/* Restoring the external context.*/
e_lmvgprw 32(r1) /* Restores GPR0, GPR3...GPR12. */
e_lmvsprw 16(r1) /* Restores CR, LR, CTR, XER. */
e_lmvsrrw 8(r1) /* Restores PC, MSR. */
e_addi r1, r1, 80 /* Back to the previous frame. */
se_rfi
#else /* PPC_USE_VLE == FALSE */
#error "non-VLE mode not yet implemented"
#endif /* PPC_USE_VLE == FALSE */
#endif /* !defined(__DOXYGEN__) */
/** @} */

8
os/rt/ports/e200/compilers/GCC/mk/port.mk Normal file
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@ -0,0 +1,8 @@
# List of the ChibiOS/RT e200 generic port files.
PORTSRC = $(CHIBIOS)/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/chcoreasm.s
PORTINC = $(CHIBIOS)/os/rt/ports/e200 \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC

14
os/rt/ports/e200/compilers/GCC/mk/port_spc560bcxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z0 SPC560BCxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC560BCxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC560BCxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc560bxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z0 SPC560Bxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC560Bxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC560Bxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc560dxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z0 SPC560Dxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC560Dxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC560Dxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc560pxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z0 SPC560Pxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC560Pxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC560Pxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc563mxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z3 SPC563Mxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC563Mxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC563Mxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc564axx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z4 SPC564Axx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC564Axx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC564Axx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc56ecxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z4 SPC56ECxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC56ECxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC56ECxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc56elxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z4 SPC56ELxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC56ELxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC56ELxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld

14
os/rt/ports/e200/compilers/GCC/mk/port_spc57emxx.mk
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@ -1,14 +0,0 @@
# List of the ChibiOS/RT e200z4 SPC57EMxx port files.
PORTSRC = ${CHIBIOS}/os/rt/ports/e200/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/e200/devices/SPC57EMxx/boot.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/vectors.s \
$(CHIBIOS)/os/common/ports/e200/compilers/GCC/crt0.s \
$(CHIBIOS)/os/rt/ports/e200/compilers/GCC/ivor.s
PORTINC = ${CHIBIOS}/os/common/ports/e200/compilers/GCC \
${CHIBIOS}/os/common/ports/e200/devices/SPC57EMxx \
${CHIBIOS}/os/rt/ports/e200 \
${CHIBIOS}/os/rt/ports/e200/compilers/GCC
PORTLD = ${CHIBIOS}/os/common/ports/e200/compilers/GCC/ld