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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1799 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-03-28 16:30:22 +00:00
parent c6bc9ad951
commit 89491f9ceb
2 changed files with 13 additions and 8 deletions
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8
os/hal/platforms/LPC11xx/hal_lld.c
View File

@ -83,20 +83,24 @@ void lpc111x_clock_init(void) {
FLASHCFG = (FLASHCFG & ~3) | LPC11xx_FLASHCFG_FLASHTIM;
/* System oscillator initialization if required.*/
#if LPC11xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT
#if LPC11xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC
LPC_SYSCON->SYSOSCCTRL = LPC11xx_SYSOSCCTRL;
LPC_SYSCON->PDRUNCFG &= ~(1 << 5); /* System oscillator ON. */
for (i = 0; i < 200; i++)
__NOP(); /* Stabilization delay. */
#endif /* LPC11xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC */
/* PLL initialization if required.*/
#if LPC11xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT
LPC_SYSCON->SYSPLLCLKSEL = LPC11xx_PLLCLK_SOURCE;
LPC_SYSCON->SYSPLLCLKUEN = 1; /* Really required? */
LPC_SYSCON->SYSPLLCLKUEN = 0;
LPC_SYSCON->SYSPLLCLKUEN = 1;
LPC_SYSCON->SYSPLLCTRL = LPC11xx_SYSPLLCTRL_MSEL | LPC11xx_SYSPLLCTRL_PSEL;
LPC_SYSCON->PDRUNCFG &= ~(1 << 7); /* System PLL ON. */
while ((LPC_SYSCON->SYSPLLSTAT & 1) == 0) /* Wait PLL lock. */
;
#endif /* LPC11xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT */
#endif /* LPC11xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC */
/* Main clock source selection.*/
LPC_SYSCON->MAINCLKSEL = LPC11xx_MAINCLK_SOURCE;

13
os/hal/platforms/LPC11xx/hal_lld.h
View File

@ -48,10 +48,10 @@
#define SYSPLLCLKSEL_SYSOSC 1 /**< System oscillator clock
source. */
#define SYSMAINCLKSEL_IRCOCS 0
#define SYSMAINCLKSEL_PLLIN 1
#define SYSMAINCLKSEL_WDGOSC 2
#define SYSMAINCLKSEL_PLLOUT 3
#define SYSMAINCLKSEL_IRCOCS 0 /**< Clock source is IRC. */
#define SYSMAINCLKSEL_PLLIN 1 /**< Clock source is PLLIN. */
#define SYSMAINCLKSEL_WDGOSC 2 /**< Clock source is WDGOSC. */
#define SYSMAINCLKSEL_PLLOUT 3 /**< Clock source is PLLOUT. */
/*===========================================================================*/
/* Driver pre-compile time settings. */
@ -70,7 +70,7 @@
* must not exceed the CCO ratings.
*/
#if !defined(LPC11xx_SYSPLL_MUL) || defined(__DOXYGEN__)
#define LPC11xx_SYSPLL_MUL 16
#define LPC11xx_SYSPLL_MUL 4
#endif
/**
@ -148,7 +148,8 @@
/**
* @brief CCP frequency.
*/
#define LPC11xx_SYSPLLCCO (LPC11xx_SYSPLLCLKIN * LPC11xx_SYSPLL_MUL)
#define LPC11xx_SYSPLLCCO (LPC11xx_SYSPLLCLKIN * LPC11xx_SYSPLL_MUL * \
LPC11xx_SYSPLL_DIV)
#if (LPC11xx_SYSPLLCCO < 156000000) || (LPC11xx_SYSPLLCCO > 320000000)
#error "CCO frequency out of the acceptable range (156...320)"