git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@775 35acf78f-673a-0410-8e92-d51de3d6d3f4

demos/ARM7-LPC214x-G++/board.c

@@ -79,17 +79,17 @@ void hwinit0(void) {
    * PLL setup for Fosc=12MHz and CCLK=48MHz.
    * P=2 M=3.
    */
-  PLL *pll = PLLBase;
-  pll->PLL0_CFG  = 0x23;        /* P and M values. */
-  pll->PLL0_CON  = 0x1;         /* Enalbles the PLL 0. */
-  pll->PLL0_FEED = 0xAA;
-  pll->PLL0_FEED = 0x55;
-  while (!(pll->PLL0_STAT & 0x400))
+  PLL *pll = PLL0Base;
+  pll->PLL_CFG  = 0x23;         /* P and M values. */
+  pll->PLL_CON  = 0x1;          /* Enables the PLL 0. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
+  while (!(pll->PLL_STAT & 0x400))
     ;                           /* Wait for PLL lock. */
 
-  pll->PLL0_CON  = 0x3;         /* Connects the PLL. */
-  pll->PLL0_FEED = 0xAA;
-  pll->PLL0_FEED = 0x55;
+  pll->PLL_CON  = 0x3;          /* Connects the PLL. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
 
   /*
    * VPB setup.

demos/ARM7-LPC214x-GCC-minimal/board.c

@@ -79,17 +79,17 @@ void hwinit0(void) {
    * PLL setup for Fosc=12MHz and CCLK=48MHz.
    * P=2 M=3.
    */
-  PLL *pll = PLLBase;
-  pll->PLL0_CFG  = 0x23;        /* P and M values. */
-  pll->PLL0_CON  = 0x1;         /* Enalbles the PLL 0. */
-  pll->PLL0_FEED = 0xAA;
-  pll->PLL0_FEED = 0x55;
-  while (!(pll->PLL0_STAT & 0x400))
+  PLL *pll = PLL0Base;
+  pll->PLL_CFG  = 0x23;         /* P and M values. */
+  pll->PLL_CON  = 0x1;          /* Enables the PLL 0. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
+  while (!(pll->PLL_STAT & 0x400))
     ;                           /* Wait for PLL lock. */
 
-  pll->PLL0_CON  = 0x3;         /* Connects the PLL. */
-  pll->PLL0_FEED = 0xAA;
-  pll->PLL0_FEED = 0x55;
+  pll->PLL_CON  = 0x3;          /* Connects the PLL. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
 
   /*
    * VPB setup.

demos/ARM7-LPC214x-GCC/board.c

@@ -79,17 +79,17 @@ void hwinit0(void) {
    * PLL setup for Fosc=12MHz and CCLK=48MHz.
    * P=2 M=3.
    */
-  PLL *pll = PLLBase;
-  pll->PLL0_CFG  = 0x23;        /* P and M values. */
-  pll->PLL0_CON  = 0x1;         /* Enalbles the PLL 0. */
-  pll->PLL0_FEED = 0xAA;
-  pll->PLL0_FEED = 0x55;
-  while (!(pll->PLL0_STAT & 0x400))
+  PLL *pll = PLL0Base;
+  pll->PLL_CFG  = 0x23;         /* P and M values. */
+  pll->PLL_CON  = 0x1;          /* Enables the PLL 0. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
+  while (!(pll->PLL_STAT & 0x400))
     ;                           /* Wait for PLL lock. */
 
-  pll->PLL0_CON  = 0x3;         /* Connects the PLL. */
-  pll->PLL0_FEED = 0xAA;
-  pll->PLL0_FEED = 0x55;
+  pll->PLL_CON  = 0x3;          /* Connects the PLL. */
+  pll->PLL_FEED = 0xAA;
+  pll->PLL_FEED = 0x55;
 
   /*
    * VPB setup.

ports/ARM7-LPC214x/lpc214x.h

@@ -84,25 +84,22 @@ typedef volatile unsigned int IOREG32;
 #define EXTPOLAR3               8
 
 typedef struct {
-  IOREG32       PLL0_CON;
-  IOREG32       PLL0_CFG;
-  IOREG32       PLL0_STAT;
-  IOREG32       PLL0_FEED;
-  IOREG32       PLL1_CON;
-  IOREG32       PLL1_CFG;
-  IOREG32       PLL1_STAT;
-  IOREG32       PLL1_FEED;
+  IOREG32       PLL_CON;
+  IOREG32       PLL_CFG;
+  IOREG32       PLL_STAT;
+  IOREG32       PLL_FEED;
 } PLL;
 
-#define PLLBase                 ((PLL *)0xE01FC080)
-#define PLL0CON                 (PLLBase->PLL0_CON)
-#define PLL0CFG                 (PLLBase->PLL0_CFG)
-#define PLL0STAT                (PLLBase->PLL0_STAT)
-#define PLL0FEED                (PLLBase->PLL0_FEED)
-#define PLL1CON                 (PLLBase->PLL1_CON)
-#define PLL1CFG                 (PLLBase->PLL1_CFG)
-#define PLL1STAT                (PLLBase->PLL1_STAT)
-#define PLL1FEED                (PLLBase->PLL1_FEED)
+#define PLL0Base                ((PLL *)0xE01FC080)
+#define PLL1Base                ((PLL *)0xE01FC0A0)
+#define PLL0CON                 (PLL0Base->PLL_CON)
+#define PLL0CFG                 (PLL0Base->PLL_CFG)
+#define PLL0STAT                (PLL0Base->PLL_STAT)
+#define PLL0FEED                (PLL0Base->PLL_FEED)
+#define PLL1CON                 (PLL1Base->PLL_CON)
+#define PLL1CFG                 (PLL1Base->PLL_CFG)
+#define PLL1STAT                (PLL1Base->PLL_STAT)
+#define PLL1FEED                (PLL1Base->PLL_FEED)
 
 /*
  * Pins.

readme.txt

@@ -73,13 +73,24 @@ Win32-MinGW            - ChibiOS/RT simulator and demo into a WIN32 process,
 *****************************************************************************
 
 *** 1.1.1unstable ***
+- FIX: Fixed a problem with a wrong declaration of the PLL structure in the
+  file lpc214x.h (backported in stable branch).
 - FIX: Fixed a problem with some event APIs not showing in the documentation
   (backported in stable branch).
 - FIX: Fixed wrong assertions in chThdWait() and chHeapFree() (backported in
   stable branch).
 - FIX: Fixed a small problem in the chcore.c template file.
 - NEW: Mode flexible debug configuration options, removed the old CH_USE_DEBUG
-  and CH_USE_TRACE.
+  and CH_USE_TRACE. Replaced with CH_DBG_ENABLE_ASSERTS, CH_DBG_ENABLE_TRACE
+  and CH_DBG_FILL_THREADS.
+- NEW: Added a debug option CH_DBG_THREADS_PROFILING for threads profiling.
+  A field into the Thread structure counts the consumed time. The information
+  is not used into the kernel, it is meant for debugging.
+- NEW: Added a debug option CH_DBG_ENABLE_STACK_CHECK for stack overflow
+  checking. The check is not performed in the kernel but in the port code.
+  Currently no ports implement it.
+- CHANGE: Changed the chSemFastWaitS() macro in chSemFastWaitI() and
+  chSemGetCounter() in chSemGetCounterI().
 - Improvements to the test suite, added a new level of indirection that allows
   to make tests depend on the configuration options without have to put #ifs
   into the test main module.

todo.txt

@@ -1,24 +1,25 @@
 After 1.0.0:
-- Improve makefiles by adding an options head section and making it shared.
+X Improve makefiles by adding an options head section and making it shared.
 - Update C++ wrapper (Heap, Pools).
 * Priority ordering option for semaphores.
 * chSysLock() and chSysUnlock() with counter (option).
 * OSEK-style chSysSuspendAll()/chSysResumeAll()/chSysEnable()/chSysDisable(),
   implemented this as the new Suspended and Disabled states in 1.1.
 X lwIP TCP/IP stack integration and demo.
-  - "Wide Queues" or Mailboxes, lwIP requires them.
+  X "Wide Queues" or Mailboxes, lwIP requires them.
 X FatFS library integration and demo.
 * Multiple debug switches.
-  - Stack guard pages.
-  - Threads profiling option.
+  X Stack checks option.
+  * Threads profiling option.
   - Objects registry.
-    Problem: fixed size? it goes against project policy.
 * Idle loop hook macro.
 * Switch the configuration options to TRUE/FALSE rather than def/undef.
 - Threads Pools manager in the library.
   - New chThdCreate() that takes just two parameters, a pointer to a thread
     descriptor and the tread parameter. It could wrap the current variants
     or just be an alternative.
+- Fix the names of the Queues macros, also do not refer to the semaphore
+  counters directly.
 
 After 1.2.0:
 - Minimal optional C-runtime library (complete enough for lwIP).