git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@149 35acf78f-673a-0410-8e92-d51de3d6d3f4
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51d9a97993
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@ -127,16 +127,16 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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ifneq ($(ASRC),)
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# Both ARM and THUMB case
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork -D THUMB
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CPFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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ASFLAGS += -mthumb-interwork -D THUMB
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else
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else
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly.
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CPFLAGS += -D THUMB
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CPFLAGS += -D THUMB_NO_INTERWORKING
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LDFLAGS += -mthumb
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LDFLAGS += -mthumb
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ASFLAGS += -mthumb-interwork -D THUMB -D THUMB_NO_INTERWORKING
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ASFLAGS += -D THUMB_NO_INTERWORKING
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endif
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endif
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endif
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endif
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@ -91,7 +91,7 @@ ULIBS =
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AOPT =
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AOPT =
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# THUMB-specific options here
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# THUMB-specific options here
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TOPT = -mthumb
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TOPT = -mthumb -D THUMB
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# Common options here
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# Common options here
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# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
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# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
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@ -127,16 +127,16 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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ifneq ($(ASRC),)
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# Both ARM and THUMB case
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork -D THUMB
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CPFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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ASFLAGS += -mthumb-interwork -D THUMB
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else
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else
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly.
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CPFLAGS += -D THUMB -D THUMB_NO_INTERWORKING
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CPFLAGS += -D THUMB_NO_INTERWORKING
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LDFLAGS += -mthumb
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LDFLAGS += -mthumb
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ASFLAGS += -mthumb-interwork -D THUMB -D THUMB_NO_INTERWORKING
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ASFLAGS += -D THUMB_NO_INTERWORKING
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endif
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endif
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endif
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endif
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@ -130,16 +130,16 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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ifneq ($(ASRC),)
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# Both ARM and THUMB case
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork -D THUMB
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CPFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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ASFLAGS += -mthumb-interwork -D THUMB
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else
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else
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly.
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CPFLAGS += -D THUMB
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CPFLAGS += -D THUMB_NO_INTERWORKING
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LDFLAGS += -mthumb
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LDFLAGS += -mthumb
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ASFLAGS += -mthumb-interwork -D THUMB -D THUMB_NO_INTERWORKING
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ASFLAGS += -D THUMB_NO_INTERWORKING
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endif
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endif
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endif
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endif
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@ -158,7 +158,7 @@ $(AOBJS) : %.o : %.c
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$(TOBJS) : %.o : %.c
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$(TOBJS) : %.o : %.c
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@echo
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@echo
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$(CC) -c $(CPFLAGS) $(TOPT) -mthumb -I . $(INCDIR) $< -o $@
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$(CC) -c $(CPFLAGS) $(TOPT) -I . $(INCDIR) $< -o $@
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$(ASMOBJS) : %.o : %.s
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$(ASMOBJS) : %.o : %.s
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@echo
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@echo
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@ -94,7 +94,7 @@ ULIBS =
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AOPT =
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AOPT =
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# THUMB-specific options here
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# THUMB-specific options here
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TOPT = -mthumb
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TOPT = -mthumb -D THUMB
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# Common options here
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# Common options here
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# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
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# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
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@ -130,16 +130,16 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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ifneq ($(ASRC),)
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# Both ARM and THUMB case
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork -D THUMB
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CPFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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LDFLAGS += -mthumb-interwork
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ASFLAGS += -mthumb-interwork -D THUMB
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else
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else
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
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# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly.
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CPFLAGS += -D THUMB -D THUMB_NO_INTERWORKING
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CPFLAGS += -D THUMB_NO_INTERWORKING
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LDFLAGS += -mthumb
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LDFLAGS += -mthumb
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ASFLAGS += -mthumb-interwork -D THUMB -D THUMB_NO_INTERWORKING
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ASFLAGS += -D THUMB_NO_INTERWORKING
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endif
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endif
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endif
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endif
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@ -33,64 +33,71 @@ void _IdleThread(void *p) {
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}
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}
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}
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}
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#ifdef THUMB
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/*
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* The following functions are present only if there is in the system any
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* code compiled as THUMB that may invoke them.
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* NOTE: The undefs are there in case this module is compiled in ARM mode but
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* there are THUMB modules in the system.
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*/
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#ifdef THUMB_PRESENT
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#undef chSysLock
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void chSysLock(void) {
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void chSysLock(void) {
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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asm(".p2align 2,, \n\t" \
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"mov r0, pc \n\t" \
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"mov r0, pc \n\t" \
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"bx r0 \n\t" \
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"bx r0 \n\t" \
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".code 32 \n\t" \
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".code 32 \n\t");
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"msr CPSR_c, #0x9F \n\t" \
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#endif
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asm("msr CPSR_c, #0x9F \n\t" \
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"bx lr \n\t");
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"bx lr \n\t");
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}
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}
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#undef chSysUnlock
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void chSysUnlock(void) {
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void chSysUnlock(void) {
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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asm(".p2align 2,, \n\t" \
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"mov r0, pc \n\t" \
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"mov r0, pc \n\t" \
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"bx r0 \n\t" \
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"bx r0 \n\t" \
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".code 32 \n\t" \
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".code 32 \n\t");
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"msr CPSR_c, #0x1F \n\t" \
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#endif
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asm("msr CPSR_c, #0x1F \n\t" \
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"bx lr \n\t");
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"bx lr \n\t");
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}
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}
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#endif
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#endif
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void chSysSwitchI(Context *oldp, Context *newp) {
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void chSysSwitchI(Context *oldp, Context *newp) {
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#ifdef CH_CURRP_REGISTER_CACHE
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#ifdef THUMB
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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asm(".p2align 2,, \n\t" \
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"mov r2, pc \n\t" \
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"mov r2, pc \n\t" \
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"bx r2 \n\t" \
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"bx r2 \n\t" \
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".code 32 \n\t" \
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".code 32 \n\t");
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"stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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#endif
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"str sp, [r0, #0] \n\t" \
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"ldr sp, [r1, #0] \n\t" \
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#ifdef CH_CURRP_REGISTER_CACHE
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"ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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"bx lr \n\t");
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#else /* !THUMB */
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asm("stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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asm("stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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"str sp, [r0, #0] \n\t" \
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"str sp, [r0, #0] \n\t" \
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"ldr sp, [r1, #0] \n\t" \
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"ldr sp, [r1, #0] \n\t");
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"ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc} \n\t");
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#ifdef THUMB_PRESENT
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#endif /* !THUMB */
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asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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#else /* !CH_CURRP_REGISTER_CACHE */
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov r2, pc \n\t" \
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"bx r2 \n\t" \
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".code 32 \n\t" \
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"stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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"str sp, [r0, #0] \n\t" \
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"ldr sp, [r1, #0] \n\t" \
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"ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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"bx lr \n\t");
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"bx lr \n\t");
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#else /* !THUMB */
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#else /* !THUMB_PRESENT */
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asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc} \n\t");
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#endif /* !THUMB_PRESENT */
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#else /* !CH_CURRP_REGISTER_CACHE */
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asm("stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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asm("stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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"str sp, [r0, #0] \n\t" \
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"str sp, [r0, #0] \n\t" \
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"ldr sp, [r1, #0] \n\t" \
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"ldr sp, [r1, #0] \n\t");
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"ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t");
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#ifdef THUMB_PRESENT
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#endif /* !THUMB */
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asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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"bx lr \n\t");
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#else /* !THUMB_PRESENT */
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asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t");
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#endif /* !THUMB_PRESENT */
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#endif /* !CH_CURRP_REGISTER_CACHE */
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#endif /* !CH_CURRP_REGISTER_CACHE */
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}
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}
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@ -50,16 +50,22 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
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various mechanisms and the correct use cases.
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various mechanisms and the correct use cases.
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- RT Semaphores subsystem removed, the Mutexes implements a better solution
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- RT Semaphores subsystem removed, the Mutexes implements a better solution
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for the same problem.
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for the same problem.
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- Added mutexes test cases to the test suite.
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- Modified the test suite in order to have each test case to have the same
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- Modified the test suite in order to have each test case to have the same
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alignment enforced on functions. This is done to reduce MAM/Cache alignment
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alignment enforced on functions. This is done to reduce MAM/Cache alignment
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effects on the measurement.
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effects on the measurement.
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- IRQ entry/exit code is now encapsulated into two new macros, see chcore.h
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- IRQ entry/exit code is now encapsulated into two new macros, see chcore.h
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for details.
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for details.
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- All the asm code previously in chcore2.s is now inline asm code in chcore.c
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- All the asm code previously in chcore2.s is now inline asm code in chcore.c
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(ARM port).
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(ARM port), chcore2.s removed.
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- Moved all the board specific definitions/code into two new files: board.c
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- Moved all the board specific definitions/code into two new files: board.c
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and board.h. Moved all the files no more board-dependent under ports/
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and board.h. Moved all the files no more board-dependent under ports/
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(ARM port).
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(ARM port).
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- Improved the kernel performance in THUMB mode by better exploiting MAM
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locality in some critical functions. The context switch benchmark shows 5%
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improved speed.
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NOTE: The interworking code generated by GCC (or any other compiler as far
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I know) is not MAM-aware.
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*** 0.4.5 ***
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*** 0.4.5 ***
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- Moved the serial IRQ handlers and VIC vectors initialization inside the
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- Moved the serial IRQ handlers and VIC vectors initialization inside the
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