[AVR] Fix timer 0 support for AT90CANxx

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5946 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
utzig 2013-07-09 21:42:49 +00:00
parent 07cb74bbff
commit 8b1fe26bfd
1 changed files with 9 additions and 1 deletions

View File

@ -70,7 +70,7 @@ void hal_lld_init(void) {
/* /*
* Timer 0 setup. * Timer 0 setup.
*/ */
#if defined(TCCR0A) /* Timer has multiple output comparators */ #if defined(TCCR0B) /* Timer has multiple output comparators */
TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */ TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
(0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */ (0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
(0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */ (0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */
@ -80,6 +80,14 @@ void hal_lld_init(void) {
TIFR0 = (1 << OCF0A); /* Reset pending. */ TIFR0 = (1 << OCF0A); /* Reset pending. */
TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */ TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
#elif defined(TCCR0A) /* AT90CAN doesn't have TCCR0B and slightly different TCCR0A */
TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
(0 << COM0A1) | (0 << COM0A0); /* OC0A disabled. */
OCR0A = AVR_TIMER_COUNTER - 1;
TCNT0 = 0; /* Reset counter. */
TIFR0 = (1 << OCF0A); /* Reset pending. */
TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
#elif defined(TCCR0) /* Timer has single output comparator */ #elif defined(TCCR0) /* Timer has single output comparator */
TCCR0 = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */ TCCR0 = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
(0 << COM01) | (0 << COM00) | /* OC0A disabled. */ (0 << COM01) | (0 << COM00) | /* OC0A disabled. */