[KINETIS] Simplified USB type's field names + description of USB register bitmaps
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7642 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Fabio Utzig
parent
f154d37853
commit
8c96fc56bb
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@ -461,63 +461,63 @@ typedef struct
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} WDOG_TypeDef;
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typedef struct {
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__I uint8_t USB0_PERID; // 0x00
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__I uint8_t PERID; // 0x00
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uint8_t RESERVED0[3];
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__I uint8_t USB0_IDCOMP; // 0x04
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__I uint8_t IDCOMP; // 0x04
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uint8_t RESERVED1[3];
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__I uint8_t USB0_REV; // 0x08
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__I uint8_t REV; // 0x08
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uint8_t RESERVED2[3];
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__I uint8_t USB0_ADDINFO; // 0x0C
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__I uint8_t ADDINFO; // 0x0C
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uint8_t RESERVED3[3];
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__IO uint8_t USB0_OTGISTAT; // 0x10
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__IO uint8_t OTGISTAT; // 0x10
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uint8_t RESERVED4[3];
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__IO uint8_t USB0_OTGICR; // 0x14
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__IO uint8_t OTGICR; // 0x14
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uint8_t RESERVED5[3];
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__IO uint8_t USB0_OTGSTAT; // 0x18
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__IO uint8_t OTGSTAT; // 0x18
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uint8_t RESERVED6[3];
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__IO uint8_t USB0_OTGCTL; // 0x1C
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__IO uint8_t OTGCTL; // 0x1C
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uint8_t RESERVED7[99];
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__IO uint8_t USB0_ISTAT; // 0x80
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__IO uint8_t ISTAT; // 0x80
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uint8_t RESERVED8[3];
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__IO uint8_t USB0_INTEN; // 0x84
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__IO uint8_t INTEN; // 0x84
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uint8_t RESERVED9[3];
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__IO uint8_t USB0_ERRSTAT; // 0x88
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__IO uint8_t ERRSTAT; // 0x88
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uint8_t RESERVED10[3];
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__IO uint8_t USB0_ERREN; // 0x8C
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__IO uint8_t ERREN; // 0x8C
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uint8_t RESERVED11[3];
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__I uint8_t USB0_STAT; // 0x90
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__I uint8_t STAT; // 0x90
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uint8_t RESERVED12[3];
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__IO uint8_t USB0_CTL; // 0x94
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__IO uint8_t CTL; // 0x94
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uint8_t RESERVED13[3];
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__IO uint8_t USB0_ADDR; // 0x98
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__IO uint8_t ADDR; // 0x98
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uint8_t RESERVED14[3];
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__IO uint8_t USB0_BDTPAGE1; // 0x9C
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__IO uint8_t BDTPAGE1; // 0x9C
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uint8_t RESERVED15[3];
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__IO uint8_t USB0_FRMNUML; // 0xA0
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__IO uint8_t FRMNUML; // 0xA0
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uint8_t RESERVED16[3];
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__IO uint8_t USB0_FRMNUMH; // 0xA4
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__IO uint8_t FRMNUMH; // 0xA4
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uint8_t RESERVED17[3];
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__IO uint8_t USB0_TOKEN; // 0xA8
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__IO uint8_t TOKEN; // 0xA8
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uint8_t RESERVED18[3];
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__IO uint8_t USB0_SOFTHLD; // 0xAC
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__IO uint8_t SOFTHLD; // 0xAC
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uint8_t RESERVED19[3];
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__IO uint8_t USB0_BDTPAGE2; // 0xB0
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__IO uint8_t BDTPAGE2; // 0xB0
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uint8_t RESERVED20[3];
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__IO uint8_t USB0_BDTPAGE3; // 0xB4
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__IO uint8_t BDTPAGE3; // 0xB4
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uint8_t RESERVED21[11];
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struct {
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__IO uint8_t V; // 0xC0
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uint8_t RESERVED[3];
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} USB0_ENDPT[16];
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__IO uint8_t USB0_USBCTRL; // 0x100
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} ENDPT[16];
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__IO uint8_t USBCTRL; // 0x100
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uint8_t RESERVED22[3];
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__I uint8_t USB0_OBSERVE; // 0x104
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__I uint8_t OBSERVE; // 0x104
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uint8_t RESERVED23[3];
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__IO uint8_t USB0_CONTROL; // 0x108
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__IO uint8_t CONTROL; // 0x108
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uint8_t RESERVED24[3];
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__IO uint8_t USB0_USBTRC0; // 0x10C
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__IO uint8_t USBTRC0; // 0x10C
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uint8_t RESERVED25[7];
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__IO uint8_t USB0_USBFRMADJUST; // 0x114
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__IO uint8_t USBFRMADJUST; // 0x114
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} USBOTG_TypeDef;
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/****************************************************************/
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@ -2324,4 +2324,70 @@ typedef struct {
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/********* Bits definition for WDOG_PRESC register ************/
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#define WDOG_PRESC_PRESCVAL ((uint16_t)0x0700)
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/****************************************************************/
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/* */
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/* USB OTG */
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/* */
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/****************************************************************/
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/******** Bits definition for USBx_ISTAT register *************/
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#define USBx_ISTAT_STALL ((uint8_t)0x80) /*!< Stall interrupt */
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#define USBx_ISTAT_ATTACH ((uint8_t)0x40) /*!< Attach interrupt */
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#define USBx_ISTAT_RESUME ((uint8_t)0x20) /*!< Signal remote wakeup on the bus */
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#define USBx_ISTAT_SLEEP ((uint8_t)0x10) /*!< Detected bus idle for 3ms */
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#define USBx_ISTAT_TOKDNE ((uint8_t)0x08) /*!< Completed processing of current token */
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#define USBx_ISTAT_SOFTOK ((uint8_t)0x04) /*!< Received start of frame */
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#define USBx_ISTAT_ERROR ((uint8_t)0x02) /*!< Error (must check ERRSTAT!) */
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#define USBx_ISTAT_USBRST ((uint8_t)0x01) /*!< USB reset detected */
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/******** Bits definition for USBx_ERRSTAT register ***********/
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#define USBx_ERRSTAT_BTSERR ((uint8_t)0x80) /*!< Bit stuff error detected */
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#define USBx_ERRSTAT_DMAERR ((uint8_t)0x20) /*!< DMA request was not given */
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#define USBx_ERRSTAT_BTOERR ((uint8_t)0x10) /*!< BUS turnaround timeout error */
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#define USBx_ERRSTAT_DFN8 ((uint8_t)0x08) /*!< Received data not 8-bit sized */
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#define USBx_ERRSTAT_CRC16 ((uint8_t)0x04) /*!< Packet with CRC16 error */
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#define USBx_ERRSTAT_CRC5EOF ((uint8_t)0x02) /*!< CRC5 (device) or EOF (host) error */
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#define USBx_ERRSTAT_PIDERR ((uint8_t)0x01) /*!< PID check field fail */
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/******** Bits definition for USBx_CTL register *****************/
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#define USBx_CTL_JSTATE ((uint8_t)0x80) /*!< Live USB differential receiver JSTATE signal */
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#define USBx_CTL_SE0 ((uint8_t)0x40) /*!< Live USB single ended zero signal */
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#define USBx_CTL_TXSUSPENDTOKENBUS ((uint8_t)0x20) /*!< */
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#define USBx_CTL_RESET ((uint8_t)0x10) /*!< Generates an USB reset signal (host mode) */
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#define USBx_CTL_HOSTMODEEN ((uint8_t)0x08) /*!< Operate in Host mode */
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#define USBx_CTL_RESUME ((uint8_t)0x04) /*!< Executes resume signaling */
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#define USBx_CTL_ODDRST ((uint8_t)0x02) /*!< Reset all BDT ODD ping/pong bits */
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#define USBx_CTL_USBENSOFEN ((uint8_t)0x01) /*!< USB Enable! */
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/******** Bits definition for USBx_INTEN register ***************/
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#define USBx_INTEN_STALLEN ((uint8_t)0x80) /*!< STALL interrupt enable */
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#define USBx_INTEN_ATTACHEN ((uint8_t)0x40) /*!< ATTACH interrupt enable */
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#define USBx_INTEN_RESUMEEN ((uint8_t)0x20) /*!< RESUME interrupt enable */
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#define USBx_INTEN_SLEEPEN ((uint8_t)0x10) /*!< SLEEP interrupt enable */
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#define USBx_INTEN_TOKDNEEN ((uint8_t)0x08) /*!< TOKDNE interrupt enable */
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#define USBx_INTEN_SOFTOKEN ((uint8_t)0x04) /*!< SOFTOK interrupt enable */
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#define USBx_INTEN_ERROREN ((uint8_t)0x02) /*!< ERROR interrupt enable */
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#define USBx_INTEN_USBRSTEN ((uint8_t)0x01) /*!< USBRST interrupt enable */
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/******** Bits definition for USBx_ENDPTn register **************/
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#define USBx_ENDPTn_HOSTWOHUB ((uint8_t)0x80)
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#define USBx_ENDPTn_RETRYDIS ((uint8_t)0x40)
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#define USBx_ENDPTn_EPCTLDIS ((uint8_t)0x10) /*!< Disables control transfers */
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#define USBx_ENDPTn_EPRXEN ((uint8_t)0x08) /*!< Enable RX transfers */
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#define USBx_ENDPTn_EPTXEN ((uint8_t)0x04) /*!< Enable TX transfers */
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#define USBx_ENDPTn_EPSTALL ((uint8_t)0x02) /*!< Endpoint is called and in STALL */
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#define USBx_ENDPTn_EPHSHK ((uint8_t)0x01) /*!< Enable handshaking during transaction */
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/******** Bits definition for USBx_CTRL register ****************/
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#define USBx_CTRL_SUSP ((uint8_t)0x80) /*!< USB transceiver in suspend state */
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#define USBx_CTRL_PDE ((uint8_t)0x40) /*!< Enable weak pull-downs */
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/******** Bits definition for USBx_USBTRC0 register *************/
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#define USBx_USBTRC0_USBRESET ((uint8_t)0x80) /*!< USB reset */
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#define USBx_USBTRC0_USBRESMEN ((uint8_t)0x20) /*!< Asynchronous resume interrupt enable */
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#define USBx_USBTRC0_SYNC_DET ((uint8_t)0x02) /*!< Synchronous USB interrupt detect */
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#define USBx_USBTRC0_USB_RESUME_INT ((uint8_t)0x01) /*!< USB asynchronous interrupt */
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/******** Bits definition for USBx_CONTROL register *************/
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#define USBx_CONTROL_DPPULLUPNONOTG ((uint8_t)0x10) /*!< Control pull-ups in device mode */
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#endif
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