diff --git a/demos/STM32/RT-STM32G031K8-NUCLEO32/cfg/mcuconf.h b/demos/STM32/RT-STM32G031K8-NUCLEO32/cfg/mcuconf.h index 05c14bb49..188c37300 100644 --- a/demos/STM32/RT-STM32G031K8-NUCLEO32/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32G031K8-NUCLEO32/cfg/mcuconf.h @@ -75,9 +75,9 @@ /* * Peripherals clocks and sources. */ -#define STM32_USART1SEL STM32_USART1SEL_SYSCLK -#define STM32_USART2SEL STM32_USART2SEL_SYSCLK -#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK +#define STM32_USART1SEL STM32_USART1SEL_PCLK +#define STM32_USART2SEL STM32_USART2SEL_PCLK +#define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK #define STM32_I2C1SEL STM32_I2C1SEL_PCLK #define STM32_I2S1SEL STM32_I2S1SEL_SYSCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_isr.c b/os/hal/ports/STM32/STM32G0xx/stm32_isr.c index 7c98d2234..f4eca8984 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32G0xx/stm32_isr.c @@ -83,10 +83,12 @@ #include "stm32_tim1.inc" #include "stm32_tim2.inc" -#if STM32_HAS_TIM4 +#if STM32_HAS_TIM3 && STM32_HAS_TIM4 #include "stm32_tim3_4.inc" -#else +#elif STM32_HAS_TIM3 #include "stm32_tim3.inc" +#else +#error "unknown TIMs combination" #endif #include "stm32_tim6.inc" #include "stm32_tim7.inc" @@ -113,9 +115,9 @@ void irqInit(void) { tim1_irq_init(); tim2_irq_init(); -#if STM32_HAS_TIM4 +#if STM32_HAS_TIM3 && STM32_HAS_TIM4 tim3_tim4_irq_init(); -#else +#elif STM32_HAS_TIM3 tim3_irq_init(); #endif tim6_irq_init(); @@ -154,9 +156,9 @@ void irqDeinit(void) { tim1_irq_deinit(); tim2_irq_deinit(); -#if STM32_HAS_TIM4 +#if STM32_HAS_TIM3 && STM32_HAS_TIM4 tim3_tim4_irq_deinit(); -#else +#elif STM32_HAS_TIM3 tim3_irq_deinit(); #endif tim6_irq_deinit(); diff --git a/tools/ftl/processors/conf/mcuconf_stm32g031xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32g031xx/mcuconf.h.ftl index 400746fb6..e0652b059 100644 --- a/tools/ftl/processors/conf/mcuconf_stm32g031xx/mcuconf.h.ftl +++ b/tools/ftl/processors/conf/mcuconf_stm32g031xx/mcuconf.h.ftl @@ -86,9 +86,9 @@ /* * Peripherals clocks and sources. */ -#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_SYSCLK"} -#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_SYSCLK"} -#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_SYSCLK"} +#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_PCLK"} +#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_PCLK"} +#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_PCLK"} #define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_PCLK"} #define STM32_I2S1SEL ${doc.STM32_I2S1SEL!"STM32_I2S1SEL_SYSCLK"} #define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK"}