STM32. RTCv1. Fexed potential problem with RTC_CRL_RSF bit (bug 3593972).

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4888 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/platforms/STM32/RTCv1/rtc_lld.c

@@ -133,7 +133,11 @@ CH_IRQ_HANDLER(RTC_IRQHandler) {
  *
  * @notapi
  */
-void rtc_lld_init(void){
+void rtc_lld_init(void){
+
+  /* RSF bit must be cleared by software after an APB1 reset or an APB1 clock
+     stop. Otherwise its value will not be actual. */
+  RTC->CRL &= ~RTC_CRL_RSF;
 
   /* Required because access to PRL.*/
   rtc_lld_apb1_sync();

readme.txt

@@ -82,6 +82,8 @@
 *****************************************************************************
 
 *** 2.5.1 ***
+- FIX: Potential problem with RTC_CRL_RSF bit (bug 3593972) (backported
+  to 2.4.3).
 - FIX: Fixed DMA reconfiguration problem in STM32 SPI driver (bug 3592809)
   (backported to 2.4.3).
 - FIX: Fixed wrong stack initializations in GCC STM32L1xx port files (bug