From 8dfc88a0f0fea0ee1aaae46fa90a858caa487f5a Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 8 Feb 2020 08:54:14 +0000 Subject: [PATCH] Maxed out frequency for H755 demo (480). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13325 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h index 89654754c..da0576591 100644 --- a/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h @@ -88,10 +88,10 @@ #define STM32_PLL1_Q_ENABLED TRUE #define STM32_PLL1_R_ENABLED TRUE #define STM32_PLL1_DIVM_VALUE 4 -#define STM32_PLL1_DIVN_VALUE 400 +#define STM32_PLL1_DIVN_VALUE 480 #define STM32_PLL1_FRACN_VALUE 0 #define STM32_PLL1_DIVP_VALUE 2 -#define STM32_PLL1_DIVQ_VALUE 16 +#define STM32_PLL1_DIVQ_VALUE 20 #define STM32_PLL1_DIVR_VALUE 8 #define STM32_PLL2_ENABLED TRUE #define STM32_PLL2_P_ENABLED TRUE