From 8e3f28ef11ba135a10f7035125d2a0fd3cd37fdd Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 4 Mar 2023 08:54:54 +0000 Subject: [PATCH] Fixed bug #1253. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16126 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../RT-STM32H7A3ZI_Q-NUCLEO144/cfg/mcuconf.h | 8 ++++---- os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h | 12 ++++++------ os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h | 16 +++++++--------- os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h | 12 +++++------- readme.txt | 2 ++ 5 files changed, 24 insertions(+), 26 deletions(-) diff --git a/demos/STM32/RT-STM32H7A3ZI_Q-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32H7A3ZI_Q-NUCLEO144/cfg/mcuconf.h index 023f7e1df..f30b9a5e4 100644 --- a/demos/STM32/RT-STM32H7A3ZI_Q-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32H7A3ZI_Q-NUCLEO144/cfg/mcuconf.h @@ -84,12 +84,12 @@ #define STM32_PLL1_P_ENABLED TRUE #define STM32_PLL1_Q_ENABLED TRUE #define STM32_PLL1_R_ENABLED TRUE -#define STM32_PLL1_DIVM_VALUE 8 +#define STM32_PLL1_DIVM_VALUE 4 #define STM32_PLL1_DIVN_VALUE 260 #define STM32_PLL1_FRACN_VALUE 0 -#define STM32_PLL1_DIVP_VALUE 1 -#define STM32_PLL1_DIVQ_VALUE 5 -#define STM32_PLL1_DIVR_VALUE 5 +#define STM32_PLL1_DIVP_VALUE 2 +#define STM32_PLL1_DIVQ_VALUE 10 +#define STM32_PLL1_DIVR_VALUE 10 #define STM32_PLL2_ENABLED TRUE #define STM32_PLL2_P_ENABLED TRUE #define STM32_PLL2_Q_ENABLED TRUE diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h index 6c9e69690..c9c471554 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h @@ -1705,8 +1705,8 @@ /** * @brief PLL1 DIVP field. */ -#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128) && \ - (STM32_PLL1_DIVP_VALUE != 3U)) || defined(__DOXYGEN__) +#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128)) && \ + ((STM32_PLL1_DIVP_VALUE == 1) || ((STM32_PLL1_DIVP_VALUE & 1) == 0)) #define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL1_DIVP_VALUE value specified" @@ -1715,8 +1715,8 @@ /** * @brief PLL2 DIVP field. */ -#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128) && \ - (STM32_PLL2_DIVP_VALUE != 3U)) || defined(__DOXYGEN__) +#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128)) || \ + defined(__DOXYGEN__) #define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL2_DIVP_VALUE value specified" @@ -1725,8 +1725,8 @@ /** * @brief PLL3 DIVP field. */ -#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128) && \ - (STM32_PLL3_DIVP_VALUE != 3U)) || defined(__DOXYGEN__) +#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128)) || \ + defined(__DOXYGEN__) #define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL3_DIVP_VALUE value specified" diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h index fe58e74c8..afe4e9ca6 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h @@ -1660,11 +1660,9 @@ /** * @brief PLL1 DIVP field. */ -#if (STM32_PLL1_DIVP_VALUE == 1) || \ - ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ - ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || \ - defined(__DOXYGEN__) -#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos) +#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128)) && \ + ((STM32_PLL1_DIVP_VALUE == 1) || ((STM32_PLL1_DIVP_VALUE & 1) == 0)) +#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL1_DIVP_VALUE value specified" #endif @@ -1672,8 +1670,8 @@ /** * @brief PLL2 DIVP field. */ -#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128) && \ - (STM32_PLL2_DIVP_VALUE != 3U)) || defined(__DOXYGEN__) +#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128)) || \ + defined(__DOXYGEN__) #define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL2_DIVP_VALUE value specified" @@ -1682,8 +1680,8 @@ /** * @brief PLL3 DIVP field. */ -#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128) && \ - (STM32_PLL3_DIVP_VALUE != 3U)) || defined(__DOXYGEN__) +#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128)) || \ + defined(__DOXYGEN__) #define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL3_DIVP_VALUE value specified" diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h index efdfecce8..b2e6e342b 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h @@ -1725,11 +1725,9 @@ /** * @brief PLL1 DIVP field. */ -#if (STM32_PLL1_DIVP_VALUE == 1) || \ - ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ - ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || \ - defined(__DOXYGEN__) -#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos) +#if (STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128) && \ + ((STM32_PLL1_DIVP_VALUE & 1) == 0) +#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL1_DIVP_VALUE value specified" #endif @@ -1739,7 +1737,7 @@ */ #if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128)) || \ defined(__DOXYGEN__) -#define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << RCC_PLL2DIVR_P2_Pos) +#define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL2_DIVP_VALUE value specified" #endif @@ -1749,7 +1747,7 @@ */ #if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128)) || \ defined(__DOXYGEN__) -#define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << RCC_PLL3DIVR_P3_Pos) +#define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << 9U) #else #error "invalid STM32_PLL3_DIVP_VALUE value specified" #endif diff --git a/readme.txt b/readme.txt index d886cfdfd..0604ed738 100644 --- a/readme.txt +++ b/readme.txt @@ -107,6 +107,8 @@ instead of a simple size. - NEW: RT and NIL upgraded to support the enhanced OSLIB. - NEW: Memory areas/pointers checker functions added to OSLIB. +- FIX: Fixed invalid checks on PLLP/R/Q dividers on STM32H7 (bug #1253) + (backported to 20.3.5)(backported to 21.11.4). - FIX: Fixed remote wakeup failure in STM32 OTGv1 driver (bug #1252) (backported to 20.3.5)(backported to 21.11.4). - FIX: Fixed wrong use of hooks in RT/NIL (bug #1251)