Fixed bug #1216.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15421 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

os/hal/ports/STM32/STM32H7xx/hal_lld.c

@@ -140,16 +140,16 @@ void hal_lld_init(void) {
      have been initialized in the board initialization file (board.c).
      Note, GPIOs are not reset because initialized before this point in
      board files.*/
-  rccResetAHB1(~0);
+  __rccResetAHB1(~0);
-  rccResetAHB2(~0);
+  __rccResetAHB2(~0);
-  rccResetAHB3(~(RCC_AHB3RSTR_FMCRST |
+  __rccResetAHB3(~(RCC_AHB3RSTR_FMCRST |
                  0x80000000U));     /* Was RCC_AHB3RSTR_CPURST in Rev-V.*/
-  rccResetAHB4(~(RCC_APB4RSTR_SYSCFGRST | STM32_GPIO_EN_MASK));
+  __rccResetAHB4(~(RCC_APB4RSTR_SYSCFGRST | STM32_GPIO_EN_MASK));
-  rccResetAPB1L(~0);
+  __rccResetAPB1L(~0);
-  rccResetAPB1H(~0);
+  __rccResetAPB1H(~0);
-  rccResetAPB2(~0);
+  __rccResetAPB2(~0);
-  rccResetAPB3(~0);
+  __rccResetAPB3(~0);
-  rccResetAPB4(~0);
+  __rccResetAPB4(~0);
 #endif /* STM32_NO_INIT == FALSE */
 
   /* DMA subsystems initialization.*/

os/hal/ports/STM32/STM32H7xx/stm32_rcc.h

@@ -54,6 +54,78 @@
 /* Driver macros.                                                            */
 /*===========================================================================*/
 
+__STATIC_INLINE void __rccResetAPB1L(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->APB1LRSTR |= mask;
+  RCC->APB1LRSTR &= ~mask;
+  (void)RCC->APB1LRSTR;
+}
+
+__STATIC_INLINE void __rccResetAPB1H(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->APB1HRSTR |= mask;
+  RCC->APB1HRSTR &= ~mask;
+  (void)RCC->APB1HRSTR;
+}
+
+__STATIC_INLINE void __rccResetAPB2(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->APB2RSTR |= mask;
+  RCC->APB2RSTR &= ~mask;
+  (void)RCC->APB2RSTR;
+}
+
+__STATIC_INLINE void __rccResetAPB3(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->APB3RSTR |= mask;
+  RCC->APB3RSTR &= ~mask;
+  (void)RCC->APB3RSTR;
+}
+
+__STATIC_INLINE void __rccResetAPB4(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->APB4RSTR |= mask;
+  RCC->APB4RSTR &= ~mask;
+  (void)RCC->APB4RSTR;
+}
+
+__STATIC_INLINE void __rccResetAHB1(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->AHB1RSTR |= mask;
+  RCC->AHB1RSTR &= ~mask;
+  (void)RCC->AHB1RSTR;
+}
+
+__STATIC_INLINE void __rccResetAHB2(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->AHB2RSTR |= mask;
+  RCC->AHB2RSTR &= ~mask;
+  (void)RCC->AHB2RSTR;
+}
+
+__STATIC_INLINE void __rccResetAHB3(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->AHB3RSTR |= mask;
+  RCC->AHB3RSTR &= ~mask;
+  (void)RCC->AHB3RSTR;
+}
+
+__STATIC_INLINE void __rccResetAHB4(uint32_t mask) {
+
+  /* Resetting the peripherals.*/
+  RCC->AHB4RSTR |= mask;
+  RCC->AHB4RSTR &= ~mask;
+  (void)RCC->AHB4RSTR;
+}
+
 /**
  * @name    Generic RCC operations
  * @{
@@ -144,10 +216,7 @@ __STATIC_INLINE void rccResetAPB1L(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAPB1L(mask);
-  RCC->APB1LRSTR |= mask;
-  RCC->APB1LRSTR &= ~mask;
-  (void)RCC->APB1LRSTR;
 }
 
 /**
@@ -236,11 +305,9 @@ __STATIC_INLINE void rccResetAPB1H(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAPB1H(mask);
-  RCC->APB1HRSTR |= mask;
-  RCC->APB1HRSTR &= ~mask;
-  (void)RCC->APB1HRSTR;
 }
+
 /**
  * @brief   Enables peripherals on APB2.
  *
@@ -327,10 +394,7 @@ __STATIC_INLINE void rccResetAPB2(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAPB2(mask);
-  RCC->APB2RSTR |= mask;
-  RCC->APB2RSTR &= ~mask;
-  (void)RCC->APB2RSTR;
 }
 
 /**
@@ -419,10 +483,7 @@ __STATIC_INLINE void rccResetAPB3(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAPB3(mask);
-  RCC->APB3RSTR |= mask;
-  RCC->APB3RSTR &= ~mask;
-  (void)RCC->APB3RSTR;
 }
 
 /**
@@ -511,10 +572,7 @@ __STATIC_INLINE void rccResetAPB4(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAPB4(mask);
-  RCC->APB4RSTR |= mask;
-  RCC->APB4RSTR &= ~mask;
-  (void)RCC->APB4RSTR;
 }
 
 /**
@@ -603,10 +661,7 @@ __STATIC_INLINE void rccResetAHB1(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAHB1(mask);
-  RCC->AHB1RSTR |= mask;
-  RCC->AHB1RSTR &= ~mask;
-  (void)RCC->AHB1RSTR;
 }
 
 /**
@@ -695,10 +750,7 @@ __STATIC_INLINE void rccResetAHB2(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAHB2(mask);
-  RCC->AHB2RSTR |= mask;
-  RCC->AHB2RSTR &= ~mask;
-  (void)RCC->AHB2RSTR;
 }
 
 /**
@@ -787,10 +839,7 @@ __STATIC_INLINE void rccResetAHB3(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAHB3(mask);
-  RCC->AHB3RSTR |= mask;
-  RCC->AHB3RSTR &= ~mask;
-  (void)RCC->AHB3RSTR;
 }
 
 /**
@@ -879,10 +928,7 @@ __STATIC_INLINE void rccResetAHB4(uint32_t mask) {
 #endif
 #endif
 
-  /* Resetting the peripherals.*/
+  __rccResetAHB4(mask);
-  RCC->AHB4RSTR |= mask;
-  RCC->AHB4RSTR &= ~mask;
-  (void)RCC->AHB4RSTR;
 }
 /** @} */
 

readme.txt

@@ -112,6 +112,8 @@
 - NEW: On STM32WBxx added a check on STM32_LSI_ENABLE required by IWDG.
 - NEW: Added SPIv2 support also to STM32WB and STM32WL.
 - FIX: Reverted bug #1100 (backported to 20.3.5)(backported to 21.11.2).
+- FIX: Fixed assertion on initialization of STM32H7xx (bug #1216)
+       (backported to 21.11.2).
 - FIX: Fixed Virtual Timers failure in a specific condition (bug #1215)
        (backported to 20.3.5)(backported to 21.11.2).
 - FIX: Fixed invalid STM32_OTG_STEPPING for STM32F40_41xxx (bug #1214)