git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5843 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
fa0f676801
commit
9343707ee2
|
@ -18,7 +18,7 @@
|
|||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/* Initial setup of all defined pads, the list is terminated by a {0, 0, 0}.*/
|
||||
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
|
||||
static const spc_siu_init_t spc_siu_init[] = {
|
||||
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
|
||||
|
@ -30,7 +30,7 @@ static const spc_siu_init_t spc_siu_init[] = {
|
|||
{PCR(PORT_E, PE_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_E, PE_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_E, PE_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{0, 0, 0}
|
||||
{-1, 0, 0}
|
||||
};
|
||||
|
||||
/* Initialization array for the PSMI registers.*/
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/* Initial setup of all defined pads, the list is terminated by a {0, 0, 0}.*/
|
||||
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
|
||||
static const spc_siu_init_t spc_siu_init[] = {
|
||||
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
|
||||
|
@ -30,13 +30,14 @@ static const spc_siu_init_t spc_siu_init[] = {
|
|||
{PCR(PORT_E, PE_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_E, PE_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_E, PE_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{0, 0, 0}
|
||||
{-1, 0, 0}
|
||||
};
|
||||
|
||||
/* Initialization array for the PSMI registers.*/
|
||||
static const uint8_t spc_padsels_init[SPC5_SIUL_NUM_PADSELS] = {
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/* Initial setup of all defined pads, the list is terminated by a {0, 0, 0}.*/
|
||||
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
|
||||
static const spc_siu_init_t spc_siu_init[] = {
|
||||
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
|
||||
|
@ -30,7 +30,7 @@ static const spc_siu_init_t spc_siu_init[] = {
|
|||
{PCR(PORT_D, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_D, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_D, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{0, 0, 0}
|
||||
{-1, 0, 0}
|
||||
};
|
||||
|
||||
/* Initialization array for the PSMI registers.*/
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/* Initial setup of all defined pads, the list is terminated by a {0, 0, 0}.*/
|
||||
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
|
||||
static const spc_siu_init_t spc_siu_init[] = {
|
||||
{PCR(PORT5, P5_ESCI_A_TX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
{PCR(PORT5, P5_ESCI_A_RX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
|
@ -30,7 +30,7 @@ static const spc_siu_init_t spc_siu_init[] = {
|
|||
{PCR(PORT11, P11_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT11, P11_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT11, P11_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{0, 0, 0}
|
||||
{-1, 0, 0}
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/* Initial setup of all defined pads, the list is terminated by a {0, 0, 0}.*/
|
||||
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
|
||||
static const spc_siu_init_t spc_siu_init[] = {
|
||||
{PCR(PORT5, P5_ESCI_A_TX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
{PCR(PORT5, P5_ESCI_A_RX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
|
@ -30,7 +30,7 @@ static const spc_siu_init_t spc_siu_init[] = {
|
|||
{PCR(PORT11, P11_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT11, P11_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT11, P11_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{0, 0, 0}
|
||||
{-1, 0, 0}
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/* Initial setup of all defined pads, the list is terminated by a {0, 0, 0}.*/
|
||||
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
|
||||
static const spc_siu_init_t spc_siu_init[] = {
|
||||
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
|
||||
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
|
||||
|
@ -30,7 +30,7 @@ static const spc_siu_init_t spc_siu_init[] = {
|
|||
{PCR(PORT_D, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_D, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{PCR(PORT_D, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
|
||||
{0, 0, 0}
|
||||
{-1, 0, 0}
|
||||
};
|
||||
|
||||
/* Initialization array for the PSMI registers.*/
|
||||
|
|
|
@ -147,7 +147,7 @@ DLIBS =
|
|||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
UDEFS = -D_SPC560P50L5_
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
|
|
@ -147,7 +147,7 @@ DLIBS =
|
|||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
UDEFS = -D_SPC564A70L7_
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
|
|
@ -107,7 +107,7 @@
|
|||
#define SPC5_SIUL_PCTL 68
|
||||
#define SPC5_SIUL_NUM_PORTS 8
|
||||
#define SPC5_SIUL_NUM_PCRS 123
|
||||
#define SPC5_SIUL_NUM_PADSELS 32
|
||||
#define SPC5_SIUL_NUM_PADSELS 63
|
||||
#define SPC5_SIUL_SYSTEM_PINS 32,33,121,122
|
||||
/** @} */
|
||||
|
||||
|
|
|
@ -95,7 +95,7 @@ skip:
|
|||
|
||||
/* Initialize PCR registers for defined pads.*/
|
||||
i = 0;
|
||||
while (config->inits[i].pcr_value != 0) {
|
||||
while (config->inits[i].pcr_index != -1) {
|
||||
SIU.GPDO[config->inits[i].pcr_index].R = config->inits[i].gpdo_value;
|
||||
SIU.PCR[config->inits[i].pcr_index].R = config->inits[i].pcr_value;
|
||||
i++;
|
||||
|
|
|
@ -104,8 +104,12 @@
|
|||
|
||||
/**
|
||||
* @brief Alternate "n" output pad.
|
||||
* @note Both the IBE and OBE bits are specified in this mask, the OBE
|
||||
* bit is not required for some PCRs but in that case it is
|
||||
* ignored.
|
||||
*/
|
||||
#define PAL_MODE_OUTPUT_ALTERNATE(n) (PAL_SPC5_IBE | PAL_SPC5_PA(n))
|
||||
#define PAL_MODE_OUTPUT_ALTERNATE(n) (PAL_SPC5_IBE | PAL_SPC5_OBE | \
|
||||
PAL_SPC5_PA(n))
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
|
@ -145,7 +149,7 @@ typedef uint32_t ioportid_t;
|
|||
* @brief SIUL register initializer type.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t pcr_index;
|
||||
int32_t pcr_index;
|
||||
uint8_t gpdo_value;
|
||||
iomode_t pcr_value;
|
||||
} spc_siu_init_t;
|
||||
|
|
|
@ -67,7 +67,7 @@ void _pal_lld_init(const PALConfig *config) {
|
|||
|
||||
/* Initialize PCR registers for defined pads.*/
|
||||
i = 0;
|
||||
while (config->inits[i].pcr_value != 0) {
|
||||
while (config->inits[i].pcr_index != -1) {
|
||||
SIU.GPDO[config->inits[i].pcr_index].R = config->inits[i].gpdo_value;
|
||||
SIU.PCR[config->inits[i].pcr_index].R = config->inits[i].pcr_value;
|
||||
i++;
|
||||
|
|
|
@ -146,7 +146,7 @@ typedef uint16_t iomode_t;
|
|||
* @brief SIU/SIUL register initializer type.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t pcr_index;
|
||||
int32_t pcr_index;
|
||||
uint8_t gpdo_value;
|
||||
iomode_t pcr_value;
|
||||
} spc_siu_init_t;
|
||||
|
|
|
@ -146,7 +146,7 @@ DLIBS =
|
|||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
UDEFS = -D_SPC560P50L5_
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
|
|
@ -213,7 +213,7 @@
|
|||
#define SPC5_SPI_USE_DSPI1 TRUE
|
||||
#define SPC5_SPI_USE_DSPI2 TRUE
|
||||
#define SPC5_SPI_USE_DSPI3 TRUE
|
||||
#define SPC5_SPI_USE_DSPI4 TRUE
|
||||
#define SPC5_SPI_USE_DSPI4 FALSE
|
||||
#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \
|
||||
SPC5_MCR_PCSIS1 | \
|
||||
SPC5_MCR_PCSIS2 | \
|
||||
|
|
Loading…
Reference in New Issue