diff --git a/os/ex/devices/ST/lis2dw12.c b/os/ex/devices/ST/lis2dw12.c new file mode 100644 index 000000000..f58988221 --- /dev/null +++ b/os/ex/devices/ST/lis2dw12.c @@ -0,0 +1,605 @@ +/* + ChibiOS - Copyright (C) 2023 Andrey Gusakov + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + +*/ + +/** + * @file lis2dw12.c + * @brief LIS2DW12 MEMS interface module code. + * + * @addtogroup LIS2DW12 + * @ingroup EX_ST + * @{ + */ + +#include "hal.h" +#include "lis2dw12.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +#if (LIS2DW12_USE_SPI) || defined(__DOXYGEN__) +/** + * @brief Reads a generic register value using SPI. + * @pre The SPI interface must be initialized and the driver started. + * + * @param[in] spip pointer to the SPI interface + * @param[in] reg starting register address + * @param[in] n number of adjacent registers to write + * @param[in] b pointer to a buffer. + */ +static void lis2dw12SPIReadRegister(SPIDriver *spip, uint8_t reg, size_t n, + uint8_t* b) { + uint8_t cmd = reg | LIS2DW12_RW; + spiSelect(spip); + spiSend(spip, 1, &cmd); + spiReceive(spip, n, b); + spiUnselect(spip); +} + +/** + * @brief Writes a value into a generic register using SPI. + * @pre The SPI interface must be initialized and the driver started. + * + * @param[in] spip pointer to the SPI interface + * @param[in] reg starting register address + * @param[in] n number of adjacent registers to write + * @param[in] b pointer to a buffer of values. + */ +static void lis2dw12SPIWriteRegister(SPIDriver *spip, uint8_t reg, size_t n, + uint8_t* b) { + uint8_t cmd = reg & LIS2DW12_AD_MASK; + spiSelect(spip); + spiSend(spip, 1, &cmd); + spiSend(spip, n, b); + spiUnselect(spip); +} +#endif /* LIS2DW12_USE_SPI */ + +/** + * @brief Return the number of axes of the BaseAccelerometer. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * + * @return the number of axes. + */ +static size_t acc_get_axes_number(void *ip) { + (void)ip; + + return LIS2DW12_ACC_NUMBER_OF_AXES; +} + +/** + * @brief Retrieves raw data from the BaseAccelerometer. + * @note This data is retrieved from MEMS register without any algebraical + * manipulation. + * @note The axes array must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * @param[out] axes a buffer which would be filled with raw data. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. + */ +static msg_t acc_read_raw(void *ip, int32_t axes[]) { + LIS2DW12Driver* devp; + uint8_t i, tmp[LIS2DW12_ACC_NUMBER_OF_AXES * 2]; + msg_t msg = MSG_OK; + + osalDbgCheck((ip != NULL) && (axes != NULL)); + + /* Getting parent instance pointer.*/ + devp = objGetInstance(LIS2DW12Driver*, (BaseAccelerometer*)ip); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_read_raw(), invalid state"); + +#if LIS2DW12_USE_SPI +#if LIS2DW12_SHARED_SPI + spiAcquireBus(devp->config->spip); + spiStart(devp->config->spip, + devp->config->spicfg); +#endif /* LIS2DW12_SHARED_SPI */ + + osalDbgAssert((devp->config->spip->state == SPI_READY), + "acc_read_raw(), channel not ready"); + + /* TODO: read STATUS register too, check DRDY bit */ + + lis2dw12SPIReadRegister(devp->config->spip, + LIS2DW12_AD_OUT_X_L, + LIS2DW12_ACC_NUMBER_OF_AXES * 2, tmp); + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) { + axes[i] = (int32_t)(tmp[2 * i + 0] | (tmp[2 * i + 1] << 8)); + } + +#if LIS2DW12_SHARED_SPI + spiReleaseBus(devp->config->spip); +#endif /* LIS2DW12_SHARED_SPI */ +#endif /* LIS2DW12_USE_SPI */ + return msg; +} + +/** + * @brief Retrieves cooked data from the BaseAccelerometer. + * @note This data is manipulated according to the formula + * cooked = (raw * sensitivity) - bias. + * @note Final data is expressed as milli-G. + * @note The axes array must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * @param[out] axes a buffer which would be filled with cooked data. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. + */ +static msg_t acc_read_cooked(void *ip, float axes[]) { + LIS2DW12Driver* devp; + uint32_t i; + int32_t raw[LIS2DW12_ACC_NUMBER_OF_AXES]; + msg_t msg; + + osalDbgCheck((ip != NULL) && (axes != NULL)); + + /* Getting parent instance pointer.*/ + devp = objGetInstance(LIS2DW12Driver*, (BaseAccelerometer*)ip); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_read_cooked(), invalid state"); + + msg = acc_read_raw(ip, raw); + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) { + axes[i] = (raw[i] * devp->accsensitivity[i]) - devp->accbias[i]; + } + return msg; +} + +/** + * @brief Set bias values for the BaseAccelerometer. + * @note Bias must be expressed as milli-G. + * @note The bias buffer must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * @param[in] bp a buffer which contains biases. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + */ +static msg_t acc_set_bias(void *ip, float *bp) { + LIS2DW12Driver* devp; + uint32_t i; + msg_t msg = MSG_OK; + + osalDbgCheck((ip != NULL) && (bp != NULL)); + + /* Getting parent instance pointer.*/ + devp = objGetInstance(LIS2DW12Driver*, (BaseAccelerometer*)ip); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_set_bias(), invalid state"); + + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) { + devp->accbias[i] = bp[i]; + } + return msg; +} + +/** + * @brief Reset bias values for the BaseAccelerometer. + * @note Default biases value are obtained from device datasheet when + * available otherwise they are considered zero. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + */ +static msg_t acc_reset_bias(void *ip) { + LIS2DW12Driver* devp; + uint32_t i; + msg_t msg = MSG_OK; + + osalDbgCheck(ip != NULL); + + /* Getting parent instance pointer.*/ + devp = objGetInstance(LIS2DW12Driver*, (BaseAccelerometer*)ip); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_reset_bias(), invalid state"); + + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accbias[i] = LIS2DW12_ACC_BIAS; + return msg; +} + +/** + * @brief Set sensitivity values for the BaseAccelerometer. + * @note Sensitivity must be expressed as milli-G/LSB. + * @note The sensitivity buffer must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * @param[in] sp a buffer which contains sensitivities. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + */ +static msg_t acc_set_sensivity(void *ip, float *sp) { + LIS2DW12Driver* devp; + uint32_t i; + msg_t msg = MSG_OK; + + /* Getting parent instance pointer.*/ + devp = objGetInstance(LIS2DW12Driver*, (BaseAccelerometer*)ip); + + osalDbgCheck((ip != NULL) && (sp != NULL)); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_set_sensivity(), invalid state"); + + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) { + devp->accsensitivity[i] = sp[i]; + } + return msg; +} + +/** + * @brief Reset sensitivity values for the BaseAccelerometer. + * @note Default sensitivities value are obtained from device datasheet. + * + * @param[in] ip pointer to @p BaseAccelerometer interface. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET otherwise. + */ +static msg_t acc_reset_sensivity(void *ip) { + LIS2DW12Driver* devp; + uint32_t i; + msg_t msg = MSG_OK; + + osalDbgCheck(ip != NULL); + + /* Getting parent instance pointer.*/ + devp = objGetInstance(LIS2DW12Driver*, (BaseAccelerometer*)ip); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_reset_sensivity(), invalid state"); + + if(devp->config->accfullscale == LIS2DW12_ACC_FS_2G) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_2G; + if(devp->config->accfullscale == LIS2DW12_ACC_FS_4G) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_4G; + else if(devp->config->accfullscale == LIS2DW12_ACC_FS_8G) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_8G; + else if(devp->config->accfullscale == LIS2DW12_ACC_FS_16G) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_16G; + else { + osalDbgAssert(FALSE, + "acc_reset_sensivity(), accelerometer full scale issue"); + return MSG_RESET; + } + return msg; +} + +/** + * @brief Changes the LIS2DW12Driver accelerometer fullscale value. + * @note This function also rescale sensitivities and biases based on + * previous and next fullscale value. + * @note A recalibration is highly suggested after calling this function. + * + * @param[in] devp pointer to @p LIS2DW12Driver interface. + * @param[in] fs new fullscale value. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET otherwise. + */ +static msg_t acc_set_full_scale(LIS2DW12Driver *devp, lis2dw12_acc_fs_t fs) { + float newfs, scale; + uint8_t i, cr; + msg_t msg = MSG_OK; + + osalDbgCheck(devp != NULL); + + osalDbgAssert((devp->state == LIS2DW12_READY), + "acc_set_full_scale(), invalid state"); + + /* Computing new fullscale value.*/ + if(fs == LIS2DW12_ACC_FS_2G) { + newfs = LIS2DW12_ACC_2G; + } + else if(fs == LIS2DW12_ACC_FS_4G) { + newfs = LIS2DW12_ACC_4G; + } + else if(fs == LIS2DW12_ACC_FS_8G) { + newfs = LIS2DW12_ACC_8G; + } + else if(fs == LIS2DW12_ACC_FS_16G) { + newfs = LIS2DW12_ACC_16G; + } + else { + msg = MSG_RESET; + return msg; + } + + if(newfs != devp->accfullscale) { + /* Computing scale value.*/ + scale = newfs / devp->accfullscale; + devp->accfullscale = newfs; + +#if LIS2DW12_USE_SPI +#if LIS2DW12_SHARED_SPI + spiAcquireBus(devp->config->spip); + spiStart(devp->config->spip, + devp->config->spicfg); +#endif /* LIS2DW12_SHARED_SPI */ + osalDbgAssert((devp->config->spip->state == SPI_READY), + "acc_set_full_scale(), channel not ready"); + + /* Getting data from register.*/ + lis2dw12SPIReadRegister(devp->config->spip, LIS2DW12_AD_CTRL_REG6, 1, &cr); +#endif /* LIS2DW12_USE_SPI */ + + cr &= ~(LIS2DW12_CTRL_REG6_FS_MASK); + cr |= fs; + +#if LIS2DW12_USE_SPI + /* Setting data to register.*/ + lis2dw12SPIWriteRegister(devp->config->spip, LIS2DW12_AD_CTRL_REG6, 1, &cr); + +#if LIS2DW12_SHARED_SPI + spiReleaseBus(devp->config->spip); +#endif /* LIS2DW12_SHARED_SPI */ +#endif /* LIS2DW12_USE_SPI */ + + /* Scaling sensitivity and bias. Re-calibration is suggested anyway. */ + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) { + devp->accsensitivity[i] *= scale; + devp->accbias[i] *= scale; + } + } + return msg; +} + +static const struct LIS2DW12VMT vmt_device = { + (size_t)0, + acc_set_full_scale +}; + +static const struct BaseAccelerometerVMT vmt_accelerometer = { + sizeof(struct LIS2DW12VMT*), + acc_get_axes_number, acc_read_raw, acc_read_cooked, + acc_set_bias, acc_reset_bias, acc_set_sensivity, acc_reset_sensivity +}; + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Initializes an instance. + * + * @param[out] devp pointer to the @p LIS2DW12Driver object + * + * @init + */ +void lis2dw12ObjectInit(LIS2DW12Driver *devp) { + devp->vmt = &vmt_device; + devp->acc_if.vmt = &vmt_accelerometer; + + devp->config = NULL; + + devp->accaxes = LIS2DW12_ACC_NUMBER_OF_AXES; + + devp->state = LIS2DW12_STOP; +} + +/** + * @brief Configures and activates LIS2DW12 Complex Driver peripheral. + * + * @param[in] devp pointer to the @p LIS2DW12Driver object + * @param[in] config pointer to the @p LIS2DW12Config object + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET otherwise. + * + * @api + */ +msg_t lis2dw12Start(LIS2DW12Driver *devp, const LIS2DW12Config *config) { + uint32_t i; + uint8_t devid; + uint8_t cr[6] = {0, 0, 0, 0, 0, 0}; + osalDbgCheck((devp != NULL) && (config != NULL)); + + osalDbgAssert((devp->state == LIS2DW12_STOP) || (devp->state == LIS2DW12_READY), + "lis2dw12Start(), invalid state"); + + devp->config = config; + + /* Control register 1 configuration block.*/ + { + cr[0] = devp->config->accoutputdatarate | + devp->config->accoutputresolution | + devp->config->acclowpowermode; + } + + /* Control register 2 configuration block.*/ + { + cr[1] = LIS2DW12_CTRL_REG2_IF_ADD_INC | + LIS2DW12_CTRL_REG2_BDU; + } + + /* Control register 3.*/ + /* keep default 0x00 */ + + /* Control register 4 and 5.*/ + /* keep default 0x00 */ + + /* Control register 6 configuration block.*/ + { + cr[6] = devp->config->accbadwidthselect | + devp->config->accfullscale | + LIS2DW12_CTRL_REG6_FDS_LPF | + LIS2DW12_CTRL_REG6_LOW_NOISE; + } +#if LIS2DW12_USE_SPI +#if LIS2DW12_SHARED_SPI + spiAcquireBus((devp)->config->spip); +#endif /* LIS2DW12_SHARED_SPI */ + spiStart((devp)->config->spip, (devp)->config->spicfg); + + /* Check WHO_I_AM */ + lis2dw12SPIReadRegister(devp->config->spip, LIS2DW12_AD_WHO_AM_I, + 1, &devid); + if (devid != 0x44) + { + return MSG_RESET; + } + + /* First enable autoincrement */ + lis2dw12SPIWriteRegister(devp->config->spip, LIS2DW12_AD_CTRL_REG2, + 1, &cr[1]); + + /* Now update all CTRL register with one write */ + lis2dw12SPIWriteRegister(devp->config->spip, LIS2DW12_AD_CTRL_REG1, + 6, cr); + +#if LIS2DW12_SHARED_SPI + spiReleaseBus((devp)->config->spip); +#endif /* LIS2DW12_SHARED_SPI */ +#endif /* LIS2DW12_USE_SPI */ + + /* Storing sensitivity information according to full scale value */ + if(devp->config->accfullscale == LIS2DW12_ACC_FS_2G) { + devp->accfullscale = LIS2DW12_ACC_2G; + if(devp->config->accsensitivity == NULL) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_2G; + else + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = devp->config->accsensitivity[i]; + } + if(devp->config->accfullscale == LIS2DW12_ACC_FS_4G) { + devp->accfullscale = LIS2DW12_ACC_4G; + if(devp->config->accsensitivity == NULL) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_4G; + else + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = devp->config->accsensitivity[i]; + } + else if(devp->config->accfullscale == LIS2DW12_ACC_FS_8G) { + devp->accfullscale = LIS2DW12_ACC_8G; + if(devp->config->accsensitivity == NULL) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_8G; + else + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = devp->config->accsensitivity[i]; + } + else if(devp->config->accfullscale == LIS2DW12_ACC_FS_16G) { + devp->accfullscale = LIS2DW12_ACC_16G; + if(devp->config->accsensitivity == NULL) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = LIS2DW12_ACC_SENS_16G; + else + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accsensitivity[i] = devp->config->accsensitivity[i]; + } + else { + osalDbgAssert(FALSE, "lis2dw12Start(), accelerometer full scale issue"); + } + + /* Storing bias information according to user setting */ + if(devp->config->accbias != NULL) + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accbias[i] = devp->config->accbias[i]; + else + for(i = 0; i < LIS2DW12_ACC_NUMBER_OF_AXES; i++) + devp->accbias[i] = LIS2DW12_ACC_BIAS; + + /* This is the Accelerometer transient recovery time */ + osalThreadSleepMilliseconds(10); + + devp->state = LIS2DW12_READY; + + return MSG_OK; +} + +/** + * @brief Deactivates the LIS2DW12 Complex Driver peripheral. + * + * @param[in] devp pointer to the @p LIS2DW12Driver object + * + * @api + */ +void lis2dw12Stop(LIS2DW12Driver *devp) { + uint8_t cr1; + osalDbgCheck(devp != NULL); + + osalDbgAssert((devp->state == LIS2DW12_STOP) || + (devp->state == LIS2DW12_READY), + "lis2dw12Stop(), invalid state"); + + if (devp->state == LIS2DW12_READY) { +#if LIS2DW12_USE_SPI +#if LIS2DW12_SHARED_SPI + spiAcquireBus((devp)->config->spip); + spiStart((devp)->config->spip, + (devp)->config->spicfg); +#endif /* LIS2DW12_SHARED_SPI */ + /* Disabling all axes and enabling power down mode.*/ + cr1 = 0; + lis2dw12SPIWriteRegister(devp->config->spip, LIS2DW12_AD_CTRL_REG1, 1, &cr1); + spiStop((devp)->config->spip); +#if LIS2DW12_SHARED_SPI + spiReleaseBus((devp)->config->spip); +#endif /* LIS2DW12_SHARED_SPI */ +#endif /* LIS2DW12_USE_SPI */ + } + devp->state = LIS2DW12_STOP; +} +/** @} */ diff --git a/os/ex/devices/ST/lis2dw12.h b/os/ex/devices/ST/lis2dw12.h new file mode 100644 index 000000000..075eab23b --- /dev/null +++ b/os/ex/devices/ST/lis2dw12.h @@ -0,0 +1,612 @@ +/* + ChibiOS - Copyright (C) 2023 Andrey Gusakov + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + +*/ + +/** + * @file lis2dw12.h + * @brief LIS2DW12 MEMS interface module header. + * + * @addtogroup LIS2DW12 + * @ingroup EX_ST + * @{ + */ + +#ifndef _LIS2DW12_H_ +#define _LIS2DW12_H_ + +#include "ex_accelerometer.h" + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name Version identification + * @{ + */ +/** + * @brief LIS2DW12 driver version string. + */ +#define EX_LIS2DW12_VERSION "1.1.1" + +/** + * @brief LIS2DW12 driver version major number. + */ +#define EX_LIS2DW12_MAJOR 1 + +/** + * @brief LIS2DW12 driver version minor number. + */ +#define EX_LIS2DW12_MINOR 1 + +/** + * @brief LIS2DW12 driver version patch number. + */ +#define EX_LIS2DW12_PATCH 1 +/** @} */ + +/** + * @brief LIS2DW12 accelerometer subsystem characteristics. + * @note Sensitivity is expressed as milli-G/LSB whereas + * 1 milli-G = 0.00980665 m/s^2. + * @note Bias is expressed as milli-G. + * + * @{ + */ +#define LIS2DW12_ACC_NUMBER_OF_AXES 3U + +#define LIS2DW12_ACC_2G 2.0f +#define LIS2DW12_ACC_4G 4.0f +#define LIS2DW12_ACC_8G 8.0f +#define LIS2DW12_ACC_16G 16.0f + +#define LIS2DW12_ACC_SENS_2G (0.244f * 0.00980665f) +#define LIS2DW12_ACC_SENS_4G (0.488f * 0.00980665f) +#define LIS2DW12_ACC_SENS_8G (0.976f * 0.00980665f) +#define LIS2DW12_ACC_SENS_16G (1.952f * 0.00980665f) + +#define LIS2DW12_ACC_BIAS 0.0f +/** @} */ + +/** + * @name LIS2DW12 communication interfaces related bit masks + * @{ + */ +#define LIS2DW12_DI_MASK 0xFF +#define LIS2DW12_DI(n) (1 << n) +#define LIS2DW12_AD_MASK 0x7F +#define LIS2DW12_AD(n) (1 << n) +#define LIS2DW12_RW (1 << 7) +/** @} */ + +/** + * @name LIS2DW12 register addresses + * @{ + */ +#define LIS2DW12_AD_WHO_AM_I 0x0F +#define LIS2DW12_AD_CTRL_REG1 0x20 +#define LIS2DW12_AD_CTRL_REG2 0x21 +#define LIS2DW12_AD_CTRL_REG3 0x22 +#define LIS2DW12_AD_CTRL_REG4_INT1 0x23 +#define LIS2DW12_AD_CTRL_REG5_INT2 0x24 +#define LIS2DW12_AD_CTRL_REG6 0x25 +#define LIS2DW12_AD_OUT_T 0x26 +#define LIS2DW12_AD_STATUS_REG 0x27 +#define LIS2DW12_AD_OUT_X_L 0x28 +#define LIS2DW12_AD_OUT_X_H 0x29 +#define LIS2DW12_AD_OUT_Y_L 0x2A +#define LIS2DW12_AD_OUT_Y_H 0x2B +#define LIS2DW12_AD_OUT_Z_L 0x2C +#define LIS2DW12_AD_OUT_Z_H 0x2D +#define LIS2DW12_AD_FIFO_CTRL 0x2E +#define LIS2DW12_AD_FIFO_SAMPLES 0x2F +#define LIS2DW12_AD_TAP_THS_X 0x30 +#define LIS2DW12_AD_TAP_THS_Y 0x31 +#define LIS2DW12_AD_TAP_THS_Z 0x32 +#define LIS2DW12_AD_INT_DUR 0x33 +#define LIS2DW12_AD_WAKE_UP_THS 0x34 +#define LIS2DW12_AD_WAKE_UP_DUR 0x35 +#define LIS2DW12_AD_FREE_FALL 0x36 +#define LIS2DW12_AD_STATUS_DUP 0x37 +#define LIS2DW12_AD_WAKE_UP_SRC 0x38 +#define LIS2DW12_AD_TAP_SRC 0x39 +#define LIS2DW12_AD_SIXD_SRC 0x3A +#define LIS2DW12_AD_ALL_INT_SRC 0x3B +#define LIS2DW12_AD_X_OFS_USR 0x3C +#define LIS2DW12_AD_Y_OFS_USR 0x3D +#define LIS2DW12_AD_Z_OFS_USR 0x3E +#define LIS2DW12_AD_CTRL_REG7 0x3F + +/** @} */ + +/** + * @name LIS2DW12_CTRL_REG1 register bits definitions + * @{ + */ +#define LIS2DW12_CTRL_REG1_MASK 0xFF +/** @} */ + +/** + * @name LIS2DW12_CTRL_REG2 register bits definitions + * @{ + */ +#define LIS2DW12_CTRL_REG2_REG2_MASK 0xDF +#define LIS2DW12_CTRL_REG2_SIM (1 << 0) +#define LIS2DW12_CTRL_REG2_I2C_DISABLE (1 << 1) +#define LIS2DW12_CTRL_REG2_IF_ADD_INC (1 << 2) +#define LIS2DW12_CTRL_REG2_BDU (1 << 3) +#define LIS2DW12_CTRL_REG2_CS_PU_DIS (1 << 4) +#define LIS2DW12_CTRL_REG2_SOFT_RESET (1 << 6) +#define LIS2DW12_CTRL_REG2_BOOT (1 << 7) +/** @} */ + +/** + * @name LIS2DW12_CTRL_REG3 register bits definitions + * @{ + */ +#define LIS2DW12_CTRL_REG3_MASK 0xFF + +/** + * @name LIS2DW12_CTRL_REG4 register bits definitions + * @{ + */ +#define LIS2DW12_CTRL_REG4_MASK 0xFF + +/** + * @name LIS2DW12_CTRL_REG5 register bits definitions + * @{ + */ +#define LIS2DW12_CTRL_REG5_MASK 0xFF + +/** @} */ + +/** + * @name LIS2DW12_CTRL_REG6 register bits definitions + * @{ + */ +#define LIS2DW12_CTRL_REG6_MASK 0xFC +#define LIS2DW12_CTRL_REG6_BW_MASK 0xC0 +#define LIS2DW12_CTRL_REG6_FS_MASK 0x30 +#define LIS2DW12_CTRL_REG6_FDS_HPF (1 << 3) +#define LIS2DW12_CTRL_REG6_FDS_LPF (0 << 3) +#define LIS2DW12_CTRL_REG6_LOW_NOISE (1 << 2) + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief LIS2DW12 SPI interface switch. + * @details If set to @p TRUE the support for SPI is included. + * @note The default is @p TRUE. + */ +#if !defined(LIS2DW12_USE_SPI) || defined(__DOXYGEN__) +#define LIS2DW12_USE_SPI TRUE +#endif + +/** + * @brief LIS2DW12 shared SPI switch. + * @details If set to @p TRUE the device acquires SPI bus ownership + * on each transaction. + * @note The default is @p FALSE. Requires SPI_USE_MUTUAL_EXCLUSION. + */ +#if !defined(LIS2DW12_SHARED_SPI) || defined(__DOXYGEN__) +#define LIS2DW12_SHARED_SPI FALSE +#endif + +/** + * @brief LIS2DW12 I2C interface switch. + * @details If set to @p TRUE the support for I2C is included. + * @note The default is @p FALSE. + */ +#if !defined(LIS2DW12_USE_I2C) || defined(__DOXYGEN__) +#define LIS2DW12_USE_I2C FALSE +#endif + +/** + * @brief LIS2DW12 shared I2C switch. + * @details If set to @p TRUE the device acquires I2C bus ownership + * on each transaction. + * @note The default is @p FALSE. Requires I2C_USE_MUTUAL_EXCLUSION. + */ +#if !defined(LIS2DW12_SHARED_I2C) || defined(__DOXYGEN__) +#define LIS2DW12_SHARED_I2C FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !(LIS2DW12_USE_SPI ^ LIS2DW12_USE_I2C) +#error "LIS2DW12_USE_SPI and LIS2DW12_USE_I2C cannot be both true or both false" +#endif + +#if LIS2DW12_USE_SPI && !HAL_USE_SPI +#error "LIS2DW12_USE_SPI requires HAL_USE_SPI" +#endif + +#if LIS2DW12_SHARED_SPI && !SPI_USE_MUTUAL_EXCLUSION +#error "LIS2DW12_SHARED_SPI requires SPI_USE_MUTUAL_EXCLUSION" +#endif + +#if LIS2DW12_USE_I2C && !HAL_USE_I2C +#error "LIS2DW12_USE_I2C requires HAL_USE_I2C" +#endif + +#if LIS2DW12_SHARED_I2C && !I2C_USE_MUTUAL_EXCLUSION +#error "LIS2DW12_SHARED_I2C requires I2C_USE_MUTUAL_EXCLUSION" +#endif + +/* + * CHTODO: Add support for LIS2DW12 over I2C. + */ +#if LIS2DW12_USE_I2C +#error "LIS2DW12 over I2C still not supported" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @name LIS2DW12 data structures and types + * @{ + */ +/** + * @brief Structure representing a LIS2DW12 driver. + */ +typedef struct LIS2DW12Driver LIS2DW12Driver; + +/** + * @brief LIS2DW12 output data rate. + */ +typedef enum { + LIS2DW12_ACC_ODR_PD = 0x00, /**< Power down mode */ + LIS2DW12_ACC_ODR_12P5HZLP = 0x10, /**< ODR 12.5 Hz/1.6 Hz low power. */ + LIS2DW12_ACC_ODR_12P5HZ = 0x20, /**< ODR 12.5 Hz. */ + LIS2DW12_ACC_ODR_25HZ = 0x30, /**< ODR 25 Hz. */ + LIS2DW12_ACC_ODR_50HZ = 0x40, /**< ODR 50 Hz. */ + LIS2DW12_ACC_ODR_100HZ = 0x50, /**< ODR 100 Hz. */ + LIS2DW12_ACC_ODR_200HZ = 0x60, /**< ODR 200 Hz. */ + LIS2DW12_ACC_ODR_400HZ = 0x70, /**< ODR 400 Hz/200 Hz low power. */ + LIS2DW12_ACC_ODR_800HZ = 0x80, /**< ODR 800 Hz/200 Hz low power. */ + LIS2DW12_ACC_ODR_1600HZ = 0x90 /**< ODR 1600 Hz/200 Hz low power. */ +}lis2dw12_acc_odr_t; + +/** + * @brief LIS2DW12 output resolution. + */ +typedef enum { + LIS2DW12_ACC_OR_LP = 0x00, /**< Low-Power Mode, 12/14-bit */ + LIS2DW12_ACC_OR_HP = 0x04, /**< High-Performance mode, 14-bit */ + LIS2DW12_ACC_OR_SINGLE = 0x08 /**< Single data convertion, 12/14bit */ +}lis2dw12_acc_or_t; + +/** + * @brief LIS2DW12 low power mode. + */ +typedef enum { + LIS2DW12_ACC_LP_MODE1 = 0x00, /**< Low-Power Mode 1, 12-bit */ + LIS2DW12_ACC_LP_MODE2 = 0x01, /**< Low-Power Mode 2, 14-bit */ + LIS2DW12_ACC_LP_MODE3 = 0x02, /**< Low-Power Mode 3, 14-bit */ + LIS2DW12_ACC_LP_MODE4 = 0x03, /**< Low-Power Mode 4, 14-bit */ +}lis2dw12_acc_lp_t; + +/** + * @brief LIS2DW12 Bandwidth selection. + */ +typedef enum { + LIS2DW12_ACC_BW_ODR2 = 0x00, /**< ODR/2. */ + LIS2DW12_ACC_BW_ODR4 = 0x40, /**< ODR/2. */ + LIS2DW12_ACC_BW_ODR10 = 0x80, /**< ODR/10. */ + LIS2DW12_ACC_BW_ODR20 = 0xC0, /**< ODR/20. */ +}lis2dw12_acc_bw_t; + +/** + * @brief LIS2DW12 full scale. + */ +typedef enum { + LIS2DW12_ACC_FS_2G = 0x00, /**< Full scale �2g. */ + LIS2DW12_ACC_FS_4G = 0x10, /**< Full scale �4g. */ + LIS2DW12_ACC_FS_8G = 0x20, /**< Full scale �8g. */ + LIS2DW12_ACC_FS_16G = 0x30 /**< Full scale �16g. */ +}lis2dw12_acc_fs_t; + +/** + * @brief Driver state machine possible states. + */ +typedef enum { + LIS2DW12_UNINIT = 0, /**< Not initialized. */ + LIS2DW12_STOP = 1, /**< Stopped. */ + LIS2DW12_READY = 2, /**< Ready. */ +} lis2dw12_state_t; + +/** + * @brief LIS2DW12 configuration structure. + */ +typedef struct { + +#if (LIS2DW12_USE_SPI) || defined(__DOXYGEN__) + /** + * @brief SPI driver associated to this LIS2DW12. + */ + SPIDriver *spip; + /** + * @brief SPI configuration associated to this LIS2DW12. + */ + const SPIConfig *spicfg; +#endif /* LIS2DW12_USE_SPI */ +#if (LIS2DW12_USE_I2C) || defined(__DOXYGEN__) + /** + * @brief I2C driver associated to this LIS2DW12. + */ + I2CDriver *i2cp; + /** + * @brief I2C configuration associated to this LIS2DW12. + */ + const I2CConfig *i2ccfg; +#endif /* LIS2DW12_USE_I2C */ + /** + * @brief LIS2DW12 accelerometer subsystem initial sensitivity. + */ + float *accsensitivity; + /** + * @brief LIS2DW12 accelerometer subsystem initial bias. + */ + float *accbias; + /** + * @brief LIS2DW12 output data rate selection. + */ + lis2dw12_acc_odr_t accoutputdatarate; + /** + * @brief LIS2DW12 output data resolution selection. + */ + lis2dw12_acc_or_t accoutputresolution; + /** + * @brief LIS2DW12 low power mode selection + */ + lis2dw12_acc_lp_t acclowpowermode; + /** + * @brief LIS2DW12 output bandwidth selection. + */ + lis2dw12_acc_bw_t accbadwidthselect; + /** + * @brief LIS2DW12 accelerometer subsystem initial full scale. + */ + lis2dw12_acc_fs_t accfullscale; +} LIS2DW12Config; + +/** + * @brief @p LIS2DW12 specific methods. + */ +#define _lis2dw12_methods_alone \ + /* Change full scale value of LIS2DW12 .*/ \ + msg_t (*set_full_scale)(LIS2DW12Driver *devp, lis2dw12_acc_fs_t fs); + + +/** + * @brief @p LIS2DW12 specific methods with inherited ones. + */ +#define _lis2dw12_methods \ + _base_object_methods \ + _lis2dw12_methods_alone + +/** + * @extends BaseObjectVMT + * + * @brief @p LIS2DW12 accelerometer virtual methods table. + */ +struct LIS2DW12VMT { + _lis2dw12_methods +}; + +/** + * @brief @p LIS2DW12Driver specific data. + */ +#define _lis2dw12_data \ + /* Driver state.*/ \ + lis2dw12_state_t state; \ + /* Current configuration data.*/ \ + const LIS2DW12Config *config; \ + /* Accelerometer subsystem axes number.*/ \ + size_t accaxes; \ + /* Current sensitivity.*/ \ + float accsensitivity[LIS2DW12_ACC_NUMBER_OF_AXES]; \ + /* Bias data.*/ \ + int32_t accbias[LIS2DW12_ACC_NUMBER_OF_AXES]; \ + /* Current full scale value.*/ \ + float accfullscale; + +/** + * @brief LIS2DW12 3-axis accelerometer class. + */ +struct LIS2DW12Driver { + /** @brief Virtual Methods Table.*/ + const struct LIS2DW12VMT *vmt; + /** @brief Base accelerometer interface.*/ + BaseAccelerometer acc_if; + _lis2dw12_data +}; +/** @} */ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Return the number of axes of the BaseAccelerometer. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * + * @return the number of axes. + * + * @api + */ +#define lis2dw12AccelerometerGetAxesNumber(devp) \ + accelerometerGetAxesNumber(&((devp)->acc_if)) + +/** + * @brief Retrieves raw data from the BaseAccelerometer. + * @note This data is retrieved from MEMS register without any algebraical + * manipulation. + * @note The axes array must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * @param[out] axes a buffer which would be filled with raw data. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. + * + * @api + */ +#define lis2dw12AccelerometerReadRaw(devp, axes) \ + accelerometerReadRaw(&((devp)->acc_if), axes) + +/** + * @brief Retrieves cooked data from the BaseAccelerometer. + * @note This data is manipulated according to the formula + * cooked = (raw * sensitivity) - bias. + * @note Final data is expressed as milli-G. + * @note The axes array must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * @param[out] axes a buffer which would be filled with cooked data. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. + * + * @api + */ +#define lis2dw12AccelerometerReadCooked(devp, axes) \ + accelerometerReadCooked(&((devp)->acc_if), axes) + +/** + * @brief Set bias values for the BaseAccelerometer. + * @note Bias must be expressed as milli-G. + * @note The bias buffer must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * @param[in] bp a buffer which contains biases. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * + * @api + */ +#define lis2dw12AccelerometerSetBias(devp, bp) \ + accelerometerSetBias(&((devp)->acc_if), bp) + +/** + * @brief Reset bias values for the BaseAccelerometer. + * @note Default biases value are obtained from device datasheet when + * available otherwise they are considered zero. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * + * @api + */ +#define lis2dw12AccelerometerResetBias(devp) \ + accelerometerResetBias(&((devp)->acc_if)) + +/** + * @brief Set sensitivity values for the BaseAccelerometer. + * @note Sensitivity must be expressed as milli-G/LSB. + * @note The sensitivity buffer must be at least the same size of the + * BaseAccelerometer axes number. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * @param[in] sp a buffer which contains sensitivities. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * + * @api + */ +#define lis2dw12AccelerometerSetSensitivity(devp, sp) \ + accelerometerSetSensitivity(&((devp)->acc_if), sp) + +/** + * @brief Reset sensitivity values for the BaseAccelerometer. + * @note Default sensitivities value are obtained from device datasheet. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET otherwise. + * + * @api + */ +#define lis2dw12AccelerometerResetSensitivity(devp) \ + accelerometerResetSensitivity(&((devp)->acc_if)) + +/** + * @brief Changes the LIS2DW12Driver accelerometer fullscale value. + * @note This function also rescale sensitivities and biases based on + * previous and next fullscale value. + * @note A recalibration is highly suggested after calling this function. + * + * @param[in] devp pointer to @p LIS2DW12Driver. + * @param[in] fs new fullscale value. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET otherwise. + * + * @api + */ +#define lis2dw12AccelerometerSetFullScale(devp, fs) \ + (devp)->vmt->acc_set_full_scale(devp, fs) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void lis2dw12ObjectInit(LIS2DW12Driver *devp); + msg_t lis2dw12Start(LIS2DW12Driver *devp, const LIS2DW12Config *config); + void lis2dw12Stop(LIS2DW12Driver *devp); +#ifdef __cplusplus +} +#endif + +#endif /* _LIS2DW12_H_ */ + +/** @} */ + diff --git a/os/ex/devices/ST/lis2dw12.mk b/os/ex/devices/ST/lis2dw12.mk new file mode 100644 index 000000000..07c555218 --- /dev/null +++ b/os/ex/devices/ST/lis2dw12.mk @@ -0,0 +1,10 @@ +# List of all the LIS3DSH device files. +LIS2DW12SRC := $(CHIBIOS)/os/ex/devices/ST/lis2dw12.c + +# Required include directories +LIS2DW12INC := $(CHIBIOS)/os/ex/include \ + $(CHIBIOS)/os/ex/devices/ST + +# Shared variables +ALLCSRC += $(LIS2DW12SRC) +ALLINC += $(LIS2DW12INC) \ No newline at end of file diff --git a/os/ex/devices/ST/lsm303agr.c b/os/ex/devices/ST/lsm303agr.c index 6a4c3cd6b..b563da5ce 100644 --- a/os/ex/devices/ST/lsm303agr.c +++ b/os/ex/devices/ST/lsm303agr.c @@ -54,6 +54,51 @@ typedef enum { /* Driver local functions. */ /*===========================================================================*/ +#if (LSM303AGR_USE_I2C == TRUE) +static void lsm303agrStartBus(const LSM303AGRConfig *config) { + i2cStart(config->i2cp, + config->i2ccfg); + osalDbgAssert((config->i2cp->state == I2C_READY), + "lsm303agr, channel not ready"); +} + +static void lsm303agrStopBus(const LSM303AGRConfig *config) { + i2cStop(config->i2cp); +} + +#if (LSM303AGR_SHARED_I2C == TRUE) +static void lsm303agrAccureBus(const LSM303AGRConfig *config) { + i2cAcquireBus(config->i2cp); +} + +static void lsm303agrReleaseBus(const LSM303AGRConfig *config) { + i2cReleaseBus(config->i2cp); +} +#endif +#endif + +#if (LSM303AGR_USE_SPI == TRUE) +static void lsm303agrStartBus(const LSM303AGRConfig *config) { + spiStart(config->spip, + config->spicfg); + osalDbgAssert((config->spip->state == SPI_READY), + "lsm303agr, channel not ready"); +} + +static void lsm303agrStopBus(const LSM303AGRConfig *config) { + spiStop(config->spip); +} +#if (LSM303AGR_SHARED_SPI == TRUE) +static void lsm303agrAccureBus(const LSM303AGRConfig *config) { + spiAcquireBus(config->spip); +} + +static void lsm303agrReleaseBus(const LSM303AGRConfig *config) { + spiReleaseBus(config->spip); +} +#endif +#endif + /** * @brief Reads registers value using I2C. * @pre The I2C interface must be initialized and the driver started. @@ -66,12 +111,27 @@ typedef enum { * @param[in] n size of rxbuf. * @return the operation status. */ -static msg_t lsm303agrI2CReadRegister(I2CDriver *i2cp, lsm303agr_sad_t sad, - uint8_t reg, uint8_t *rxbuf, size_t n) { - +static msg_t lsm303agrReadRegister(const LSM303AGRConfig *config, lsm303agr_sad_t sad, + uint8_t reg, uint8_t *rxbuf, size_t n) { +#if (LSM303AGR_USE_I2C == TRUE) uint8_t txbuf = reg | LSM303AGR_MS; - return i2cMasterTransmitTimeout(i2cp, sad, &txbuf, 1, rxbuf, n, + return i2cMasterTransmitTimeout(config->i2cp, sad, &txbuf, 1, rxbuf, n, TIME_INFINITE); +#endif +#if (LSM303AGR_USE_SPI == TRUE) + uint8_t cmd = (reg & LSM303AGR_SPI_AD_MASK) | LSM303AGR_SPI_MS | LSM303AGR_SPI_RD; + + /* SPI mode supports only Accel */ + if (sad != LSM303AGR_SAD_ACC) + return MSG_OK; + + spiSelect(config->spip); + spiSend(config->spip, 1, &cmd); + spiReceive(config->spip, n, rxbuf); + spiUnselect(config->spip); + + return MSG_OK; +#endif } /** @@ -86,12 +146,37 @@ static msg_t lsm303agrI2CReadRegister(I2CDriver *i2cp, lsm303agr_sad_t sad, * element). * @return the operation status. */ -static msg_t lsm303agrI2CWriteRegister(I2CDriver *i2cp, lsm303agr_sad_t sad, - uint8_t *txbuf, size_t n) { +static msg_t lsm303agrWriteRegister(const LSM303AGRConfig *config, lsm303agr_sad_t sad, + uint8_t reg, uint8_t *txdata, size_t n) { +#if (LSM303AGR_USE_I2C == TRUE) + int i; + uint8_t txbuf[1 + 8]; + + if (n > 8) + return MSG_RESET; + + txbuf[0] = reg; if (n != 1) - *txbuf |= LSM303AGR_MS; - return i2cMasterTransmitTimeout(i2cp, sad, txbuf, n + 1, NULL, 0, + txbuf[0] |= LSM303AGR_MS; + for (i = 0; i < n; i++) + txbuf[i + 1] = txdata[i]; + return i2cMasterTransmitTimeout(config->i2cp, sad, txbuf, n + 1, NULL, 0, TIME_INFINITE); +#endif +#if (LSM303AGR_USE_SPI == TRUE) + uint8_t cmd = (reg & LSM303AGR_SPI_AD_MASK) | LSM303AGR_SPI_MS; + + /* SPI mode supports only Accel */ + if (sad != LSM303AGR_SAD_ACC) + return MSG_OK; + + spiSelect(config->spip); + spiSend(config->spip, 1, &cmd); + spiSend(config->spip, n, txdata); + spiUnselect(config->spip); + + return MSG_OK; +#endif } /** @@ -136,22 +221,19 @@ static msg_t acc_read_raw(void *ip, int32_t axes[]) { osalDbgAssert((devp->state == LSM303AGR_READY), "acc_read_raw(), invalid state"); - osalDbgAssert((devp->config->i2cp->state == I2C_READY), - "acc_read_raw(), channel not ready"); -#if LSM303AGR_SHARED_I2C - i2cAcquireBus(devp->config->i2cp); - i2cStart(devp->config->i2cp, - devp->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrAccureBus(devp->config); + lsm303agrStartBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ - msg = lsm303agrI2CReadRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, - LSM303AGR_AD_OUT_X_L_A, buff, - LSM303AGR_ACC_NUMBER_OF_AXES * 2); + msg = lsm303agrReadRegister(devp->config, LSM303AGR_SAD_ACC, + LSM303AGR_AD_OUT_X_L_A, buff, + LSM303AGR_ACC_NUMBER_OF_AXES * 2); -#if LSM303AGR_SHARED_I2C - i2cReleaseBus(devp->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrReleaseBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ if(msg == MSG_OK) for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) { @@ -355,15 +437,13 @@ static msg_t acc_reset_sensivity(void *ip) { static msg_t acc_set_full_scale(LSM303AGRDriver *devp, lsm303agr_acc_fs_t fs) { float newfs, scale; - uint8_t i, buff[2]; + uint8_t i, buff[1]; msg_t msg; osalDbgCheck(devp != NULL); osalDbgAssert((devp->state == LSM303AGR_READY), "acc_set_full_scale(), invalid state"); - osalDbgAssert((devp->config->i2cp->state == I2C_READY), - "acc_set_full_scale(), channel not ready"); /* Computing new fullscale value.*/ if(fs == LSM303AGR_ACC_FS_2G) { @@ -388,40 +468,29 @@ static msg_t acc_set_full_scale(LSM303AGRDriver *devp, scale = newfs / devp->accfullscale; devp->accfullscale = newfs; -#if LSM303AGR_SHARED_I2C - i2cAcquireBus(devp->config->i2cp); - i2cStart(devp->config->i2cp, - devp->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrAccureBus(devp->config); + lsm303agrStartBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ /* Updating register.*/ - msg = lsm303agrI2CReadRegister(devp->config->i2cp, - LSM303AGR_SAD_ACC, - LSM303AGR_AD_CTRL_REG4_A, - &buff[1], 1); - -#if LSM303AGR_SHARED_I2C - i2cReleaseBus(devp->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ + msg = lsm303agrReadRegister(devp->config, + LSM303AGR_SAD_ACC, + LSM303AGR_AD_CTRL_REG4_A, + &buff[1], 1); if(msg != MSG_OK) return msg; - buff[1] &= ~(LSM303AGR_CTRL_REG4_A_FS_MASK); - buff[1] |= fs; - buff[0] = LSM303AGR_AD_CTRL_REG4_A; + buff[0] &= ~(LSM303AGR_CTRL_REG4_A_FS_MASK); + buff[0] |= fs; -#if LSM303AGR_SHARED_I2C - i2cAcquireBus(devp->config->i2cp); - i2cStart(devp->config->i2cp, devp->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ + msg = lsm303agrWriteRegister(devp->config, LSM303AGR_SAD_ACC, + LSM303AGR_AD_CTRL_REG4_A, buff, 1); - msg = lsm303agrI2CWriteRegister(devp->config->i2cp, - LSM303AGR_SAD_ACC, buff, 1); - -#if LSM303AGR_SHARED_I2C - i2cReleaseBus(devp->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrReleaseBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ if(msg != MSG_OK) return msg; @@ -477,21 +546,19 @@ static msg_t comp_read_raw(void *ip, int32_t axes[]) { osalDbgAssert((devp->state == LSM303AGR_READY), "comp_read_raw(), invalid state"); - osalDbgAssert((devp->config->i2cp->state == I2C_READY), - "comp_read_raw(), channel not ready"); -#if LSM303AGR_SHARED_I2C - i2cAcquireBus(devp->config->i2cp); - i2cStart(devp->config->i2cp, - devp->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ - msg = lsm303agrI2CReadRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - LSM303AGR_AD_OUTX_L_REG_M, buff, - LSM303AGR_COMP_NUMBER_OF_AXES * 2); +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrAccureBus(devp->config); + lsm303agrStartBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ -#if LSM303AGR_SHARED_I2C - i2cReleaseBus(devp->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ + msg = lsm303agrReadRegister(devp->config, LSM303AGR_SAD_COMP, + LSM303AGR_AD_OUTX_L_REG_M, buff, + LSM303AGR_COMP_NUMBER_OF_AXES * 2); + +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrReleaseBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ if(msg == MSG_OK) for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { @@ -708,9 +775,10 @@ void lsm303agrObjectInit(LSM303AGRDriver *devp) { * * @api */ -void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { +msg_t lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { uint32_t i; - uint8_t cr[6]; + uint8_t devid; + uint8_t cr[4]; osalDbgCheck((devp != NULL) && (config != NULL)); osalDbgAssert((devp->state == LSM303AGR_STOP) || @@ -721,36 +789,33 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { /* Configuring Accelerometer subsystem.*/ - /* Multiple write starting address.*/ - cr[0] = LSM303AGR_AD_CTRL_REG1_A; - /* Control register 1 configuration block.*/ { - cr[1] = LSM303AGR_ACC_AE_XYZ | devp->config->accoutdatarate; + cr[0] = LSM303AGR_ACC_AE_XYZ | devp->config->accoutdatarate; #if LSM303AGR_USE_ADVANCED || defined(__DOXYGEN__) if(devp->config->accmode == LSM303AGR_ACC_MODE_LPOW) - cr[1] |= LSM303AGR_CTRL_REG1_A_LPEN; + cr[0] |= LSM303AGR_CTRL_REG1_A_LPEN; #endif } /* Control register 2 configuration block.*/ { - cr[2] = 0; + cr[1] = 0; } /* Control register 3 configuration block.*/ { - cr[3] = 0; + cr[2] = 0; } /* Control register 4 configuration block.*/ { - cr[4] = devp->config->accfullscale; + cr[3] = devp->config->accfullscale; #if LSM303AGR_USE_ADVANCED || defined(__DOXYGEN__) - cr[4] |= devp->config->accendianess | + cr[3] |= devp->config->accendianess | devp->config->accblockdataupdate; if(devp->config->accmode == LSM303AGR_ACC_MODE_HRES) - cr[4] |= LSM303AGR_CTRL_REG4_A_HR; + cr[3] |= LSM303AGR_CTRL_REG4_A_HR; #endif } @@ -802,50 +867,48 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { for(i = 0; i < LSM303AGR_ACC_NUMBER_OF_AXES; i++) devp->accbias[i] = LSM303AGR_ACC_BIAS; -#if LSM303AGR_SHARED_I2C - i2cAcquireBus((devp)->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ - i2cStart((devp)->config->i2cp, (devp)->config->i2ccfg); +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrAccureBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ + lsm303agrStartBus(devp->config); - lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, cr, 4); + /* Check WHO_I_AM */ + lsm303agrReadRegister(devp->config, LSM303AGR_SAD_ACC, + LSM303AGR_AD_WHO_AM_I_A, &devid, 1); + if (devid != 0x33) + { + return MSG_RESET; + } -#if LSM303AGR_SHARED_I2C - i2cReleaseBus((devp)->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ + lsm303agrWriteRegister(devp->config, LSM303AGR_SAD_ACC, + LSM303AGR_AD_CTRL_REG1_A, cr, 4); /* Configuring Compass subsystem */ - /* Multiple write starting address.*/ - cr[0] = LSM303AGR_AD_CFG_REG_A_M; /* Control register A configuration block.*/ { - cr[1] = devp->config->compoutputdatarate; + cr[0] = devp->config->compoutputdatarate; #if LSM303AGR_USE_ADVANCED || defined(__DOXYGEN__) - cr[1] |= devp->config->compmode | devp->config->complp; + cr[0] |= devp->config->compmode | devp->config->complp; #endif } /* Control register B configuration block.*/ { - cr[2] = 0; + cr[1] = 0; } /* Control register C configuration block.*/ { - cr[3] = 0; + cr[2] = 0; } -#if LSM303AGR_SHARED_I2C - i2cAcquireBus((devp)->config->i2cp); - i2cStart((devp)->config->i2cp, (devp)->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ + lsm303agrWriteRegister(devp->config, LSM303AGR_SAD_COMP, + LSM303AGR_AD_CFG_REG_A_M, cr, 3); - lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - cr, 3); - -#if LSM303AGR_SHARED_I2C - i2cReleaseBus((devp)->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrReleaseBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ devp->compfullscale = LSM303AGR_COMP_50GA; for(i = 0; i < LSM303AGR_COMP_NUMBER_OF_AXES; i++) { @@ -861,6 +924,8 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { osalThreadSleepMilliseconds(5); devp->state = LSM303AGR_READY; + + return MSG_OK; } /** @@ -871,7 +936,7 @@ void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config) { * @api */ void lsm303agrStop(LSM303AGRDriver *devp) { - uint8_t cr[2]; + uint8_t cr[1]; osalDbgCheck(devp != NULL); osalDbgAssert((devp->state == LSM303AGR_STOP) || @@ -879,27 +944,25 @@ void lsm303agrStop(LSM303AGRDriver *devp) { "lsm303agrStop(), invalid state"); if (devp->state == LSM303AGR_READY) { -#if LSM303AGR_SHARED_I2C - i2cAcquireBus((devp)->config->i2cp); - i2cStart((devp)->config->i2cp, (devp)->config->i2ccfg); -#endif /* LSM303AGR_SHARED_I2C */ +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrAccureBus(devp->config); + lsm303agrStartBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ /* Disabling accelerometer. */ - cr[0] = LSM303AGR_AD_CTRL_REG1_A; - cr[1] = LSM303AGR_ACC_AE_DISABLED | LSM303AGR_ACC_ODR_PD; - lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_ACC, - cr, 1); + cr[0] = LSM303AGR_ACC_AE_DISABLED | LSM303AGR_ACC_ODR_PD; + lsm303agrWriteRegister(devp->config, LSM303AGR_SAD_ACC, + LSM303AGR_AD_CTRL_REG1_A, cr, 1); /* Disabling compass. */ - cr[0] = LSM303AGR_AD_CFG_REG_A_M; - cr[1] = LSM303AGR_COMP_MODE_IDLE; - lsm303agrI2CWriteRegister(devp->config->i2cp, LSM303AGR_SAD_COMP, - cr, 1); + cr[0] = LSM303AGR_COMP_MODE_IDLE; + lsm303agrWriteRegister(devp->config, LSM303AGR_SAD_COMP, + LSM303AGR_AD_CFG_REG_A_M, cr, 1); - i2cStop((devp)->config->i2cp); -#if LSM303AGR_SHARED_I2C - i2cReleaseBus((devp)->config->i2cp); -#endif /* LSM303AGR_SHARED_I2C */ + lsm303agrStopBus((devp)->config); +#if (LSM303AGR_SHARED_I2C == TRUE) || (LSM303AGR_SHARED_SPI == TRUE) + lsm303agrReleaseBus(devp->config); +#endif /* LSM303AGR_SHARED_I2C || LSM303AGR_SHARED_SPI */ } devp->state = LSM303AGR_STOP; } diff --git a/os/ex/devices/ST/lsm303agr.h b/os/ex/devices/ST/lsm303agr.h index 8bcb88a9d..c1e1fde5d 100644 --- a/os/ex/devices/ST/lsm303agr.h +++ b/os/ex/devices/ST/lsm303agr.h @@ -109,6 +109,10 @@ #define LSM303AGR_AD_MASK 0x7F #define LSM303AGR_AD(n) (1 << n) #define LSM303AGR_MS (1 << 7) + +#define LSM303AGR_SPI_AD_MASK (0x3f) +#define LSM303AGR_SPI_RD (1 << 7) +#define LSM303AGR_SPI_MS (1 << 6) /** @} */ /** @@ -381,13 +385,6 @@ #error "LSM303AGR_SHARED_I2C requires I2C_USE_MUTUAL_EXCLUSION" #endif -/* - * CHTODO: Add support for LSM303AGR over SPI. - */ -#if LSM303AGR_USE_SPI -#error "LSM303AGR over SPI still not supported" -#endif - /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -516,6 +513,17 @@ typedef enum { * @brief LSM303AGR configuration structure. */ typedef struct { +#if (LSM303AGR_USE_SPI) || defined(__DOXYGEN__) + /** + * @brief SPI driver associated to this LSM303AGR. + */ + SPIDriver *spip; + /** + * @brief SPI configuration associated to this LSM303AGR. + */ + const SPIConfig *spicfg; +#endif /* LIS2DW12_USE_SPI */ +#if (LSM303AGR_USE_I2C) || defined(__DOXYGEN__) /** * @brief I2C driver associated to this LSM303AGR. */ @@ -524,6 +532,7 @@ typedef struct { * @brief I2C configuration associated to this LSM303AGR. */ const I2CConfig *i2ccfg; +#endif /* LSM303AGR_USE_I2C */ /** * @brief LSM303AGR accelerometer subsystem initial sensitivity. */ @@ -910,7 +919,7 @@ struct LSM303AGRDriver { extern "C" { #endif void lsm303agrObjectInit(LSM303AGRDriver *devp); - void lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config); + msg_t lsm303agrStart(LSM303AGRDriver *devp, const LSM303AGRConfig *config); void lsm303agrStop(LSM303AGRDriver *devp); #ifdef __cplusplus } diff --git a/os/hal/include/hal_mmc_spi.h b/os/hal/include/hal_mmc_spi.h index 2d596dba3..6a2b3aced 100644 --- a/os/hal/include/hal_mmc_spi.h +++ b/os/hal/include/hal_mmc_spi.h @@ -55,6 +55,13 @@ #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) #define MMC_NICE_WAITING TRUE #endif + +/** + * @brief Mutual exclusion on the SPI bus. + */ +#if !defined(MMC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define MMC_USE_MUTUAL_EXCLUSION TRUE +#endif /** @} */ /*===========================================================================*/ @@ -65,6 +72,10 @@ #error "MMC_SPI driver requires HAL_USE_SPI and SPI_USE_WAIT" #endif +#if (MMC_USE_MUTUAL_EXCLUSION == TRUE) && (SPI_USE_MUTUAL_EXCLUSION == FALSE) +#error "MMC_USE_MUTUAL_EXCLUSION requires SPI_USE_MUTUAL_EXCLUSION" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/src/hal_mmc_spi.c b/os/hal/src/hal_mmc_spi.c index c9c5b8d79..65dcf76cd 100644 --- a/os/hal/src/hal_mmc_spi.c +++ b/os/hal/src/hal_mmc_spi.c @@ -80,24 +80,30 @@ void spiIgnoreSmall(SPIDriver* spip, size_t n) { /*===========================================================================*/ /* Forward declarations required by mmc_vmt.*/ +static bool mmc_is_card_inserted(void *instance); +static bool mmc_is_write_protected(void *instance); +static bool mmc_connect(void *instance); +static bool mmc_disconnect(void *instance); static bool mmc_read(void *instance, uint32_t startblk, uint8_t *buffer, uint32_t n); static bool mmc_write(void *instance, uint32_t startblk, const uint8_t *buffer, uint32_t n); +static bool mmc_sync(void *instance); +static bool mmc_get_info(void *instance, BlockDeviceInfo *bdip); /** * @brief Virtual methods table. */ static const struct MMCDriverVMT mmc_vmt = { (size_t)0, - (bool (*)(void *))mmc_lld_is_card_inserted, - (bool (*)(void *))mmc_lld_is_write_protected, - (bool (*)(void *))mmcConnect, - (bool (*)(void *))mmcDisconnect, + mmc_is_card_inserted, + mmc_is_write_protected, + mmc_connect, + mmc_disconnect, mmc_read, mmc_write, - (bool (*)(void *))mmcSync, - (bool (*)(void *, BlockDeviceInfo *))mmcGetInfo + mmc_sync, + mmc_get_info }; /** @@ -132,46 +138,154 @@ static const uint8_t crc7_lookup_table[256] = { /* Driver local functions. */ /*===========================================================================*/ +static bool mmc_is_card_inserted(void *instance) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err; + + err = mmcIsCardInserted(mmcp); + + return err; +} + +static bool mmc_is_write_protected(void *instance) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err; + + err = mmcIsWriteProtected(mmcp); + + return err; +} + +static bool mmc_connect(void *instance) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err; + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiAcquireBus(mmcp->config->spip); +#endif + + err = mmcConnect(mmcp); + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiReleaseBus(mmcp->config->spip); +#endif + + return err; +} + +static bool mmc_disconnect(void *instance) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err; + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiAcquireBus(mmcp->config->spip); +#endif + + err = mmcDisconnect(mmcp); + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiReleaseBus(mmcp->config->spip); +#endif + + return err; +} + static bool mmc_read(void *instance, uint32_t startblk, uint8_t *buffer, uint32_t n) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err = HAL_FAILED; - if (mmcStartSequentialRead((MMCDriver *)instance, startblk)) { - return HAL_FAILED; - } +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiAcquireBus(mmcp->config->spip); +#endif - while (n > 0U) { - if (mmcSequentialRead((MMCDriver *)instance, buffer)) { - return HAL_FAILED; + do { + if (mmcStartSequentialRead(mmcp, startblk)) { + break; } - buffer += MMCSD_BLOCK_SIZE; - n--; - } - if (mmcStopSequentialRead((MMCDriver *)instance)) { - return HAL_FAILED; - } - return HAL_SUCCESS; + while (n > 0U) { + if (mmcSequentialRead(mmcp, buffer)) { + break; + } + buffer += MMCSD_BLOCK_SIZE; + n--; + } + + if (mmcStopSequentialRead(mmcp)) { + break; + } + + err = HAL_SUCCESS; + } while (false); + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiReleaseBus(mmcp->config->spip); +#endif + + return err; } static bool mmc_write(void *instance, uint32_t startblk, const uint8_t *buffer, uint32_t n) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err = HAL_FAILED; - if (mmcStartSequentialWrite((MMCDriver *)instance, startblk)) { - return HAL_FAILED; - } +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiAcquireBus(mmcp->config->spip); +#endif - while (n > 0U) { - if (mmcSequentialWrite((MMCDriver *)instance, buffer)) { - return HAL_FAILED; + do { + if (mmcStartSequentialWrite(mmcp, startblk)) { + break; } - buffer += MMCSD_BLOCK_SIZE; - n--; - } - if (mmcStopSequentialWrite((MMCDriver *)instance)) { - return HAL_FAILED; - } - return HAL_SUCCESS; + while (n > 0U) { + if (mmcSequentialWrite(mmcp, buffer)) { + break; + } + buffer += MMCSD_BLOCK_SIZE; + n--; + } + + if (mmcStopSequentialWrite(mmcp)) { + break; + } + + err = HAL_SUCCESS; + } while (false); + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiReleaseBus(mmcp->config->spip); +#endif + + return err; +} + +static bool mmc_sync(void *instance) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err; + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiAcquireBus(mmcp->config->spip); +#endif + + err = mmcSync(mmcp); + +#if MMC_USE_MUTUAL_EXCLUSION == TRUE + spiReleaseBus(mmcp->config->spip); +#endif + + return err; +} + +static bool mmc_get_info(void *instance, BlockDeviceInfo *bdip) { + MMCDriver *mmcp = (MMCDriver *)instance; + bool err; + + err = mmcGetInfo(mmcp, bdip); + + return err; } /** @@ -198,14 +312,14 @@ static uint8_t crc7(uint8_t crc, const uint8_t *buffer, size_t len) { * * @notapi */ -static void wait(MMCDriver *mmcp) { +static bool mmc_wait_idle(MMCDriver *mmcp) { int i; uint8_t buf[4]; for (i = 0; i < 16; i++) { spiReceiveSmall(mmcp->config->spip, 1, buf); - if (buf[0] == 0xFFU) { - return; + if (buf[0] == 0xFFU) { + return HAL_SUCCESS; } } #if MMC_NICE_WAITING == TRUE @@ -216,7 +330,7 @@ static void wait(MMCDriver *mmcp) { while (true) { spiReceiveSmall(mmcp->config->spip, 1, buf); if (buf[0] == 0xFFU) { - break; + return HAL_SUCCESS; } #if MMC_NICE_WAITING == TRUE /* Trying to be nice with the other threads.*/ @@ -227,6 +341,8 @@ static void wait(MMCDriver *mmcp) { } #endif } + + return HAL_FAILED; } /** @@ -242,7 +358,7 @@ static void send_hdr(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) { uint8_t buf[6]; /* Wait for the bus to become idle if a write operation was in progress.*/ - wait(mmcp); + mmc_wait_idle(mmcp); buf[0] = (uint8_t)0x40U | cmd; buf[1] = (uint8_t)(arg >> 24U); @@ -389,37 +505,6 @@ static bool read_CxD(MMCDriver *mmcp, uint8_t cmd, uint32_t cxd[4]) { return HAL_FAILED; } -/** - * @brief Waits that the card reaches an idle state. - * - * @param[in] mmcp pointer to the @p MMCDriver object - * - * @notapi - */ -static void sync(MMCDriver *mmcp) { - uint8_t buf[1]; - - spiSelect(mmcp->config->spip); -#if MMC_NICE_WAITING == TRUE - int waitCounter = 0; -#endif - while (true) { - spiReceiveSmall(mmcp->config->spip, 1, buf); - if (buf[0] == 0xFFU) { - break; - } -#if MMC_NICE_WAITING == TRUE - /* Trying to be nice with the other threads.*/ - osalThreadSleepMilliseconds(1); - if (++waitCounter == MMC_WAIT_RETRY) { - // it's time to give up, this MMC card is not working property - break; - } -#endif - } - spiUnselect(mmcp->config->spip); -} - /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ @@ -626,10 +711,12 @@ failed: * @api */ bool mmcDisconnect(MMCDriver *mmcp) { + bool result; osalDbgCheck(mmcp != NULL); osalSysLock(); + osalDbgAssert((mmcp->state == BLK_ACTIVE) || (mmcp->state == BLK_READY), "invalid state"); if (mmcp->state == BLK_ACTIVE) { @@ -641,11 +728,16 @@ bool mmcDisconnect(MMCDriver *mmcp) { /* Wait for the pending write operations to complete.*/ spiStart(mmcp->config->spip, mmcp->config->hscfg); - sync(mmcp); + spiSelect(mmcp->config->spip); + result = mmc_wait_idle(mmcp); + + spiUnselect(mmcp->config->spip); spiStop(mmcp->config->spip); + mmcp->state = BLK_ACTIVE; - return HAL_SUCCESS; + + return result; } /** @@ -878,7 +970,7 @@ bool mmcSequentialWrite(MMCDriver *mmcp, const uint8_t *buffer) { spiIgnoreSmall(mmcp->config->spip, 2); /* CRC ignored. */ spiReceiveSmall(mmcp->config->spip, 1, b); if ((b[0] & 0x1FU) == 0x05U) { - wait(mmcp); + mmc_wait_idle(mmcp); return HAL_SUCCESS; } @@ -929,6 +1021,7 @@ bool mmcStopSequentialWrite(MMCDriver *mmcp) { * @api */ bool mmcSync(MMCDriver *mmcp) { + bool result; osalDbgCheck(mmcp != NULL); @@ -940,11 +1033,16 @@ bool mmcSync(MMCDriver *mmcp) { mmcp->state = BLK_SYNCING; spiStart(mmcp->config->spip, mmcp->config->hscfg); - sync(mmcp); + spiSelect(mmcp->config->spip); + + result = mmc_wait_idle(mmcp); + + spiUnselect(mmcp->config->spip); /* Synchronization operation finished.*/ mmcp->state = BLK_READY; - return HAL_SUCCESS; + + return result; } /** diff --git a/os/various/fatfs_bindings/fatfs_diskio.c b/os/various/fatfs_bindings/fatfs_diskio.c index ef0474634..fb3fd9947 100644 --- a/os/various/fatfs_bindings/fatfs_diskio.c +++ b/os/various/fatfs_bindings/fatfs_diskio.c @@ -37,10 +37,6 @@ extern RTCDriver RTCD1; /*-----------------------------------------------------------------------*/ /* Correspondence between physical drive number and physical drive. */ -#define MMC 0 -#define SDC 0 - - /*-----------------------------------------------------------------------*/ /* Inidialize a Drive */ @@ -52,25 +48,14 @@ DSTATUS disk_initialize ( DSTATUS stat; switch (pdrv) { -#if HAL_USE_MMC_SPI - case MMC: + case 0: stat = 0; /* It is initialized externally, just reads the status.*/ if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) stat |= STA_NOINIT; - if (mmcIsWriteProtected(&FATFS_HAL_DEVICE)) - stat |= STA_PROTECT; + if (blkIsWriteProtected(&FATFS_HAL_DEVICE)) + stat |= STA_PROTECT; return stat; -#else - case SDC: - stat = 0; - /* It is initialized externally, just reads the status.*/ - if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) - stat |= STA_NOINIT; - if (sdcIsWriteProtected(&FATFS_HAL_DEVICE)) - stat |= STA_PROTECT; - return stat; -#endif } return STA_NOINIT; } @@ -87,25 +72,14 @@ DSTATUS disk_status ( DSTATUS stat; switch (pdrv) { -#if HAL_USE_MMC_SPI - case MMC: + case 0: stat = 0; /* It is initialized externally, just reads the status.*/ if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) stat |= STA_NOINIT; - if (mmcIsWriteProtected(&FATFS_HAL_DEVICE)) + if (blkIsWriteProtected(&FATFS_HAL_DEVICE)) stat |= STA_PROTECT; return stat; -#else - case SDC: - stat = 0; - /* It is initialized externally, just reads the status.*/ - if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) - stat |= STA_NOINIT; - if (sdcIsWriteProtected(&FATFS_HAL_DEVICE)) - stat |= STA_PROTECT; - return stat; -#endif } return STA_NOINIT; } @@ -123,29 +97,12 @@ DRESULT disk_read ( ) { switch (pdrv) { -#if HAL_USE_MMC_SPI - case MMC: + case 0: if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; - if (mmcStartSequentialRead(&FATFS_HAL_DEVICE, sector)) - return RES_ERROR; - while (count > 0) { - if (mmcSequentialRead(&FATFS_HAL_DEVICE, buff)) - return RES_ERROR; - buff += MMCSD_BLOCK_SIZE; - count--; - } - if (mmcStopSequentialRead(&FATFS_HAL_DEVICE)) - return RES_ERROR; - return RES_OK; -#else - case SDC: - if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) - return RES_NOTRDY; - if (sdcRead(&FATFS_HAL_DEVICE, sector, buff, count)) + if (blkRead(&FATFS_HAL_DEVICE, sector, buff, count)) return RES_ERROR; return RES_OK; -#endif } return RES_PARERR; } @@ -164,31 +121,12 @@ DRESULT disk_write ( ) { switch (pdrv) { -#if HAL_USE_MMC_SPI - case MMC: - if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) - return RES_NOTRDY; - if (mmcIsWriteProtected(&FATFS_HAL_DEVICE)) - return RES_WRPRT; - if (mmcStartSequentialWrite(&FATFS_HAL_DEVICE, sector)) - return RES_ERROR; - while (count > 0) { - if (mmcSequentialWrite(&FATFS_HAL_DEVICE, buff)) - return RES_ERROR; - buff += MMCSD_BLOCK_SIZE; - count--; - } - if (mmcStopSequentialWrite(&FATFS_HAL_DEVICE)) - return RES_ERROR; - return RES_OK; -#else - case SDC: + case 0: if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; - if (sdcWrite(&FATFS_HAL_DEVICE, sector, buff, count)) + if (blkWrite(&FATFS_HAL_DEVICE, sector, buff, count)) return RES_ERROR; return RES_OK; -#endif } return RES_PARERR; } @@ -205,52 +143,40 @@ DRESULT disk_ioctl ( void *buff /* Buffer to send/receive control data */ ) { + BlockDeviceInfo bdi; + (void)buff; switch (pdrv) { -#if HAL_USE_MMC_SPI - case MMC: + case 0: switch (cmd) { case CTRL_SYNC: - return RES_OK; -#if FF_MAX_SS > FF_MIN_SS - case GET_SECTOR_SIZE: - *((WORD *)buff) = MMCSD_BLOCK_SIZE; - return RES_OK; -#endif -#if FF_USE_TRIM - case CTRL_TRIM: - mmcErase(&FATFS_HAL_DEVICE, *((DWORD *)buff), *((DWORD *)buff + 1)); - return RES_OK; -#endif - default: - return RES_PARERR; - } -#else - case SDC: - switch (cmd) { - case CTRL_SYNC: - return RES_OK; + return RES_OK; case GET_SECTOR_COUNT: - *((DWORD *)buff) = mmcsdGetCardCapacity(&FATFS_HAL_DEVICE); - return RES_OK; + if (blkGetInfo(&FATFS_HAL_DEVICE, &bdi)) { + return RES_ERROR; + } + *((DWORD *)buff) = bdi.blk_num; + return RES_OK; #if FF_MAX_SS > FF_MIN_SS case GET_SECTOR_SIZE: - *((WORD *)buff) = MMCSD_BLOCK_SIZE; - return RES_OK; + if (blkGetInfo(&FATFS_HAL_DEVICE, &bdi)) { + return RES_ERROR; + } + *((WORD *)buff) = bdi.blk_size; + return RES_OK; #endif - case GET_BLOCK_SIZE: - *((DWORD *)buff) = 256; /* 512b blocks in one erase block */ - return RES_OK; #if FF_USE_TRIM + case GET_BLOCK_SIZE: + /* unsupported */ + break; case CTRL_TRIM: - sdcErase(&FATFS_HAL_DEVICE, *((DWORD *)buff), *((DWORD *)buff + 1)); - return RES_OK; + /* unsupported */ + break; #endif default: - return RES_PARERR; + return RES_PARERR; } -#endif } return RES_PARERR; }