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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2059 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-07-06 08:50:11 +00:00
parent 2376fbb2af
commit 94b40d58b1
3 changed files with 150 additions and 135 deletions
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149
os/hal/platforms/STM32/hal_lld_f103.h
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@ -14,7 +14,7 @@
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. along with this program. If not, see <http:/**<www.gnu.org/licenses/>.
*/ */
/** /**
@ -79,78 +79,83 @@
#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */ #define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */ #define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
/* Platform specific friendly IRQ names */ /*===========================================================================*/
#define WWDG_IRQHandler Vector40 // Window Watchdog /* Platform specific friendly IRQ names. */
#define PVD_IRQHandler Vector44 // PVD through EXTI Line detect /*===========================================================================*/
#define TAMPER_IRQHandler Vector48 // Tamper
#define RTC_IRQHandler Vector4C // RTC
#define FLASH_IRQHandler Vector50 // Flash
#define RCC_IRQHandler Vector54 // RCC
#define EXTI0_IRQHandler Vector58 // EXTI Line 0
#define EXTI1_IRQHandler Vector5C // EXTI Line 1
#define EXTI2_IRQHandler Vector60 // EXTI Line 2
#define EXTI3_IRQHandler Vector64 // EXTI Line 3
#define EXTI4_IRQHandler Vector68 // EXTI Line 4
#define DMA1_Channel1_IRQHandler Vector6C // DMA1 Channel 1
#define DMA1_Channel2_IRQHandler Vector70 // DMA1 Channel 2
#define DMA1_Channel3_IRQHandler Vector74 // DMA1 Channel 3
#define DMA1_Channel4_IRQHandler Vector78 // DMA1 Channel 4
#define DMA1_Channel5_IRQHandler Vector7C // DMA1 Channel 5
#define DMA1_Channel6_IRQHandler Vector80 // DMA1 Channel 6
#define DMA1_Channel7_IRQHandler Vector84 // DMA1 Channel 7
#define ADC1_2_IRQHandler Vector88 // ADC1_2
#define USB_HP_CAN1_TX_IRQHandler Vector8C // USB High Priority or CAN1 TX
#define USB_LP_CAN1_RX0_IRQHandler Vector90 // USB Low Priority or CAN1 RX0
#define CAN1_RX1_IRQHandler Vector94 // CAN1 RX1
#define CAN1_SCE_IRQHandler Vector98 // CAN1 SCE
#define EXTI9_5_IRQHandler Vector9C // EXTI Line 9..5
#define TIM1_BRK_IRQHandler VectorA0 // TIM1 Break
#define TIM1_UP_IRQHandler VectorA4 // TIM1 Update
#define TIM1_TRG_COM_IRQHandler VectorA8 // TIM1 Trigger and Commutation
#define TIM1_CC_IRQHandler VectorAC // TIM1 Capture Compare
#define TIM2_IRQHandler VectorB0 // TIM2
#define TIM3_IRQHandler VectorB4 // TIM3
#if defined(STM32F10X_MD) || defined(STM32F10X_HD)
#define TIM4_IRQHandler VectorB8 // TIM4
#endif
#define I2C1_EV_IRQHandler VectorBC // I2C1 Event
#define I2C1_ER_IRQHandler VectorC0 // I2C1 Error
#if defined(STM32F10X_MD) || defined(STM32F10X_HD)
#define I2C2_EV_IRQHandler VectorC4 // I2C2 Event
#define I2C2_ER_IRQHandler VectorC8 // I2C2 Error
#endif
#define SPI1_IRQHandler VectorCC // SPI1
#if defined(STM32F10X_MD) || defined(STM32F10X_HD)
#define SPI2_IRQHandler VectorD0 // SPI2
#endif
#define USART1_IRQHandler VectorD4 // USART1
#define USART2_IRQHandler VectorD8 // USART2
#if defined(STM32F10X_MD) || defined(STM32F10X_HD)
#define USART3_IRQHandler VectorDC // USART3
#endif
#define EXTI15_10_IRQHandler VectorE0 // EXTI Line 15..10
#define RTCAlarm_IRQHandler VectorE4 // RTC Alarm through EXTI Line
#define USBWakeUp_IRQHandler VectorE8 // USB Wakeup from suspend
#if defined(STM32F10X_HD)
#define TIM8_BRK_IRQHandler VectorEC // TIM8 Break
#define TIM8_UP_IRQHandler VectorF0 // TIM8 Update
#define TIM8_TRG_COM_IRQHandler VectorF4 // TIM8 Trigger and Commutation
#define TIM8_CC_IRQHandler VectorF8 // TIM8 Capture Compare
#define ADC3_IRQHandler VectorFC // ADC3
#define FSMC_IRQHandler Vector100 // FSMC
#define SDIO_IRQHandler Vector104 // SDIO
#define TIM5_IRQHandler Vector108 // TIM5
#define SPI3_IRQHandler Vector10C // SPI3
#define UART4_IRQHandler Vector110 // UART4
#define UART5_IRQHandler Vector114 // UART5
#define TIM6_IRQHandler Vector118 // TIM6
#define TIM7_IRQHandler Vector11C // TIM7
#define DMA2_Channel1_IRQHandler Vector120 // DMA2 Channel1
#define DMA2_Channel2_IRQHandler Vector124 // DMA2 Channel2
#define DMA2_Channel3_IRQHandler Vector128 // DMA2 Channel3
#define DMA2_Channel4_5_IRQHandler Vector12C // DMA2 Channel4 & Channel5
#endif
#define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
#define PVD_IRQHandler Vector44 /**< PVD through EXTI Line
detect. */
#define TAMPER_IRQHandler Vector48 /**< Tamper. */
#define RTC_IRQHandler Vector4C /**< RTC. */
#define FLASH_IRQHandler Vector50 /**< Flash. */
#define RCC_IRQHandler Vector54 /**< RCC. */
#define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
#define EXTI1_IRQHandler Vector5C /**< EXTI Line 1. */
#define EXTI2_IRQHandler Vector60 /**< EXTI Line 2. */
#define EXTI3_IRQHandler Vector64 /**< EXTI Line 3. */
#define EXTI4_IRQHandler Vector68 /**< EXTI Line 4. */
#define DMA1_Ch1_IRQHandler Vector6C /**< DMA1 Channel 1. */
#define DMA1_Ch2_IRQHandler Vector70 /**< DMA1 Channel 2. */
#define DMA1_Ch3_IRQHandler Vector74 /**< DMA1 Channel 3. */
#define DMA1_Ch4_IRQHandler Vector78 /**< DMA1 Channel 4. */
#define DMA1_Ch5_IRQHandler Vector7C /**< DMA1 Channel 5. */
#define DMA1_Ch6_IRQHandler Vector80 /**< DMA1 Channel 6. */
#define DMA1_Ch7_IRQHandler Vector84 /**< DMA1 Channel 7. */
#define ADC1_2_IRQHandler Vector88 /**< ADC1_2. */
#define USB_HP_CAN1_TX_IRQHandler Vector8C /**< USB High Priority, CAN1 TX.*/
#define USB_LP_CAN1_RX0_IRQHandler Vector90 /**< USB Low Priority, CAN1 RX0.*/
#define CAN1_RX1_IRQHandler Vector94 /**< CAN1 RX1. */
#define CAN1_SCE_IRQHandler Vector98 /**< CAN1 SCE. */
#define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
#define TIM1_BRK_IRQHandler VectorA0 /**< TIM1 Break. */
#define TIM1_UP_IRQHandler VectorA4 /**< TIM1 Update. */
#define TIM1_TRG_COM_IRQHandler VectorA8 /**< TIM1 Trigger and
Commutation. */
#define TIM1_CC_IRQHandler VectorAC /**< TIM1 Capture Compare. */
#define TIM2_IRQHandler VectorB0 /**< TIM2. */
#define TIM3_IRQHandler VectorB4 /**< TIM3. */
#if defined(STM32F10X_MD) || defined(STM32F10X_HD) || defined(__DOXYGEN__)
#define TIM4_IRQHandler VectorB8 /**< TIM4. */
#endif
#define I2C1_EV_IRQHandler VectorBC /**< I2C1 Event. */
#define I2C1_ER_IRQHandler VectorC0 /**< I2C1 Error. */
#if defined(STM32F10X_MD) || defined(STM32F10X_HD) || defined(__DOXYGEN__)
#define I2C2_EV_IRQHandler VectorC4 /**< I2C2 Event. */
#define I2C2_ER_IRQHandler VectorC8 /**< I2C2 Error. */
#endif
#define SPI1_IRQHandler VectorCC /**< SPI1. */
#if defined(STM32F10X_MD) || defined(STM32F10X_HD) || defined(__DOXYGEN__)
#define SPI2_IRQHandler VectorD0 /**< SPI2. */
#endif
#define USART1_IRQHandler VectorD4 /**< USART1. */
#define USART2_IRQHandler VectorD8 /**< USART2. */
#if defined(STM32F10X_MD) || defined(STM32F10X_HD) || defined(__DOXYGEN__)
#define USART3_IRQHandler VectorDC /**< USART3. */
#endif
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
#define USBWakeUp_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
#define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */
#define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */
#define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and
Commutation. */
#define TIM8_CC_IRQHandler VectorF8 /**< TIM8 Capture Compare. */
#define ADC3_IRQHandler VectorFC /**< ADC3. */
#define FSMC_IRQHandler Vector100 /**< FSMC. */
#define SDIO_IRQHandler Vector104 /**< SDIO. */
#define TIM5_IRQHandler Vector108 /**< TIM5. */
#define SPI3_IRQHandler Vector10C /**< SPI3. */
#define UART4_IRQHandler Vector110 /**< UART4. */
#define UART5_IRQHandler Vector114 /**< UART5. */
#define TIM6_IRQHandler Vector118 /**< TIM6. */
#define TIM7_IRQHandler Vector11C /**< TIM7. */
#define DMA2_Ch1_IRQHandler Vector120 /**< DMA2 Channel1. */
#define DMA2_Ch2_IRQHandler Vector124 /**< DMA2 Channel2. */
#define DMA2_Ch3_IRQHandler Vector128 /**< DMA2 Channel3. */
#define DMA2_Ch4_5_IRQHandler Vector12C /**< DMA2 Channel4 & Channel5. */
#endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */

134
os/hal/platforms/STM32/hal_lld_f105_f107.h
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@ -14,7 +14,7 @@
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. along with this program. If not, see <http:/**<www.gnu.org/licenses/>.
*/ */
/** /**
@ -88,68 +88,76 @@
#define STM32_PREDIV1SRC_HSE (0 << 16) /**< PREDIV1 source is HSE. */ #define STM32_PREDIV1SRC_HSE (0 << 16) /**< PREDIV1 source is HSE. */
#define STM32_PREDIV1SRC_PLL2 (1 << 16) /**< PREDIV1 source is PLL2. */ #define STM32_PREDIV1SRC_PLL2 (1 << 16) /**< PREDIV1 source is PLL2. */
/* Platform specific friendly IRQ vector names */ /*===========================================================================*/
#define WWDG_IRQHandler Vector40 // Window Watchdog /* Platform specific friendly IRQ names. */
#define PVD_IRQHandler Vector44 // PVD through EXTI Line detect /*===========================================================================*/
#define TAMPER_IRQHandler Vector48 // Tamper
#define RTC_IRQHandler Vector4C // RTC #define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
#define FLASH_IRQHandler Vector50 // Flash #define PVD_IRQHandler Vector44 /**< PVD through EXTI Line
#define RCC_IRQHandler Vector54 // RCC detect. */
#define EXTI0_IRQHandler Vector58 // EXTI Line 0 #define TAMPER_IRQHandler Vector48 /**< Tamper. */
#define EXTI1_IRQHandler Vector5C // EXTI Line 1 #define RTC_IRQHandler Vector4C /**< RTC. */
#define EXTI2_IRQHandler Vector60 // EXTI Line 2 #define FLASH_IRQHandler Vector50 /**< Flash. */
#define EXTI3_IRQHandler Vector64 // EXTI Line 3 #define RCC_IRQHandler Vector54 /**< RCC. */
#define EXTI4_IRQHandler Vector68 // EXTI Line 4 #define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
#define DMA1_Channel1_IRQHandler Vector6C // DMA1 Channel 1 #define EXTI1_IRQHandler Vector5C /**< EXTI Line 1. */
#define DMA1_Channel2_IRQHandler Vector70 // DMA1 Channel 2 #define EXTI2_IRQHandler Vector60 /**< EXTI Line 2. */
#define DMA1_Channel3_IRQHandler Vector74 // DMA1 Channel 3 #define EXTI3_IRQHandler Vector64 /**< EXTI Line 3. */
#define DMA1_Channel4_IRQHandler Vector78 // DMA1 Channel 4 #define EXTI4_IRQHandler Vector68 /**< EXTI Line 4. */
#define DMA1_Channel5_IRQHandler Vector7C // DMA1 Channel 5 #define DMA1_Ch1_IRQHandler Vector6C /**< DMA1 Channel 1. */
#define DMA1_Channel6_IRQHandler Vector80 // DMA1 Channel 6 #define DMA1_Ch2_IRQHandler Vector70 /**< DMA1 Channel 2. */
#define DMA1_Channel7_IRQHandler Vector84 // DMA1 Channel 7 #define DMA1_Ch3_IRQHandler Vector74 /**< DMA1 Channel 3. */
#define ADC1_2_IRQHandler Vector88 // ADC1 and ADC2 #define DMA1_Ch4_IRQHandler Vector78 /**< DMA1 Channel 4. */
#define CAN1_TX_IRQHandler Vector8C // CAN1 TX #define DMA1_Ch5_IRQHandler Vector7C /**< DMA1 Channel 5. */
#define CAN1_RX0_IRQHandler Vector90 // CAN1 RX0 #define DMA1_Ch6_IRQHandler Vector80 /**< DMA1 Channel 6. */
#define CAN1_RX1_IRQHandler Vector94 // CAN1 RX1 #define DMA1_Ch7_IRQHandler Vector84 /**< DMA1 Channel 7. */
#define CAN1_SCE_IRQHandler Vector98 // CAN1 SCE #define ADC1_2_IRQHandler Vector88 /**< ADC1 and ADC2. */
#define EXTI9_5_IRQHandler Vector9C // EXTI Line 9..5 #define CAN1_TX_IRQHandler Vector8C /**< CAN1 TX. */
#define TIM1_BRK_IRQHandler VectorA0 // TIM1 Break #define CAN1_RX0_IRQHandler Vector90 /**< CAN1 RX0. */
#define TIM1_UP_IRQHandler VectorA4 // TIM1 Update #define CAN1_RX1_IRQHandler Vector94 /**< CAN1 RX1. */
#define TIM1_TRG_COM_IRQHandler VectorA8 // TIM1 Trigger and Commutation #define CAN1_SCE_IRQHandler Vector98 /**< CAN1 SCE. */
#define TIM1_CC_IRQHandler VectorAC // TIM1 Capture Compare #define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
#define TIM2_IRQHandler VectorB0 // TIM2 #define TIM1_BRK_IRQHandler VectorA0 /**< TIM1 Break. */
#define TIM3_IRQHandler VectorB4 // TIM3 #define TIM1_UP_IRQHandler VectorA4 /**< TIM1 Update. */
#define TIM4_IRQHandler VectorB8 // TIM4 #define TIM1_TRG_COM_IRQHandler VectorA8 /**< TIM1 Trigger and
#define I2C1_EV_IRQHandler VectorBC // I2C1 Event Commutation. */
#define I2C1_ER_IRQHandler VectorC0 // I2C1 Error #define TIM1_CC_IRQHandler VectorAC /**< TIM1 Capture Compare. */
#define I2C2_EV_IRQHandler VectorC4 // I2C2 Event #define TIM2_IRQHandler VectorB0 /**< TIM2. */
#define I2C2_ER_IRQHandler VectorC8 // I2C1 Error #define TIM3_IRQHandler VectorB4 /**< TIM3. */
#define SPI1_IRQHandler VectorCC // SPI1 #define TIM4_IRQHandler VectorB8 /**< TIM4. */
#define SPI2_IRQHandler VectorD0 // SPI2 #define I2C1_EV_IRQHandler VectorBC /**< I2C1 Event. */
#define USART1_IRQHandler VectorD4 // USART1 #define I2C1_ER_IRQHandler VectorC0 /**< I2C1 Error. */
#define USART2_IRQHandler VectorD8 // USART2 #define I2C2_EV_IRQHandler VectorC4 /**< I2C2 Event. */
#define USART3_IRQHandler VectorDC // USART3 #define I2C2_ER_IRQHandler VectorC8 /**< I2C1 Error. */
#define EXTI15_10_IRQHandler VectorE0 // EXTI Line 15..10 #define SPI1_IRQHandler VectorCC /**< SPI1. */
#define RTCAlarm_IRQHandler VectorE4 // RTC alarm through EXTI line #define SPI2_IRQHandler VectorD0 /**< SPI2. */
#define OTG_FS_WKUP_IRQHandler VectorE8 // USB OTG FS Wakeup through EXTI line #define USART1_IRQHandler VectorD4 /**< USART1. */
#define TIM5_IRQHandler Vector108 // TIM5 #define USART2_IRQHandler VectorD8 /**< USART2. */
#define SPI3_IRQHandler Vector10C // SPI3 #define USART3_IRQHandler VectorDC /**< USART3. */
#define UART4_IRQHandler Vector110 // UART4 #define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
#define UART5_IRQHandler Vector114 // UART5 #define RTCAlarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
#define TIM6_IRQHandler Vector118 // TIM6 line. */
#define TIM7_IRQHandler Vector11C // TIM7 #define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through
#define DMA2_Channel1_IRQHandler Vector120 // DMA2 Channel1 EXTI line. */
#define DMA2_Channel2_IRQHandler Vector124 // DMA2 Channel2 #define TIM5_IRQHandler Vector108 /**< TIM5. */
#define DMA2_Channel3_IRQHandler Vector128 // DMA2 Channel3 #define SPI3_IRQHandler Vector10C /**< SPI3. */
#define DMA2_Channel4_IRQHandler Vector12C // DMA2 Channel4 #define UART4_IRQHandler Vector110 /**< UART4. */
#define DMA2_Channel5_IRQHandler Vector130 // DMA2 Channel5 #define UART5_IRQHandler Vector114 /**< UART5. */
#define ETH_IRQHandler Vector134 // Ethernet #define TIM6_IRQHandler Vector118 /**< TIM6. */
#define ETH_WKUP_IRQHandler Vector138 // Ethernet Wakeup through EXTI line #define TIM7_IRQHandler Vector11C /**< TIM7. */
#define CAN2_TX_IRQHandler Vector13C // CAN2 TX #define DMA2_Ch1_IRQHandler Vector120 /**< DMA2 Channel1. */
#define CAN2_RX0_IRQHandler Vector140 // CAN2 RX0 #define DMA2_Ch2_IRQHandler Vector124 /**< DMA2 Channel2. */
#define CAN2_RX1_IRQHandler Vector144 // CAN2 RX1 #define DMA2_Ch3_IRQHandler Vector128 /**< DMA2 Channel3. */
#define CAN2_SCE_IRQHandler Vector148 // CAN2 SCE #define DMA2_Ch4_IRQHandler Vector12C /**< DMA2 Channel4. */
#define OTG_FS_IRQHandler Vector14C // USB OTG FS #define DMA2_Ch5_IRQHandler Vector130 /**< DMA2 Channel5. */
#define ETH_IRQHandler Vector134 /**< Ethernet. */
#define ETH_WKUP_IRQHandler Vector138 /**< Ethernet Wakeup through
EXTI line. */
#define CAN2_TX_IRQHandler Vector13C /**< CAN2 TX. */
#define CAN2_RX0_IRQHandler Vector140 /**< CAN2 RX0. */
#define CAN2_RX1_IRQHandler Vector144 /**< CAN2 RX1. */
#define CAN2_SCE_IRQHandler Vector148 /**< CAN2 SCE. */
#define OTG_FS_IRQHandler Vector14C /**< USB OTG FS. */
/*===========================================================================*/ /*===========================================================================*/
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */

2
readme.txt
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@ -63,6 +63,8 @@
3025549)(backported to 2.0.2). 3025549)(backported to 2.0.2).
- FIX: Added option to enforce the stack alignment to 32 or 64 bits in the - FIX: Added option to enforce the stack alignment to 32 or 64 bits in the
Cortex-Mx port (bug 3025133)(backported to 2.0.2). Cortex-Mx port (bug 3025133)(backported to 2.0.2).
- NEW: Added friendly interrupt vectors names to the STM32 HAL (change request
3023944).
*** 2.1.0 *** *** 2.1.0 ***
- FIX: Fixed notification order in input queues (bug 3020708)(backported in - FIX: Fixed notification order in input queues (bug 3020708)(backported in