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ChibiOS
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Removed IRQ initialization when the ISR is suppressed. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12892 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-07-09 19:47:15 +00:00
parent 2f402d9764
commit 9544a26cd5
2 changed files with 17 additions and 17 deletions
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18
os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
View File

@ -595,7 +595,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD1.oqueue, sd_out_buf1, sizeof sd_out_buf1, notify1, &SD1); oqObjectInit(&SD1.oqueue, sd_out_buf1, sizeof sd_out_buf1, notify1, &SD1);
SD1.usart = USART1; SD1.usart = USART1;
SD1.clock = STM32_USART1CLK; SD1.clock = STM32_USART1CLK;
#if defined(STM32_USART1_NUMBER) #if !defined(STM32_USART1_SUPPRESS_ISR) && defined(STM32_USART1_NUMBER)
nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY); nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
#endif #endif
#endif #endif
@ -606,7 +606,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD2.oqueue, sd_out_buf2, sizeof sd_out_buf2, notify2, &SD2); oqObjectInit(&SD2.oqueue, sd_out_buf2, sizeof sd_out_buf2, notify2, &SD2);
SD2.usart = USART2; SD2.usart = USART2;
SD2.clock = STM32_USART2CLK; SD2.clock = STM32_USART2CLK;
#if defined(STM32_USART2_NUMBER) #if !defined(STM32_USART2_SUPPRESS_ISR) && defined(STM32_USART2_NUMBER)
nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY); nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
#endif #endif
#endif #endif
@ -617,7 +617,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD3.oqueue, sd_out_buf3, sizeof sd_out_buf3, notify3, &SD3); oqObjectInit(&SD3.oqueue, sd_out_buf3, sizeof sd_out_buf3, notify3, &SD3);
SD3.usart = USART3; SD3.usart = USART3;
SD3.clock = STM32_USART3CLK; SD3.clock = STM32_USART3CLK;
#if defined(STM32_USART3_NUMBER) #if !defined(STM32_USART3_SUPPRESS_ISR) && defined(STM32_USART3_NUMBER)
nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY); nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
#endif #endif
#endif #endif
@ -628,7 +628,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD4.oqueue, sd_out_buf4, sizeof sd_out_buf4, notify4, &SD4); oqObjectInit(&SD4.oqueue, sd_out_buf4, sizeof sd_out_buf4, notify4, &SD4);
SD4.usart = UART4; SD4.usart = UART4;
SD4.clock = STM32_UART4CLK; SD4.clock = STM32_UART4CLK;
#if defined(STM32_UART4_NUMBER) #if !defined(STM32_UART4_SUPPRESS_ISR) && defined(STM32_UART4_NUMBER)
nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY); nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
#endif #endif
#endif #endif
@ -639,7 +639,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD5.oqueue, sd_out_buf5, sizeof sd_out_buf5, notify5, &SD5); oqObjectInit(&SD5.oqueue, sd_out_buf5, sizeof sd_out_buf5, notify5, &SD5);
SD5.usart = UART5; SD5.usart = UART5;
SD5.clock = STM32_UART5CLK; SD5.clock = STM32_UART5CLK;
#if defined(STM32_UART5_NUMBER) #if !defined(STM32_UART5_SUPPRESS_ISR) && defined(STM32_UART5_NUMBER)
nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY); nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
#endif #endif
#endif #endif
@ -650,7 +650,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD6.oqueue, sd_out_buf6, sizeof sd_out_buf6, notify6, &SD6); oqObjectInit(&SD6.oqueue, sd_out_buf6, sizeof sd_out_buf6, notify6, &SD6);
SD6.usart = USART6; SD6.usart = USART6;
SD6.clock = STM32_USART6CLK; SD6.clock = STM32_USART6CLK;
#if defined(STM32_USART6_NUMBER) #if !defined(STM32_USART6_SUPPRESS_ISR) && defined(STM32_USART6_NUMBER)
nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY); nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
#endif #endif
#endif #endif
@ -661,7 +661,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD7.oqueue, sd_out_buf7, sizeof sd_out_buf7, notify7, &SD7); oqObjectInit(&SD7.oqueue, sd_out_buf7, sizeof sd_out_buf7, notify7, &SD7);
SD7.usart = UART7; SD7.usart = UART7;
SD7.clock = STM32_UART7CLK; SD7.clock = STM32_UART7CLK;
#if defined(STM32_UART7_NUMBER) #if !defined(STM32_UART7_SUPPRESS_ISR) && defined(STM32_UART7_NUMBER)
nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY); nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
#endif #endif
#endif #endif
@ -672,7 +672,7 @@ void sd_lld_init(void) {
oqObjectInit(&SD8.oqueue, sd_out_buf8, sizeof sd_out_buf8, notify8, &SD8); oqObjectInit(&SD8.oqueue, sd_out_buf8, sizeof sd_out_buf8, notify8, &SD8);
SD8.usart = UART8; SD8.usart = UART8;
SD8.clock = STM32_UART8CLK; SD8.clock = STM32_UART8CLK;
#if defined(STM32_UART8_NUMBER) #if !defined(STM32_UART8_SUPPRESS_ISR) && defined(STM32_UART8_NUMBER)
nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY); nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
#endif #endif
#endif #endif
@ -683,7 +683,7 @@ void sd_lld_init(void) {
oqObjectInit(&LPSD1.oqueue, sd_out_buflp1, sizeof sd_out_buflp1, notifylp1, &LPSD1); oqObjectInit(&LPSD1.oqueue, sd_out_buflp1, sizeof sd_out_buflp1, notifylp1, &LPSD1);
LPSD1.usart = LPUART1; LPSD1.usart = LPUART1;
LPSD1.clock = STM32_LPUART1CLK; LPSD1.clock = STM32_LPUART1CLK;
#if defined(STM32_LPUART1_NUMBER) #if !defined(STM32_LPUART1_SUPPRESS_ISR) && defined(STM32_LPUART1_NUMBER)
nvicEnableVector(STM32_LPUART1_NUMBER, STM32_SERIAL_LPUART1_PRIORITY); nvicEnableVector(STM32_LPUART1_NUMBER, STM32_SERIAL_LPUART1_PRIORITY);
#endif #endif
#endif #endif

16
os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
View File

@ -572,7 +572,7 @@ void uart_lld_init(void) {
UARTD1.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD1.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD1.dmarx = NULL; UARTD1.dmarx = NULL;
UARTD1.dmatx = NULL; UARTD1.dmatx = NULL;
#if defined(STM32_USART1_NUMBER) #if !defined(STM32_USART1_SUPPRESS_ISR) && defined(STM32_USART1_NUMBER)
nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY); nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -584,7 +584,7 @@ void uart_lld_init(void) {
UARTD2.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD2.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD2.dmarx = NULL; UARTD2.dmarx = NULL;
UARTD2.dmatx = NULL; UARTD2.dmatx = NULL;
#if defined(STM32_USART2_NUMBER) #if !defined(STM32_USART2_SUPPRESS_ISR) && defined(STM32_USART2_NUMBER)
nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY); nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -596,7 +596,7 @@ void uart_lld_init(void) {
UARTD3.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD3.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD3.dmarx = NULL; UARTD3.dmarx = NULL;
UARTD3.dmatx = NULL; UARTD3.dmatx = NULL;
#if defined(STM32_USART3_NUMBER) #if !defined(STM32_USART3_SUPPRESS_ISR) && defined(STM32_USART3_NUMBER)
nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY); nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -608,7 +608,7 @@ void uart_lld_init(void) {
UARTD4.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD4.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD4.dmarx = NULL; UARTD4.dmarx = NULL;
UARTD4.dmatx = NULL; UARTD4.dmatx = NULL;
#if defined(STM32_UART4_NUMBER) #if !defined(STM32_UART4_SUPPRESS_ISR) && defined(STM32_UART4_NUMBER)
nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY); nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -620,7 +620,7 @@ void uart_lld_init(void) {
UARTD5.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD5.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD5.dmarx = NULL; UARTD5.dmarx = NULL;
UARTD5.dmatx = NULL; UARTD5.dmatx = NULL;
#if defined(STM32_UART5_NUMBER) #if !defined(STM32_UART5_SUPPRESS_ISR) && defined(STM32_UART5_NUMBER)
nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY); nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -632,7 +632,7 @@ void uart_lld_init(void) {
UARTD6.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD6.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD6.dmarx = NULL; UARTD6.dmarx = NULL;
UARTD6.dmatx = NULL; UARTD6.dmatx = NULL;
#if defined(STM32_USART6_NUMBER) #if !defined(STM32_USART6_SUPPRESS_ISR) && defined(STM32_USART6_NUMBER)
nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY); nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -644,7 +644,7 @@ void uart_lld_init(void) {
UARTD7.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD7.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD7.dmarx = NULL; UARTD7.dmarx = NULL;
UARTD7.dmatx = NULL; UARTD7.dmatx = NULL;
#if defined(STM32_UART7_NUMBER) #if !defined(STM32_UART7_SUPPRESS_ISR) && defined(STM32_UART7_NUMBER)
nvicEnableVector(STM32_UART7_NUMBER, STM32_UART_UART7_IRQ_PRIORITY); nvicEnableVector(STM32_UART7_NUMBER, STM32_UART_UART7_IRQ_PRIORITY);
#endif #endif
#endif #endif
@ -656,7 +656,7 @@ void uart_lld_init(void) {
UARTD8.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; UARTD8.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD8.dmarx = NULL; UARTD8.dmarx = NULL;
UARTD8.dmatx = NULL; UARTD8.dmatx = NULL;
#if defined(STM32_UART8_NUMBER) #if !defined(STM32_UART8_SUPPRESS_ISR) && defined(STM32_UART8_NUMBER)
nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY); nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY);
#endif #endif
#endif #endif